xref: /rk3399_ARM-atf/lib/cpus/cpu-ops.mk (revision 6de9b3364b458160c1229d00667caf93ba93c097)
15541bb3fSSoby Mathew#
2a94cc374SDouglas Raillard# Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved.
35541bb3fSSoby Mathew#
482cb2c1aSdp-arm# SPDX-License-Identifier: BSD-3-Clause
55541bb3fSSoby Mathew#
65541bb3fSSoby Mathew
75541bb3fSSoby Mathew# Cortex A57 specific optimisation to skip L1 cache flush when
85541bb3fSSoby Mathew# cluster is powered down.
95541bb3fSSoby MathewSKIP_A57_L1_FLUSH_PWR_DWN	?=0
105541bb3fSSoby Mathew
1154035fc4SSandrine Bailleux# Flag to disable the cache non-temporal hint.
1254035fc4SSandrine Bailleux# It is enabled by default.
1354035fc4SSandrine BailleuxA53_DISABLE_NON_TEMPORAL_HINT	?=1
1454035fc4SSandrine Bailleux
1554035fc4SSandrine Bailleux# Flag to disable the cache non-temporal hint.
1654035fc4SSandrine Bailleux# It is enabled by default.
1754035fc4SSandrine BailleuxA57_DISABLE_NON_TEMPORAL_HINT	?=1
1854035fc4SSandrine Bailleux
195541bb3fSSoby Mathew# Process SKIP_A57_L1_FLUSH_PWR_DWN flag
205541bb3fSSoby Mathew$(eval $(call assert_boolean,SKIP_A57_L1_FLUSH_PWR_DWN))
215541bb3fSSoby Mathew$(eval $(call add_define,SKIP_A57_L1_FLUSH_PWR_DWN))
225541bb3fSSoby Mathew
2354035fc4SSandrine Bailleux# Process A53_DISABLE_NON_TEMPORAL_HINT flag
2454035fc4SSandrine Bailleux$(eval $(call assert_boolean,A53_DISABLE_NON_TEMPORAL_HINT))
2554035fc4SSandrine Bailleux$(eval $(call add_define,A53_DISABLE_NON_TEMPORAL_HINT))
2654035fc4SSandrine Bailleux
2754035fc4SSandrine Bailleux# Process A57_DISABLE_NON_TEMPORAL_HINT flag
2854035fc4SSandrine Bailleux$(eval $(call assert_boolean,A57_DISABLE_NON_TEMPORAL_HINT))
2954035fc4SSandrine Bailleux$(eval $(call add_define,A57_DISABLE_NON_TEMPORAL_HINT))
3054035fc4SSandrine Bailleux
315541bb3fSSoby Mathew
32097b787aSSandrine Bailleux# CPU Errata Build flags.
33097b787aSSandrine Bailleux# These should be enabled by the platform if the erratum workaround needs to be
34097b787aSSandrine Bailleux# applied.
355541bb3fSSoby Mathew
36097b787aSSandrine Bailleux# Flag to apply erratum 826319 workaround during reset. This erratum applies
37097b787aSSandrine Bailleux# only to revision <= r0p2 of the Cortex A53 cpu.
386b0d97b2SJimmy HuangERRATA_A53_826319	?=0
396b0d97b2SJimmy Huang
40a94cc374SDouglas Raillard# Flag to apply erratum 835769 workaround at compile and link time.  This
41a94cc374SDouglas Raillard# erratum applies to revision <= r0p4 of the Cortex A53 cpu. Enabling this
42a94cc374SDouglas Raillard# workaround can lead the linker to create "*.stub" sections.
43a94cc374SDouglas RaillardERRATA_A53_835769	?=0
44a94cc374SDouglas Raillard
45097b787aSSandrine Bailleux# Flag to apply erratum 836870 workaround during reset. This erratum applies
46097b787aSSandrine Bailleux# only to revision <= r0p3 of the Cortex A53 cpu. From r0p4 and onwards, this
473fbe46d7SDouglas Raillard# erratum workaround is enabled by default in hardware.
486b0d97b2SJimmy HuangERRATA_A53_836870	?=0
496b0d97b2SJimmy Huang
50a94cc374SDouglas Raillard# Flag to apply erratum 843419 workaround at link time.
51a94cc374SDouglas Raillard# This erratum applies to revision <= r0p4 of the Cortex A53 cpu. Enabling this
52a94cc374SDouglas Raillard# workaround could lead the linker to emit "*.stub" sections which are 4kB
53a94cc374SDouglas Raillard# aligned.
54a94cc374SDouglas RaillardERRATA_A53_843419	?=0
55a94cc374SDouglas Raillard
56b75dc0e4SAndre Przywara# Flag to apply errata 855873 during reset. This errata applies to all
57b75dc0e4SAndre Przywara# revisions of the Cortex A53 CPU, but this firmware workaround only works
58b75dc0e4SAndre Przywara# for revisions r0p3 and higher. Earlier revisions are taken care
59b75dc0e4SAndre Przywara# of by the rich OS.
60b75dc0e4SAndre PrzywaraERRATA_A53_855873	?=0
61b75dc0e4SAndre Przywara
62097b787aSSandrine Bailleux# Flag to apply erratum 806969 workaround during reset. This erratum applies
63097b787aSSandrine Bailleux# only to revision r0p0 of the Cortex A57 cpu.
645541bb3fSSoby MathewERRATA_A57_806969	?=0
655541bb3fSSoby Mathew
66ccbec91cSAntonio Nino Diaz# Flag to apply erratum 813419 workaround during reset. This erratum applies
67ccbec91cSAntonio Nino Diaz# only to revision r0p0 of the Cortex A57 cpu.
68ccbec91cSAntonio Nino DiazERRATA_A57_813419	?=0
69ccbec91cSAntonio Nino Diaz
70097b787aSSandrine Bailleux# Flag to apply erratum 813420  workaround during reset. This erratum applies
71097b787aSSandrine Bailleux# only to revision r0p0 of the Cortex A57 cpu.
725541bb3fSSoby MathewERRATA_A57_813420	?=0
735541bb3fSSoby Mathew
74df22d602SSandrine Bailleux# Flag to apply erratum 826974 workaround during reset. This erratum applies
75df22d602SSandrine Bailleux# only to revision <= r1p1 of the Cortex A57 cpu.
76df22d602SSandrine BailleuxERRATA_A57_826974	?=0
77df22d602SSandrine Bailleux
7807288865SSandrine Bailleux# Flag to apply erratum 826977 workaround during reset. This erratum applies
7907288865SSandrine Bailleux# only to revision <= r1p1 of the Cortex A57 cpu.
8007288865SSandrine BailleuxERRATA_A57_826977	?=0
8107288865SSandrine Bailleux
82a8b1c769SSandrine Bailleux# Flag to apply erratum 828024 workaround during reset. This erratum applies
83a8b1c769SSandrine Bailleux# only to revision <= r1p1 of the Cortex A57 cpu.
84a8b1c769SSandrine BailleuxERRATA_A57_828024	?=0
85a8b1c769SSandrine Bailleux
860b77197bSSandrine Bailleux# Flag to apply erratum 829520 workaround during reset. This erratum applies
870b77197bSSandrine Bailleux# only to revision <= r1p2 of the Cortex A57 cpu.
880b77197bSSandrine BailleuxERRATA_A57_829520	?=0
890b77197bSSandrine Bailleux
90adeecf92SSandrine Bailleux# Flag to apply erratum 833471 workaround during reset. This erratum applies
91adeecf92SSandrine Bailleux# only to revision <= r1p2 of the Cortex A57 cpu.
92adeecf92SSandrine BailleuxERRATA_A57_833471	?=0
93adeecf92SSandrine Bailleux
9445b52c20SEleanor Bonnici# Flag to apply erratum 855972 workaround during reset. This erratum applies
9545b52c20SEleanor Bonnici# only to revision <= r1p3 of the Cortex A57 cpu.
9645b52c20SEleanor BonniciERRATA_A57_859972	?=0
9745b52c20SEleanor Bonnici
98*6de9b336SEleanor Bonnici# Flag to apply erratum 855971 workaround during reset. This erratum applies
99*6de9b336SEleanor Bonnici# only to revision <= r0p3 of the Cortex A72 cpu.
100*6de9b336SEleanor BonniciERRATA_A72_859971	?=0
101*6de9b336SEleanor Bonnici
1026b0d97b2SJimmy Huang# Process ERRATA_A53_826319 flag
1036b0d97b2SJimmy Huang$(eval $(call assert_boolean,ERRATA_A53_826319))
1046b0d97b2SJimmy Huang$(eval $(call add_define,ERRATA_A53_826319))
1056b0d97b2SJimmy Huang
106a94cc374SDouglas Raillard# Process ERRATA_A53_835769 flag
107a94cc374SDouglas Raillard$(eval $(call assert_boolean,ERRATA_A53_835769))
108a94cc374SDouglas Raillard$(eval $(call add_define,ERRATA_A53_835769))
109a94cc374SDouglas Raillard
1106b0d97b2SJimmy Huang# Process ERRATA_A53_836870 flag
1116b0d97b2SJimmy Huang$(eval $(call assert_boolean,ERRATA_A53_836870))
1126b0d97b2SJimmy Huang$(eval $(call add_define,ERRATA_A53_836870))
1136b0d97b2SJimmy Huang
114a94cc374SDouglas Raillard# Process ERRATA_A53_843419 flag
115a94cc374SDouglas Raillard$(eval $(call assert_boolean,ERRATA_A53_843419))
116a94cc374SDouglas Raillard$(eval $(call add_define,ERRATA_A53_843419))
117a94cc374SDouglas Raillard
118b75dc0e4SAndre Przywara# Process ERRATA_A53_855873 flag
119b75dc0e4SAndre Przywara$(eval $(call assert_boolean,ERRATA_A53_855873))
120b75dc0e4SAndre Przywara$(eval $(call add_define,ERRATA_A53_855873))
121b75dc0e4SAndre Przywara
1225541bb3fSSoby Mathew# Process ERRATA_A57_806969 flag
1235541bb3fSSoby Mathew$(eval $(call assert_boolean,ERRATA_A57_806969))
1245541bb3fSSoby Mathew$(eval $(call add_define,ERRATA_A57_806969))
1255541bb3fSSoby Mathew
126ccbec91cSAntonio Nino Diaz# Process ERRATA_A57_813419 flag
127ccbec91cSAntonio Nino Diaz$(eval $(call assert_boolean,ERRATA_A57_813419))
128ccbec91cSAntonio Nino Diaz$(eval $(call add_define,ERRATA_A57_813419))
129ccbec91cSAntonio Nino Diaz
1305541bb3fSSoby Mathew# Process ERRATA_A57_813420 flag
1315541bb3fSSoby Mathew$(eval $(call assert_boolean,ERRATA_A57_813420))
1325541bb3fSSoby Mathew$(eval $(call add_define,ERRATA_A57_813420))
133df22d602SSandrine Bailleux
134df22d602SSandrine Bailleux# Process ERRATA_A57_826974 flag
135df22d602SSandrine Bailleux$(eval $(call assert_boolean,ERRATA_A57_826974))
136df22d602SSandrine Bailleux$(eval $(call add_define,ERRATA_A57_826974))
137a8b1c769SSandrine Bailleux
13807288865SSandrine Bailleux# Process ERRATA_A57_826977 flag
13907288865SSandrine Bailleux$(eval $(call assert_boolean,ERRATA_A57_826977))
14007288865SSandrine Bailleux$(eval $(call add_define,ERRATA_A57_826977))
14107288865SSandrine Bailleux
142a8b1c769SSandrine Bailleux# Process ERRATA_A57_828024 flag
143a8b1c769SSandrine Bailleux$(eval $(call assert_boolean,ERRATA_A57_828024))
144a8b1c769SSandrine Bailleux$(eval $(call add_define,ERRATA_A57_828024))
1450b77197bSSandrine Bailleux
1460b77197bSSandrine Bailleux# Process ERRATA_A57_829520 flag
1470b77197bSSandrine Bailleux$(eval $(call assert_boolean,ERRATA_A57_829520))
1480b77197bSSandrine Bailleux$(eval $(call add_define,ERRATA_A57_829520))
149adeecf92SSandrine Bailleux
150adeecf92SSandrine Bailleux# Process ERRATA_A57_833471 flag
151adeecf92SSandrine Bailleux$(eval $(call assert_boolean,ERRATA_A57_833471))
152adeecf92SSandrine Bailleux$(eval $(call add_define,ERRATA_A57_833471))
153a94cc374SDouglas Raillard
15445b52c20SEleanor Bonnici# Process ERRATA_A57_859972 flag
15545b52c20SEleanor Bonnici$(eval $(call assert_boolean,ERRATA_A57_859972))
15645b52c20SEleanor Bonnici$(eval $(call add_define,ERRATA_A57_859972))
15745b52c20SEleanor Bonnici
158*6de9b336SEleanor Bonnici# Process ERRATA_A72_859971 flag
159*6de9b336SEleanor Bonnici$(eval $(call assert_boolean,ERRATA_A72_859971))
160*6de9b336SEleanor Bonnici$(eval $(call add_define,ERRATA_A72_859971))
161*6de9b336SEleanor Bonnici
162a94cc374SDouglas Raillard# Errata build flags
163a94cc374SDouglas Raillardifneq (${ERRATA_A53_843419},0)
164c2b8806fSDouglas RaillardTF_LDFLAGS_aarch64	+= --fix-cortex-a53-843419
165a94cc374SDouglas Raillardendif
166a94cc374SDouglas Raillard
167a94cc374SDouglas Raillardifneq (${ERRATA_A53_835769},0)
168a94cc374SDouglas RaillardTF_CFLAGS_aarch64	+= -mfix-cortex-a53-835769
169c2b8806fSDouglas RaillardTF_LDFLAGS_aarch64	+= --fix-cortex-a53-835769
170a94cc374SDouglas Raillardendif
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