1*5541bb3fSSoby Mathew# 2*5541bb3fSSoby Mathew# Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. 3*5541bb3fSSoby Mathew# 4*5541bb3fSSoby Mathew# Redistribution and use in source and binary forms, with or without 5*5541bb3fSSoby Mathew# modification, are permitted provided that the following conditions are met: 6*5541bb3fSSoby Mathew# 7*5541bb3fSSoby Mathew# Redistributions of source code must retain the above copyright notice, this 8*5541bb3fSSoby Mathew# list of conditions and the following disclaimer. 9*5541bb3fSSoby Mathew# 10*5541bb3fSSoby Mathew# Redistributions in binary form must reproduce the above copyright notice, 11*5541bb3fSSoby Mathew# this list of conditions and the following disclaimer in the documentation 12*5541bb3fSSoby Mathew# and/or other materials provided with the distribution. 13*5541bb3fSSoby Mathew# 14*5541bb3fSSoby Mathew# Neither the name of ARM nor the names of its contributors may be used 15*5541bb3fSSoby Mathew# to endorse or promote products derived from this software without specific 16*5541bb3fSSoby Mathew# prior written permission. 17*5541bb3fSSoby Mathew# 18*5541bb3fSSoby Mathew# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19*5541bb3fSSoby Mathew# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20*5541bb3fSSoby Mathew# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21*5541bb3fSSoby Mathew# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22*5541bb3fSSoby Mathew# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23*5541bb3fSSoby Mathew# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24*5541bb3fSSoby Mathew# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25*5541bb3fSSoby Mathew# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26*5541bb3fSSoby Mathew# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27*5541bb3fSSoby Mathew# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28*5541bb3fSSoby Mathew# POSSIBILITY OF SUCH DAMAGE. 29*5541bb3fSSoby Mathew# 30*5541bb3fSSoby Mathew 31*5541bb3fSSoby Mathew# Cortex A57 specific optimisation to skip L1 cache flush when 32*5541bb3fSSoby Mathew# cluster is powered down. 33*5541bb3fSSoby MathewSKIP_A57_L1_FLUSH_PWR_DWN ?=0 34*5541bb3fSSoby Mathew 35*5541bb3fSSoby Mathew# Process SKIP_A57_L1_FLUSH_PWR_DWN flag 36*5541bb3fSSoby Mathew$(eval $(call assert_boolean,SKIP_A57_L1_FLUSH_PWR_DWN)) 37*5541bb3fSSoby Mathew$(eval $(call add_define,SKIP_A57_L1_FLUSH_PWR_DWN)) 38*5541bb3fSSoby Mathew 39*5541bb3fSSoby Mathew 40*5541bb3fSSoby Mathew# CPU Errata Build flags. These should be enabled by the 41*5541bb3fSSoby Mathew# platform if the errata needs to be applied. 42*5541bb3fSSoby Mathew 43*5541bb3fSSoby Mathew# Flag to apply errata 806969 during reset. This errata applies only to 44*5541bb3fSSoby Mathew# revision r0p0 of the Cortex A57 cpu. 45*5541bb3fSSoby MathewERRATA_A57_806969 ?=0 46*5541bb3fSSoby Mathew 47*5541bb3fSSoby Mathew# Flag to apply errata 813420 during reset. This errata applies only to 48*5541bb3fSSoby Mathew# revision r0p0 of the Cortex A57 cpu. 49*5541bb3fSSoby MathewERRATA_A57_813420 ?=0 50*5541bb3fSSoby Mathew 51*5541bb3fSSoby Mathew# Process ERRATA_A57_806969 flag 52*5541bb3fSSoby Mathew$(eval $(call assert_boolean,ERRATA_A57_806969)) 53*5541bb3fSSoby Mathew$(eval $(call add_define,ERRATA_A57_806969)) 54*5541bb3fSSoby Mathew 55*5541bb3fSSoby Mathew# Process ERRATA_A57_813420 flag 56*5541bb3fSSoby Mathew$(eval $(call assert_boolean,ERRATA_A57_813420)) 57*5541bb3fSSoby Mathew$(eval $(call add_define,ERRATA_A57_813420)) 58