xref: /rk3399_ARM-atf/lib/cpus/aarch64/qemu_max.S (revision 89dba82dfa85fea03e7b2f6ad6a90fcd0aecce55)
15d764e05SLeif Lindholm/*
20d020822SBoyan Karatotev * Copyright (c) 2014-2025, Arm Limited and Contributors. All rights reserved.
35d764e05SLeif Lindholm *
45d764e05SLeif Lindholm * SPDX-License-Identifier: BSD-3-Clause
55d764e05SLeif Lindholm */
65d764e05SLeif Lindholm#include <arch.h>
75d764e05SLeif Lindholm#include <asm_macros.S>
85d764e05SLeif Lindholm#include <cpu_macros.S>
95d764e05SLeif Lindholm#include <qemu_max.h>
105d764e05SLeif Lindholm
11*89dba82dSBoyan Karatotevcpu_reset_prologue qemu_max
12*89dba82dSBoyan Karatotev
135d764e05SLeif Lindholmfunc qemu_max_core_pwr_dwn
145d764e05SLeif Lindholm	/* ---------------------------------------------
155d764e05SLeif Lindholm	 * Disable the Data Cache.
165d764e05SLeif Lindholm	 * ---------------------------------------------
175d764e05SLeif Lindholm	 */
185d764e05SLeif Lindholm	mrs	x1, sctlr_el3
195d764e05SLeif Lindholm	bic	x1, x1, #SCTLR_C_BIT
205d764e05SLeif Lindholm	msr	sctlr_el3, x1
215d764e05SLeif Lindholm	isb
225d764e05SLeif Lindholm
235d764e05SLeif Lindholm	/* ---------------------------------------------
245d764e05SLeif Lindholm	 * Flush L1 cache to L2.
255d764e05SLeif Lindholm	 * ---------------------------------------------
265d764e05SLeif Lindholm	 */
275d764e05SLeif Lindholm	mov	x18, lr
285d764e05SLeif Lindholm	mov	x0, #DCCISW
295d764e05SLeif Lindholm	bl	dcsw_op_level1
305d764e05SLeif Lindholm	mov	lr, x18
315d764e05SLeif Lindholm	ret
325d764e05SLeif Lindholmendfunc qemu_max_core_pwr_dwn
335d764e05SLeif Lindholm
345d764e05SLeif Lindholmfunc qemu_max_cluster_pwr_dwn
355d764e05SLeif Lindholm	/* ---------------------------------------------
365d764e05SLeif Lindholm	 * Disable the Data Cache.
375d764e05SLeif Lindholm	 * ---------------------------------------------
385d764e05SLeif Lindholm	 */
395d764e05SLeif Lindholm	mrs	x1, sctlr_el3
405d764e05SLeif Lindholm	bic	x1, x1, #SCTLR_C_BIT
415d764e05SLeif Lindholm	msr	sctlr_el3, x1
425d764e05SLeif Lindholm	isb
435d764e05SLeif Lindholm
445d764e05SLeif Lindholm	/* ---------------------------------------------
455d764e05SLeif Lindholm	 * Flush all caches to PoC.
465d764e05SLeif Lindholm	 * ---------------------------------------------
475d764e05SLeif Lindholm	 */
485d764e05SLeif Lindholm	mov	x0, #DCCISW
495d764e05SLeif Lindholm	b	dcsw_op_all
505d764e05SLeif Lindholmendfunc qemu_max_cluster_pwr_dwn
515d764e05SLeif Lindholm
520d020822SBoyan Karatotevcpu_reset_func_start qemu_max
530d020822SBoyan Karatotevcpu_reset_func_end qemu_max
540d020822SBoyan Karatotev
555d764e05SLeif Lindholm	/* ---------------------------------------------
565d764e05SLeif Lindholm	 * This function provides cpu specific
575d764e05SLeif Lindholm	 * register information for crash reporting.
585d764e05SLeif Lindholm	 * It needs to return with x6 pointing to
595d764e05SLeif Lindholm	 * a list of register names in ascii and
605d764e05SLeif Lindholm	 * x8 - x15 having values of registers to be
615d764e05SLeif Lindholm	 * reported.
625d764e05SLeif Lindholm	 * ---------------------------------------------
635d764e05SLeif Lindholm	 */
645d764e05SLeif Lindholm.section .rodata.qemu_max_regs, "aS"
655d764e05SLeif Lindholmqemu_max_regs:  /* The ascii list of register names to be reported */
665d764e05SLeif Lindholm	.asciz	"" /* no registers to report */
675d764e05SLeif Lindholm
685d764e05SLeif Lindholmfunc qemu_max_cpu_reg_dump
695d764e05SLeif Lindholm	adr	x6, qemu_max_regs
705d764e05SLeif Lindholm	ret
715d764e05SLeif Lindholmendfunc qemu_max_cpu_reg_dump
725d764e05SLeif Lindholm
735d764e05SLeif Lindholm
745d764e05SLeif Lindholm/* cpu_ops for QEMU MAX */
750d020822SBoyan Karatotevdeclare_cpu_ops qemu_max, QEMU_MAX_MIDR, qemu_max_reset_func, \
765d764e05SLeif Lindholm	qemu_max_core_pwr_dwn, \
775d764e05SLeif Lindholm	qemu_max_cluster_pwr_dwn
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