1bd063a73SJoel Goddard/* 231a3da83SMoritz Fischer * Copyright (c) 2021-2023, Arm Limited. All rights reserved. 3bd063a73SJoel Goddard * 4bd063a73SJoel Goddard * SPDX-License-Identifier: BSD-3-Clause 5bd063a73SJoel Goddard */ 6bd063a73SJoel Goddard 7bd063a73SJoel Goddard#include <arch.h> 8bd063a73SJoel Goddard#include <asm_macros.S> 9bd063a73SJoel Goddard#include <common/bl_common.h> 10bd063a73SJoel Goddard#include <neoverse_v2.h> 11bd063a73SJoel Goddard#include <cpu_macros.S> 12bd063a73SJoel Goddard#include <plat_macros.S> 13bd063a73SJoel Goddard#include "wa_cve_2022_23960_bhb_vector.S" 14bd063a73SJoel Goddard 15bd063a73SJoel Goddard/* Hardware handled coherency */ 16bd063a73SJoel Goddard#if HW_ASSISTED_COHERENCY == 0 17bd063a73SJoel Goddard#error "Neoverse V2 must be compiled with HW_ASSISTED_COHERENCY enabled" 18bd063a73SJoel Goddard#endif 19bd063a73SJoel Goddard 20bd063a73SJoel Goddard/* 64-bit only core */ 21bd063a73SJoel Goddard#if CTX_INCLUDE_AARCH32_REGS == 1 22bd063a73SJoel Goddard#error "Neoverse V2 supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0" 23bd063a73SJoel Goddard#endif 24bd063a73SJoel Goddard 258852fb5bSBipin Raviworkaround_reset_start neoverse_v2, ERRATUM(2331132), ERRATA_V2_2331132 268852fb5bSBipin Ravi sysreg_bitfield_insert NEOVERSE_V2_CPUECTLR2_EL1, NEOVERSE_V2_CPUECTLR2_EL1_PF_MODE_CNSRV, \ 278852fb5bSBipin Ravi NEOVERSE_V2_CPUECTLR2_EL1_PF_MODE_LSB, NEOVERSE_V2_CPUECTLR2_EL1_PF_MODE_WIDTH 288852fb5bSBipin Raviworkaround_reset_end neoverse_v2, ERRATUM(2331132) 298852fb5bSBipin Ravi 308852fb5bSBipin Ravicheck_erratum_ls neoverse_v2, ERRATUM(2331132), CPU_REV(0, 2) 318852fb5bSBipin Ravi 32*b0114025SBipin Raviworkaround_reset_start neoverse_v2, ERRATUM(2719105), ERRATA_V2_2719105 33*b0114025SBipin Ravi sysreg_bit_set NEOVERSE_V2_CPUACTLR2_EL1, NEOVERSE_V2_CPUACTLR2_EL1_BIT_0 34*b0114025SBipin Raviworkaround_reset_end neoverse_v2, ERRATUM(2719105) 35*b0114025SBipin Ravi 36*b0114025SBipin Ravicheck_erratum_ls neoverse_v2, ERRATUM(2719105), CPU_REV(0, 1) 37*b0114025SBipin Ravi 3831a3da83SMoritz Fischerworkaround_runtime_start neoverse_v2, ERRATUM(2801372), ERRATA_V2_2801372 3931a3da83SMoritz Fischer /* dsb before isb of power down sequence */ 4031a3da83SMoritz Fischer dsb sy 4131a3da83SMoritz Fischerworkaround_runtime_end neoverse_v2, ERRATUM(2801372), ERRATA_V2_2801372 4231a3da83SMoritz Fischer 4331a3da83SMoritz Fischercheck_erratum_ls neoverse_v2, ERRATUM(2801372), CPU_REV(0, 1) 4431a3da83SMoritz Fischer 4531a3da83SMoritz Fischerworkaround_reset_start neoverse_v2, CVE(2022,23960), WORKAROUND_CVE_2022_23960 4631a3da83SMoritz Fischer#if IMAGE_BL31 4731a3da83SMoritz Fischer /* 4831a3da83SMoritz Fischer * The Neoverse-V2 generic vectors are overridden to apply errata 4931a3da83SMoritz Fischer * mitigation on exception entry from lower ELs. 5031a3da83SMoritz Fischer */ 515039015aSMoritz Fischer override_vector_table wa_cve_vbar_neoverse_v2 5231a3da83SMoritz Fischer#endif /* IMAGE_BL31 */ 5331a3da83SMoritz Fischerworkaround_reset_end neoverse_v2, CVE(2022,23960) 5431a3da83SMoritz Fischer 5531a3da83SMoritz Fischercheck_erratum_chosen neoverse_v2, CVE(2022, 23960), WORKAROUND_CVE_2022_23960 5631a3da83SMoritz Fischer 57bd063a73SJoel Goddard#if WORKAROUND_CVE_2022_23960 58bd063a73SJoel Goddard wa_cve_2022_23960_bhb_vector_table NEOVERSE_V2_BHB_LOOP_COUNT, neoverse_v2 59bd063a73SJoel Goddard#endif /* WORKAROUND_CVE_2022_23960 */ 60bd063a73SJoel Goddard 61bd063a73SJoel Goddard /* ---------------------------------------------------- 62bd063a73SJoel Goddard * HW will do the cache maintenance while powering down 63bd063a73SJoel Goddard * ---------------------------------------------------- 64bd063a73SJoel Goddard */ 65bd063a73SJoel Goddardfunc neoverse_v2_core_pwr_dwn 66bd063a73SJoel Goddard /* --------------------------------------------------- 67bd063a73SJoel Goddard * Enable CPU power down bit in power control register 68bd063a73SJoel Goddard * --------------------------------------------------- 69bd063a73SJoel Goddard */ 705039015aSMoritz Fischer sysreg_bit_set NEOVERSE_V2_CPUPWRCTLR_EL1, NEOVERSE_V2_CPUPWRCTLR_EL1_CORE_PWRDN_BIT 7131a3da83SMoritz Fischer apply_erratum neoverse_v2, ERRATUM(2801372), ERRATA_V2_2801372 7231a3da83SMoritz Fischer 73bd063a73SJoel Goddard isb 74bd063a73SJoel Goddard ret 75bd063a73SJoel Goddardendfunc neoverse_v2_core_pwr_dwn 76bd063a73SJoel Goddard 7731a3da83SMoritz Fischercpu_reset_func_start neoverse_v2 78bd063a73SJoel Goddard /* Disable speculative loads */ 79bd063a73SJoel Goddard msr SSBS, xzr 8031a3da83SMoritz Fischercpu_reset_func_end neoverse_v2 81bd063a73SJoel Goddard 8231a3da83SMoritz Fischererrata_report_shim neoverse_v2 83bd063a73SJoel Goddard /* --------------------------------------------- 84bd063a73SJoel Goddard * This function provides Neoverse V2- 85bd063a73SJoel Goddard * specific register information for crash 86bd063a73SJoel Goddard * reporting. It needs to return with x6 87bd063a73SJoel Goddard * pointing to a list of register names in ascii 88bd063a73SJoel Goddard * and x8 - x15 having values of registers to be 89bd063a73SJoel Goddard * reported. 90bd063a73SJoel Goddard * --------------------------------------------- 91bd063a73SJoel Goddard */ 92bd063a73SJoel Goddard.section .rodata.neoverse_v2_regs, "aS" 93bd063a73SJoel Goddardneoverse_v2_regs: /* The ascii list of register names to be reported */ 94bd063a73SJoel Goddard .asciz "cpuectlr_el1", "" 95bd063a73SJoel Goddard 96bd063a73SJoel Goddardfunc neoverse_v2_cpu_reg_dump 97bd063a73SJoel Goddard adr x6, neoverse_v2_regs 98bd063a73SJoel Goddard mrs x8, NEOVERSE_V2_CPUECTLR_EL1 99bd063a73SJoel Goddard ret 100bd063a73SJoel Goddardendfunc neoverse_v2_cpu_reg_dump 101bd063a73SJoel Goddard 102bd063a73SJoel Goddarddeclare_cpu_ops neoverse_v2, NEOVERSE_V2_MIDR, \ 103bd063a73SJoel Goddard neoverse_v2_reset_func, \ 104bd063a73SJoel Goddard neoverse_v2_core_pwr_dwn 105