1bd063a73SJoel Goddard/* 231a3da83SMoritz Fischer * Copyright (c) 2021-2023, Arm Limited. All rights reserved. 3bd063a73SJoel Goddard * 4bd063a73SJoel Goddard * SPDX-License-Identifier: BSD-3-Clause 5bd063a73SJoel Goddard */ 6bd063a73SJoel Goddard 7bd063a73SJoel Goddard#include <arch.h> 8bd063a73SJoel Goddard#include <asm_macros.S> 9bd063a73SJoel Goddard#include <common/bl_common.h> 10bd063a73SJoel Goddard#include <neoverse_v2.h> 11bd063a73SJoel Goddard#include <cpu_macros.S> 12bd063a73SJoel Goddard#include <plat_macros.S> 13bd063a73SJoel Goddard#include "wa_cve_2022_23960_bhb_vector.S" 14bd063a73SJoel Goddard 15bd063a73SJoel Goddard/* Hardware handled coherency */ 16bd063a73SJoel Goddard#if HW_ASSISTED_COHERENCY == 0 17bd063a73SJoel Goddard#error "Neoverse V2 must be compiled with HW_ASSISTED_COHERENCY enabled" 18bd063a73SJoel Goddard#endif 19bd063a73SJoel Goddard 20bd063a73SJoel Goddard/* 64-bit only core */ 21bd063a73SJoel Goddard#if CTX_INCLUDE_AARCH32_REGS == 1 22bd063a73SJoel Goddard#error "Neoverse V2 supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0" 23bd063a73SJoel Goddard#endif 24bd063a73SJoel Goddard 2531a3da83SMoritz Fischerworkaround_runtime_start neoverse_v2, ERRATUM(2801372), ERRATA_V2_2801372 2631a3da83SMoritz Fischer /* dsb before isb of power down sequence */ 2731a3da83SMoritz Fischer dsb sy 2831a3da83SMoritz Fischerworkaround_runtime_end neoverse_v2, ERRATUM(2801372), ERRATA_V2_2801372 2931a3da83SMoritz Fischer 3031a3da83SMoritz Fischercheck_erratum_ls neoverse_v2, ERRATUM(2801372), CPU_REV(0, 1) 3131a3da83SMoritz Fischer 3231a3da83SMoritz Fischerworkaround_reset_start neoverse_v2, CVE(2022,23960), WORKAROUND_CVE_2022_23960 3331a3da83SMoritz Fischer#if IMAGE_BL31 3431a3da83SMoritz Fischer /* 3531a3da83SMoritz Fischer * The Neoverse-V2 generic vectors are overridden to apply errata 3631a3da83SMoritz Fischer * mitigation on exception entry from lower ELs. 3731a3da83SMoritz Fischer */ 38*5039015aSMoritz Fischer override_vector_table wa_cve_vbar_neoverse_v2 3931a3da83SMoritz Fischer#endif /* IMAGE_BL31 */ 4031a3da83SMoritz Fischerworkaround_reset_end neoverse_v2, CVE(2022,23960) 4131a3da83SMoritz Fischer 4231a3da83SMoritz Fischercheck_erratum_chosen neoverse_v2, CVE(2022, 23960), WORKAROUND_CVE_2022_23960 4331a3da83SMoritz Fischer 44bd063a73SJoel Goddard#if WORKAROUND_CVE_2022_23960 45bd063a73SJoel Goddard wa_cve_2022_23960_bhb_vector_table NEOVERSE_V2_BHB_LOOP_COUNT, neoverse_v2 46bd063a73SJoel Goddard#endif /* WORKAROUND_CVE_2022_23960 */ 47bd063a73SJoel Goddard 48bd063a73SJoel Goddard /* ---------------------------------------------------- 49bd063a73SJoel Goddard * HW will do the cache maintenance while powering down 50bd063a73SJoel Goddard * ---------------------------------------------------- 51bd063a73SJoel Goddard */ 52bd063a73SJoel Goddardfunc neoverse_v2_core_pwr_dwn 53bd063a73SJoel Goddard /* --------------------------------------------------- 54bd063a73SJoel Goddard * Enable CPU power down bit in power control register 55bd063a73SJoel Goddard * --------------------------------------------------- 56bd063a73SJoel Goddard */ 57*5039015aSMoritz Fischer sysreg_bit_set NEOVERSE_V2_CPUPWRCTLR_EL1, NEOVERSE_V2_CPUPWRCTLR_EL1_CORE_PWRDN_BIT 5831a3da83SMoritz Fischer apply_erratum neoverse_v2, ERRATUM(2801372), ERRATA_V2_2801372 5931a3da83SMoritz Fischer 60bd063a73SJoel Goddard isb 61bd063a73SJoel Goddard ret 62bd063a73SJoel Goddardendfunc neoverse_v2_core_pwr_dwn 63bd063a73SJoel Goddard 6431a3da83SMoritz Fischercpu_reset_func_start neoverse_v2 65bd063a73SJoel Goddard /* Disable speculative loads */ 66bd063a73SJoel Goddard msr SSBS, xzr 6731a3da83SMoritz Fischercpu_reset_func_end neoverse_v2 68bd063a73SJoel Goddard 6931a3da83SMoritz Fischererrata_report_shim neoverse_v2 70bd063a73SJoel Goddard /* --------------------------------------------- 71bd063a73SJoel Goddard * This function provides Neoverse V2- 72bd063a73SJoel Goddard * specific register information for crash 73bd063a73SJoel Goddard * reporting. It needs to return with x6 74bd063a73SJoel Goddard * pointing to a list of register names in ascii 75bd063a73SJoel Goddard * and x8 - x15 having values of registers to be 76bd063a73SJoel Goddard * reported. 77bd063a73SJoel Goddard * --------------------------------------------- 78bd063a73SJoel Goddard */ 79bd063a73SJoel Goddard.section .rodata.neoverse_v2_regs, "aS" 80bd063a73SJoel Goddardneoverse_v2_regs: /* The ascii list of register names to be reported */ 81bd063a73SJoel Goddard .asciz "cpuectlr_el1", "" 82bd063a73SJoel Goddard 83bd063a73SJoel Goddardfunc neoverse_v2_cpu_reg_dump 84bd063a73SJoel Goddard adr x6, neoverse_v2_regs 85bd063a73SJoel Goddard mrs x8, NEOVERSE_V2_CPUECTLR_EL1 86bd063a73SJoel Goddard ret 87bd063a73SJoel Goddardendfunc neoverse_v2_cpu_reg_dump 88bd063a73SJoel Goddard 89bd063a73SJoel Goddarddeclare_cpu_ops neoverse_v2, NEOVERSE_V2_MIDR, \ 90bd063a73SJoel Goddard neoverse_v2_reset_func, \ 91bd063a73SJoel Goddard neoverse_v2_core_pwr_dwn 92