1*fd4bb0adSJohn Tsichritzis/* 2*fd4bb0adSJohn Tsichritzis * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. 3*fd4bb0adSJohn Tsichritzis * 4*fd4bb0adSJohn Tsichritzis * SPDX-License-Identifier: BSD-3-Clause 5*fd4bb0adSJohn Tsichritzis */ 6*fd4bb0adSJohn Tsichritzis#include <arch.h> 7*fd4bb0adSJohn Tsichritzis#include <asm_macros.S> 8*fd4bb0adSJohn Tsichritzis#include <common/bl_common.h> 9*fd4bb0adSJohn Tsichritzis#include <common/debug.h> 10*fd4bb0adSJohn Tsichritzis#include <cortex_helios.h> 11*fd4bb0adSJohn Tsichritzis#include <cpu_macros.S> 12*fd4bb0adSJohn Tsichritzis#include <plat_macros.S> 13*fd4bb0adSJohn Tsichritzis 14*fd4bb0adSJohn Tsichritzisfunc cortex_helios_cpu_pwr_dwn 15*fd4bb0adSJohn Tsichritzis mrs x0, CORTEX_HELIOS_CPUPWRCTLR_EL1 16*fd4bb0adSJohn Tsichritzis orr x0, x0, #CORTEX_HELIOS_CPUPWRCTLR_EL1_CORE_PWRDN_BIT 17*fd4bb0adSJohn Tsichritzis msr CORTEX_HELIOS_CPUPWRCTLR_EL1, x0 18*fd4bb0adSJohn Tsichritzis isb 19*fd4bb0adSJohn Tsichritzis ret 20*fd4bb0adSJohn Tsichritzisendfunc cortex_helios_cpu_pwr_dwn 21*fd4bb0adSJohn Tsichritzis 22*fd4bb0adSJohn Tsichritzis#if REPORT_ERRATA 23*fd4bb0adSJohn Tsichritzis/* 24*fd4bb0adSJohn Tsichritzis * Errata printing function for Cortex Helios. Must follow AAPCS. 25*fd4bb0adSJohn Tsichritzis */ 26*fd4bb0adSJohn Tsichritzisfunc cortex_helios_errata_report 27*fd4bb0adSJohn Tsichritzis ret 28*fd4bb0adSJohn Tsichritzisendfunc cortex_helios_errata_report 29*fd4bb0adSJohn Tsichritzis#endif 30*fd4bb0adSJohn Tsichritzis 31*fd4bb0adSJohn Tsichritzis 32*fd4bb0adSJohn Tsichritzis.section .rodata.cortex_helios_regs, "aS" 33*fd4bb0adSJohn Tsichritziscortex_helios_regs: /* The ascii list of register names to be reported */ 34*fd4bb0adSJohn Tsichritzis .asciz "cpuectlr_el1", "" 35*fd4bb0adSJohn Tsichritzis 36*fd4bb0adSJohn Tsichritzisfunc cortex_helios_cpu_reg_dump 37*fd4bb0adSJohn Tsichritzis adr x6, cortex_helios_regs 38*fd4bb0adSJohn Tsichritzis mrs x8, CORTEX_HELIOS_ECTLR_EL1 39*fd4bb0adSJohn Tsichritzis ret 40*fd4bb0adSJohn Tsichritzisendfunc cortex_helios_cpu_reg_dump 41*fd4bb0adSJohn Tsichritzis 42*fd4bb0adSJohn Tsichritzisdeclare_cpu_ops cortex_helios, CORTEX_HELIOS_MIDR, \ 43*fd4bb0adSJohn Tsichritzis CPU_NO_RESET_FUNC, \ 44*fd4bb0adSJohn Tsichritzis cortex_helios_cpu_pwr_dwn 45