1fd4bb0adSJohn Tsichritzis/* 211088e39SJohn Tsichritzis * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. 3fd4bb0adSJohn Tsichritzis * 4fd4bb0adSJohn Tsichritzis * SPDX-License-Identifier: BSD-3-Clause 5fd4bb0adSJohn Tsichritzis */ 6fd4bb0adSJohn Tsichritzis#include <arch.h> 7fd4bb0adSJohn Tsichritzis#include <asm_macros.S> 8fd4bb0adSJohn Tsichritzis#include <common/bl_common.h> 9fd4bb0adSJohn Tsichritzis#include <common/debug.h> 1011088e39SJohn Tsichritzis#include <neoverse_e1.h> 11fd4bb0adSJohn Tsichritzis#include <cpu_macros.S> 12fd4bb0adSJohn Tsichritzis#include <plat_macros.S> 13fd4bb0adSJohn Tsichritzis 14076b5f02SJohn Tsichritzis/* Hardware handled coherency */ 15076b5f02SJohn Tsichritzis#if HW_ASSISTED_COHERENCY == 0 16076b5f02SJohn Tsichritzis#error "Neoverse E1 must be compiled with HW_ASSISTED_COHERENCY enabled" 17076b5f02SJohn Tsichritzis#endif 18076b5f02SJohn Tsichritzis 19*629d04f5SJohn Tsichritzis/* 64-bit only core */ 20*629d04f5SJohn Tsichritzis#if CTX_INCLUDE_AARCH32_REGS == 1 21*629d04f5SJohn Tsichritzis#error "Neoverse-E1 supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0" 22*629d04f5SJohn Tsichritzis#endif 23*629d04f5SJohn Tsichritzis 2411088e39SJohn Tsichritzisfunc neoverse_e1_cpu_pwr_dwn 2511088e39SJohn Tsichritzis mrs x0, NEOVERSE_E1_CPUPWRCTLR_EL1 2611088e39SJohn Tsichritzis orr x0, x0, #NEOVERSE_E1_CPUPWRCTLR_EL1_CORE_PWRDN_BIT 2711088e39SJohn Tsichritzis msr NEOVERSE_E1_CPUPWRCTLR_EL1, x0 28fd4bb0adSJohn Tsichritzis isb 29fd4bb0adSJohn Tsichritzis ret 3011088e39SJohn Tsichritzisendfunc neoverse_e1_cpu_pwr_dwn 31fd4bb0adSJohn Tsichritzis 32fd4bb0adSJohn Tsichritzis#if REPORT_ERRATA 33fd4bb0adSJohn Tsichritzis/* 3411088e39SJohn Tsichritzis * Errata printing function for Neoverse N1. Must follow AAPCS. 35fd4bb0adSJohn Tsichritzis */ 3611088e39SJohn Tsichritzisfunc neoverse_e1_errata_report 37fd4bb0adSJohn Tsichritzis ret 3811088e39SJohn Tsichritzisendfunc neoverse_e1_errata_report 39fd4bb0adSJohn Tsichritzis#endif 40fd4bb0adSJohn Tsichritzis 41fd4bb0adSJohn Tsichritzis 4211088e39SJohn Tsichritzis.section .rodata.neoverse_e1_regs, "aS" 4311088e39SJohn Tsichritzisneoverse_e1_regs: /* The ascii list of register names to be reported */ 44fd4bb0adSJohn Tsichritzis .asciz "cpuectlr_el1", "" 45fd4bb0adSJohn Tsichritzis 4611088e39SJohn Tsichritzisfunc neoverse_e1_cpu_reg_dump 4711088e39SJohn Tsichritzis adr x6, neoverse_e1_regs 4811088e39SJohn Tsichritzis mrs x8, NEOVERSE_E1_ECTLR_EL1 49fd4bb0adSJohn Tsichritzis ret 5011088e39SJohn Tsichritzisendfunc neoverse_e1_cpu_reg_dump 51fd4bb0adSJohn Tsichritzis 5211088e39SJohn Tsichritzisdeclare_cpu_ops neoverse_e1, NEOVERSE_E1_MIDR, \ 53fd4bb0adSJohn Tsichritzis CPU_NO_RESET_FUNC, \ 5411088e39SJohn Tsichritzis neoverse_e1_cpu_pwr_dwn 55