1fd4bb0adSJohn Tsichritzis/* 2*11088e39SJohn Tsichritzis * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. 3fd4bb0adSJohn Tsichritzis * 4fd4bb0adSJohn Tsichritzis * SPDX-License-Identifier: BSD-3-Clause 5fd4bb0adSJohn Tsichritzis */ 6fd4bb0adSJohn Tsichritzis#include <arch.h> 7fd4bb0adSJohn Tsichritzis#include <asm_macros.S> 8fd4bb0adSJohn Tsichritzis#include <common/bl_common.h> 9fd4bb0adSJohn Tsichritzis#include <common/debug.h> 10*11088e39SJohn Tsichritzis#include <neoverse_e1.h> 11fd4bb0adSJohn Tsichritzis#include <cpu_macros.S> 12fd4bb0adSJohn Tsichritzis#include <plat_macros.S> 13fd4bb0adSJohn Tsichritzis 14*11088e39SJohn Tsichritzisfunc neoverse_e1_cpu_pwr_dwn 15*11088e39SJohn Tsichritzis mrs x0, NEOVERSE_E1_CPUPWRCTLR_EL1 16*11088e39SJohn Tsichritzis orr x0, x0, #NEOVERSE_E1_CPUPWRCTLR_EL1_CORE_PWRDN_BIT 17*11088e39SJohn Tsichritzis msr NEOVERSE_E1_CPUPWRCTLR_EL1, x0 18fd4bb0adSJohn Tsichritzis isb 19fd4bb0adSJohn Tsichritzis ret 20*11088e39SJohn Tsichritzisendfunc neoverse_e1_cpu_pwr_dwn 21fd4bb0adSJohn Tsichritzis 22fd4bb0adSJohn Tsichritzis#if REPORT_ERRATA 23fd4bb0adSJohn Tsichritzis/* 24*11088e39SJohn Tsichritzis * Errata printing function for Neoverse N1. Must follow AAPCS. 25fd4bb0adSJohn Tsichritzis */ 26*11088e39SJohn Tsichritzisfunc neoverse_e1_errata_report 27fd4bb0adSJohn Tsichritzis ret 28*11088e39SJohn Tsichritzisendfunc neoverse_e1_errata_report 29fd4bb0adSJohn Tsichritzis#endif 30fd4bb0adSJohn Tsichritzis 31fd4bb0adSJohn Tsichritzis 32*11088e39SJohn Tsichritzis.section .rodata.neoverse_e1_regs, "aS" 33*11088e39SJohn Tsichritzisneoverse_e1_regs: /* The ascii list of register names to be reported */ 34fd4bb0adSJohn Tsichritzis .asciz "cpuectlr_el1", "" 35fd4bb0adSJohn Tsichritzis 36*11088e39SJohn Tsichritzisfunc neoverse_e1_cpu_reg_dump 37*11088e39SJohn Tsichritzis adr x6, neoverse_e1_regs 38*11088e39SJohn Tsichritzis mrs x8, NEOVERSE_E1_ECTLR_EL1 39fd4bb0adSJohn Tsichritzis ret 40*11088e39SJohn Tsichritzisendfunc neoverse_e1_cpu_reg_dump 41fd4bb0adSJohn Tsichritzis 42*11088e39SJohn Tsichritzisdeclare_cpu_ops neoverse_e1, NEOVERSE_E1_MIDR, \ 43fd4bb0adSJohn Tsichritzis CPU_NO_RESET_FUNC, \ 44*11088e39SJohn Tsichritzis neoverse_e1_cpu_pwr_dwn 45