1fd4bb0adSJohn Tsichritzis/* 211088e39SJohn Tsichritzis * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. 3fd4bb0adSJohn Tsichritzis * 4fd4bb0adSJohn Tsichritzis * SPDX-License-Identifier: BSD-3-Clause 5fd4bb0adSJohn Tsichritzis */ 6fd4bb0adSJohn Tsichritzis#include <arch.h> 7fd4bb0adSJohn Tsichritzis#include <asm_macros.S> 8fd4bb0adSJohn Tsichritzis#include <common/bl_common.h> 9fd4bb0adSJohn Tsichritzis#include <common/debug.h> 1011088e39SJohn Tsichritzis#include <neoverse_e1.h> 11fd4bb0adSJohn Tsichritzis#include <cpu_macros.S> 12fd4bb0adSJohn Tsichritzis#include <plat_macros.S> 13fd4bb0adSJohn Tsichritzis 14*076b5f02SJohn Tsichritzis/* Hardware handled coherency */ 15*076b5f02SJohn Tsichritzis#if HW_ASSISTED_COHERENCY == 0 16*076b5f02SJohn Tsichritzis#error "Neoverse E1 must be compiled with HW_ASSISTED_COHERENCY enabled" 17*076b5f02SJohn Tsichritzis#endif 18*076b5f02SJohn Tsichritzis 1911088e39SJohn Tsichritzisfunc neoverse_e1_cpu_pwr_dwn 2011088e39SJohn Tsichritzis mrs x0, NEOVERSE_E1_CPUPWRCTLR_EL1 2111088e39SJohn Tsichritzis orr x0, x0, #NEOVERSE_E1_CPUPWRCTLR_EL1_CORE_PWRDN_BIT 2211088e39SJohn Tsichritzis msr NEOVERSE_E1_CPUPWRCTLR_EL1, x0 23fd4bb0adSJohn Tsichritzis isb 24fd4bb0adSJohn Tsichritzis ret 2511088e39SJohn Tsichritzisendfunc neoverse_e1_cpu_pwr_dwn 26fd4bb0adSJohn Tsichritzis 27fd4bb0adSJohn Tsichritzis#if REPORT_ERRATA 28fd4bb0adSJohn Tsichritzis/* 2911088e39SJohn Tsichritzis * Errata printing function for Neoverse N1. Must follow AAPCS. 30fd4bb0adSJohn Tsichritzis */ 3111088e39SJohn Tsichritzisfunc neoverse_e1_errata_report 32fd4bb0adSJohn Tsichritzis ret 3311088e39SJohn Tsichritzisendfunc neoverse_e1_errata_report 34fd4bb0adSJohn Tsichritzis#endif 35fd4bb0adSJohn Tsichritzis 36fd4bb0adSJohn Tsichritzis 3711088e39SJohn Tsichritzis.section .rodata.neoverse_e1_regs, "aS" 3811088e39SJohn Tsichritzisneoverse_e1_regs: /* The ascii list of register names to be reported */ 39fd4bb0adSJohn Tsichritzis .asciz "cpuectlr_el1", "" 40fd4bb0adSJohn Tsichritzis 4111088e39SJohn Tsichritzisfunc neoverse_e1_cpu_reg_dump 4211088e39SJohn Tsichritzis adr x6, neoverse_e1_regs 4311088e39SJohn Tsichritzis mrs x8, NEOVERSE_E1_ECTLR_EL1 44fd4bb0adSJohn Tsichritzis ret 4511088e39SJohn Tsichritzisendfunc neoverse_e1_cpu_reg_dump 46fd4bb0adSJohn Tsichritzis 4711088e39SJohn Tsichritzisdeclare_cpu_ops neoverse_e1, NEOVERSE_E1_MIDR, \ 48fd4bb0adSJohn Tsichritzis CPU_NO_RESET_FUNC, \ 4911088e39SJohn Tsichritzis neoverse_e1_cpu_pwr_dwn 50