1/* 2 * Copyright (c) 2025, Arm Limited. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7#include <arch.h> 8#include <asm_macros.S> 9#include <common/bl_common.h> 10#include <dionysus.h> 11#include <cpu_macros.S> 12#include <plat_macros.S> 13 14/* Hardware handled coherency */ 15#if HW_ASSISTED_COHERENCY == 0 16#error "Dionysus must be compiled with HW_ASSISTED_COHERENCY enabled" 17#endif 18 19/* 64-bit only core */ 20#if CTX_INCLUDE_AARCH32_REGS == 1 21#error "Dionysus supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0" 22#endif 23 24cpu_reset_prologue dionysus 25 26cpu_reset_func_start dionysus 27 /* ---------------------------------------------------- 28 * Disable speculative loads 29 * ---------------------------------------------------- 30 */ 31 msr SSBS, xzr 32 enable_mpmm 33cpu_reset_func_end dionysus 34 35 /* ---------------------------------------------------- 36 * HW will do the cache maintenance while powering down 37 * ---------------------------------------------------- 38 */ 39func dionysus_core_pwr_dwn 40 /* --------------------------------------------------- 41 * Flip CPU power down bit in power control register. 42 * It will be set on powerdown and cleared on wakeup 43 * --------------------------------------------------- 44 */ 45 sysreg_bit_toggle DIONYSUS_CPUPWRCTLR_EL1, \ 46 DIONYSUS_CPUPWRCTLR_EL1_CORE_PWRDN_BIT 47 isb 48 signal_pabandon_handled 49 ret 50endfunc dionysus_core_pwr_dwn 51 52 /* --------------------------------------------- 53 * This function provides Dionysus specific 54 * register information for crash reporting. 55 * It needs to return with x6 pointing to 56 * a list of register names in ascii and 57 * x8 - x15 having values of registers to be 58 * reported. 59 * --------------------------------------------- 60 */ 61.section .rodata.dionysus_regs, "aS" 62dionysus_regs: /* The ASCII list of register names to be reported */ 63 .asciz "imp_cpuectlr_el1", "" 64 65func dionysus_cpu_reg_dump 66 adr x6, dionysus_regs 67 mrs x8, DIONYSUS_IMP_CPUECTLR_EL1 68 ret 69endfunc dionysus_cpu_reg_dump 70 71declare_cpu_ops dionysus, DIONYSUS_MIDR, \ 72 dionysus_reset_func, \ 73 dionysus_core_pwr_dwn 74