1/* 2 * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31#include <arch.h> 32#include <asm_macros.S> 33#include <assert_macros.S> 34#include <denver.h> 35#include <cpu_macros.S> 36#include <plat_macros.S> 37 38 .global denver_disable_dco 39 40 /* --------------------------------------------- 41 * Disable debug interfaces 42 * --------------------------------------------- 43 */ 44func denver_disable_ext_debug 45 mov x0, #1 46 msr osdlr_el1, x0 47 isb 48 dsb sy 49 ret 50endfunc denver_disable_ext_debug 51 52 /* ---------------------------------------------------- 53 * Enable dynamic code optimizer (DCO) 54 * ---------------------------------------------------- 55 */ 56func denver_enable_dco 57 mrs x0, mpidr_el1 58 and x0, x0, #0xF 59 mov x1, #1 60 lsl x1, x1, x0 61 msr s3_0_c15_c0_2, x1 62 ret 63endfunc denver_enable_dco 64 65 /* ---------------------------------------------------- 66 * Disable dynamic code optimizer (DCO) 67 * ---------------------------------------------------- 68 */ 69func denver_disable_dco 70 71 /* turn off background work */ 72 mrs x0, mpidr_el1 73 and x0, x0, #0xF 74 mov x1, #1 75 lsl x1, x1, x0 76 lsl x2, x1, #16 77 msr s3_0_c15_c0_2, x2 78 isb 79 80 /* wait till the background work turns off */ 811: mrs x2, s3_0_c15_c0_2 82 lsr x2, x2, #32 83 and w2, w2, 0xFFFF 84 and x2, x2, x1 85 cbnz x2, 1b 86 87 ret 88endfunc denver_disable_dco 89 90 /* ------------------------------------------------- 91 * The CPU Ops reset function for Denver. 92 * ------------------------------------------------- 93 */ 94func denver_reset_func 95 96 mov x19, x30 97 98 /* ---------------------------------------------------- 99 * Enable dynamic code optimizer (DCO) 100 * ---------------------------------------------------- 101 */ 102 bl denver_enable_dco 103 104 ret x19 105endfunc denver_reset_func 106 107 /* ---------------------------------------------------- 108 * The CPU Ops core power down function for Denver. 109 * ---------------------------------------------------- 110 */ 111func denver_core_pwr_dwn 112 113 mov x19, x30 114 115 /* --------------------------------------------- 116 * Force the debug interfaces to be quiescent 117 * --------------------------------------------- 118 */ 119 bl denver_disable_ext_debug 120 121 ret x19 122endfunc denver_core_pwr_dwn 123 124 /* ------------------------------------------------------- 125 * The CPU Ops cluster power down function for Denver. 126 * ------------------------------------------------------- 127 */ 128func denver_cluster_pwr_dwn 129 ret 130endfunc denver_cluster_pwr_dwn 131 132 /* --------------------------------------------- 133 * This function provides Denver specific 134 * register information for crash reporting. 135 * It needs to return with x6 pointing to 136 * a list of register names in ascii and 137 * x8 - x15 having values of registers to be 138 * reported. 139 * --------------------------------------------- 140 */ 141.section .rodata.denver_regs, "aS" 142denver_regs: /* The ascii list of register names to be reported */ 143 .asciz "actlr_el1", "" 144 145func denver_cpu_reg_dump 146 adr x6, denver_regs 147 mrs x8, ACTLR_EL1 148 ret 149endfunc denver_cpu_reg_dump 150 151declare_cpu_ops denver, DENVER_MIDR_PN0, \ 152 denver_reset_func, \ 153 denver_core_pwr_dwn, \ 154 denver_cluster_pwr_dwn 155 156declare_cpu_ops denver, DENVER_MIDR_PN1, \ 157 denver_reset_func, \ 158 denver_core_pwr_dwn, \ 159 denver_cluster_pwr_dwn 160 161declare_cpu_ops denver, DENVER_MIDR_PN2, \ 162 denver_reset_func, \ 163 denver_core_pwr_dwn, \ 164 denver_cluster_pwr_dwn 165 166declare_cpu_ops denver, DENVER_MIDR_PN3, \ 167 denver_reset_func, \ 168 denver_core_pwr_dwn, \ 169 denver_cluster_pwr_dwn 170 171declare_cpu_ops denver, DENVER_MIDR_PN4, \ 172 denver_reset_func, \ 173 denver_core_pwr_dwn, \ 174 denver_cluster_pwr_dwn 175