19b476841SSoby Mathew/* 29b476841SSoby Mathew * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. 39b476841SSoby Mathew * 49b476841SSoby Mathew * Redistribution and use in source and binary forms, with or without 59b476841SSoby Mathew * modification, are permitted provided that the following conditions are met: 69b476841SSoby Mathew * 79b476841SSoby Mathew * Redistributions of source code must retain the above copyright notice, this 89b476841SSoby Mathew * list of conditions and the following disclaimer. 99b476841SSoby Mathew * 109b476841SSoby Mathew * Redistributions in binary form must reproduce the above copyright notice, 119b476841SSoby Mathew * this list of conditions and the following disclaimer in the documentation 129b476841SSoby Mathew * and/or other materials provided with the distribution. 139b476841SSoby Mathew * 149b476841SSoby Mathew * Neither the name of ARM nor the names of its contributors may be used 159b476841SSoby Mathew * to endorse or promote products derived from this software without specific 169b476841SSoby Mathew * prior written permission. 179b476841SSoby Mathew * 189b476841SSoby Mathew * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 199b476841SSoby Mathew * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 209b476841SSoby Mathew * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 219b476841SSoby Mathew * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 229b476841SSoby Mathew * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 239b476841SSoby Mathew * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 249b476841SSoby Mathew * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 259b476841SSoby Mathew * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 269b476841SSoby Mathew * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 279b476841SSoby Mathew * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 289b476841SSoby Mathew * POSSIBILITY OF SUCH DAMAGE. 299b476841SSoby Mathew */ 309b476841SSoby Mathew 319b476841SSoby Mathew#include <arch.h> 329b476841SSoby Mathew#include <asm_macros.S> 339b476841SSoby Mathew#include <assert_macros.S> 349b476841SSoby Mathew#include <cpu_macros.S> 359b476841SSoby Mathew#if IMAGE_BL31 369b476841SSoby Mathew#include <cpu_data.h> 379b476841SSoby Mathew#endif 389b476841SSoby Mathew 399b476841SSoby Mathew /* Reset fn is needed in BL at reset vector */ 409b476841SSoby Mathew#if IMAGE_BL1 || (IMAGE_BL31 && RESET_TO_BL31) 419b476841SSoby Mathew /* 429b476841SSoby Mathew * The reset handler common to all platforms. After a matching 439b476841SSoby Mathew * cpu_ops structure entry is found, the correponding reset_handler 449b476841SSoby Mathew * in the cpu_ops is invoked. 459b476841SSoby Mathew */ 469b476841SSoby Mathew .globl reset_handler 479b476841SSoby Mathewfunc reset_handler 489b476841SSoby Mathew mov x10, x30 499b476841SSoby Mathew 5024fb838fSSoby Mathew bl plat_reset_handler 5124fb838fSSoby Mathew 529b476841SSoby Mathew /* Get the matching cpu_ops pointer */ 539b476841SSoby Mathew bl get_cpu_ops_ptr 549b476841SSoby Mathew#if ASM_ASSERTION 559b476841SSoby Mathew cmp x0, #0 569b476841SSoby Mathew ASM_ASSERT(ne) 579b476841SSoby Mathew#endif 589b476841SSoby Mathew 599b476841SSoby Mathew /* Get the cpu_ops reset handler */ 609b476841SSoby Mathew ldr x2, [x0, #CPU_RESET_FUNC] 619b476841SSoby Mathew cbz x2, 1f 629b476841SSoby Mathew blr x2 639b476841SSoby Mathew1: 649b476841SSoby Mathew ret x10 6524fb838fSSoby Mathew 669b476841SSoby Mathew#endif /* IMAGE_BL1 || (IMAGE_BL31 && RESET_TO_BL31) */ 679b476841SSoby Mathew 68*add40351SSoby Mathew#if IMAGE_BL31 /* The power down core and cluster is needed only in BL31 */ 69*add40351SSoby Mathew /* 70*add40351SSoby Mathew * The prepare core power down function for all platforms. After 71*add40351SSoby Mathew * the cpu_ops pointer is retrieved from cpu_data, the corresponding 72*add40351SSoby Mathew * pwr_dwn_core in the cpu_ops is invoked. 73*add40351SSoby Mathew */ 74*add40351SSoby Mathew .globl prepare_core_pwr_dwn 75*add40351SSoby Mathewfunc prepare_core_pwr_dwn 76*add40351SSoby Mathew mrs x1, tpidr_el3 77*add40351SSoby Mathew ldr x0, [x1, #CPU_DATA_CPU_OPS_PTR] 78*add40351SSoby Mathew#if ASM_ASSERTION 79*add40351SSoby Mathew cmp x0, #0 80*add40351SSoby Mathew ASM_ASSERT(ne) 81*add40351SSoby Mathew#endif 82*add40351SSoby Mathew 83*add40351SSoby Mathew /* Get the cpu_ops core_pwr_dwn handler */ 84*add40351SSoby Mathew ldr x1, [x0, #CPU_PWR_DWN_CORE] 85*add40351SSoby Mathew br x1 86*add40351SSoby Mathew 87*add40351SSoby Mathew /* 88*add40351SSoby Mathew * The prepare cluster power down function for all platforms. After 89*add40351SSoby Mathew * the cpu_ops pointer is retrieved from cpu_data, the corresponding 90*add40351SSoby Mathew * pwr_dwn_cluster in the cpu_ops is invoked. 91*add40351SSoby Mathew */ 92*add40351SSoby Mathew .globl prepare_cluster_pwr_dwn 93*add40351SSoby Mathewfunc prepare_cluster_pwr_dwn 94*add40351SSoby Mathew mrs x1, tpidr_el3 95*add40351SSoby Mathew ldr x0, [x1, #CPU_DATA_CPU_OPS_PTR] 96*add40351SSoby Mathew#if ASM_ASSERTION 97*add40351SSoby Mathew cmp x0, #0 98*add40351SSoby Mathew ASM_ASSERT(ne) 99*add40351SSoby Mathew#endif 100*add40351SSoby Mathew 101*add40351SSoby Mathew /* Get the cpu_ops cluster_pwr_dwn handler */ 102*add40351SSoby Mathew ldr x1, [x0, #CPU_PWR_DWN_CLUSTER] 103*add40351SSoby Mathew br x1 104*add40351SSoby Mathew 105*add40351SSoby Mathew 106*add40351SSoby Mathew /* 107*add40351SSoby Mathew * Initializes the cpu_ops_ptr if not already initialized 108*add40351SSoby Mathew * in cpu_data. This can be called without a runtime stack. 109*add40351SSoby Mathew * clobbers: x0 - x6, x10 110*add40351SSoby Mathew */ 111*add40351SSoby Mathew .globl init_cpu_ops 112*add40351SSoby Mathewfunc init_cpu_ops 113*add40351SSoby Mathew mrs x6, tpidr_el3 114*add40351SSoby Mathew ldr x0, [x6, #CPU_DATA_CPU_OPS_PTR] 115*add40351SSoby Mathew cbnz x0, 1f 116*add40351SSoby Mathew mov x10, x30 117*add40351SSoby Mathew bl get_cpu_ops_ptr 118*add40351SSoby Mathew#if ASM_ASSERTION 119*add40351SSoby Mathew cmp x0, #0 120*add40351SSoby Mathew ASM_ASSERT(ne) 121*add40351SSoby Mathew#endif 122*add40351SSoby Mathew str x0, [x6, #CPU_DATA_CPU_OPS_PTR] 123*add40351SSoby Mathew mov x30, x10 124*add40351SSoby Mathew1: 125*add40351SSoby Mathew ret 126*add40351SSoby Mathew#endif /* IMAGE_BL31 */ 127*add40351SSoby Mathew 1289b476841SSoby Mathew /* 1299b476841SSoby Mathew * The below function returns the cpu_ops structure matching the 1309b476841SSoby Mathew * midr of the core. It reads the MIDR_EL1 and finds the matching 1319b476841SSoby Mathew * entry in cpu_ops entries. Only the implementation and part number 1329b476841SSoby Mathew * are used to match the entries. 1339b476841SSoby Mathew * Return : 1349b476841SSoby Mathew * x0 - The matching cpu_ops pointer on Success 1359b476841SSoby Mathew * x0 - 0 on failure. 1369b476841SSoby Mathew * Clobbers : x0 - x5 1379b476841SSoby Mathew */ 1389b476841SSoby Mathew .globl get_cpu_ops_ptr 1399b476841SSoby Mathewfunc get_cpu_ops_ptr 1409b476841SSoby Mathew /* Get the cpu_ops start and end locations */ 1419b476841SSoby Mathew adr x4, (__CPU_OPS_START__ + CPU_MIDR) 1429b476841SSoby Mathew adr x5, (__CPU_OPS_END__ + CPU_MIDR) 1439b476841SSoby Mathew 1449b476841SSoby Mathew /* Initialize the return parameter */ 1459b476841SSoby Mathew mov x0, #0 1469b476841SSoby Mathew 1479b476841SSoby Mathew /* Read the MIDR_EL1 */ 1489b476841SSoby Mathew mrs x2, midr_el1 1499b476841SSoby Mathew mov_imm x3, CPU_IMPL_PN_MASK 1509b476841SSoby Mathew 1519b476841SSoby Mathew /* Retain only the implementation and part number using mask */ 1529b476841SSoby Mathew and w2, w2, w3 1539b476841SSoby Mathew1: 1549b476841SSoby Mathew /* Check if we have reached end of list */ 1559b476841SSoby Mathew cmp x4, x5 1569b476841SSoby Mathew b.eq error_exit 1579b476841SSoby Mathew 1589b476841SSoby Mathew /* load the midr from the cpu_ops */ 1599b476841SSoby Mathew ldr x1, [x4], #CPU_OPS_SIZE 1609b476841SSoby Mathew and w1, w1, w3 1619b476841SSoby Mathew 1629b476841SSoby Mathew /* Check if midr matches to midr of this core */ 1639b476841SSoby Mathew cmp w1, w2 1649b476841SSoby Mathew b.ne 1b 1659b476841SSoby Mathew 1669b476841SSoby Mathew /* Subtract the increment and offset to get the cpu-ops pointer */ 1679b476841SSoby Mathew sub x0, x4, #(CPU_OPS_SIZE + CPU_MIDR) 1689b476841SSoby Mathewerror_exit: 1699b476841SSoby Mathew ret 170