1*656500f9SGovindraj Raja/* 2*656500f9SGovindraj Raja * Copyright (c) 2025, Arm Limited. All rights reserved. 3*656500f9SGovindraj Raja * 4*656500f9SGovindraj Raja * SPDX-License-Identifier: BSD-3-Clause 5*656500f9SGovindraj Raja */ 6*656500f9SGovindraj Raja 7*656500f9SGovindraj Raja#include <arch.h> 8*656500f9SGovindraj Raja#include <asm_macros.S> 9*656500f9SGovindraj Raja#include <common/bl_common.h> 10*656500f9SGovindraj Raja#include <caddo.h> 11*656500f9SGovindraj Raja#include <cpu_macros.S> 12*656500f9SGovindraj Raja#include <plat_macros.S> 13*656500f9SGovindraj Raja 14*656500f9SGovindraj Raja/* Hardware handled coherency */ 15*656500f9SGovindraj Raja#if HW_ASSISTED_COHERENCY == 0 16*656500f9SGovindraj Raja#error "Caddo must be compiled with HW_ASSISTED_COHERENCY enabled" 17*656500f9SGovindraj Raja#endif 18*656500f9SGovindraj Raja 19*656500f9SGovindraj Raja/* 64-bit only core */ 20*656500f9SGovindraj Raja#if CTX_INCLUDE_AARCH32_REGS == 1 21*656500f9SGovindraj Raja#error "Caddo supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0" 22*656500f9SGovindraj Raja#endif 23*656500f9SGovindraj Raja 24*656500f9SGovindraj Raja#if ERRATA_SME_POWER_DOWN == 0 25*656500f9SGovindraj Raja#error "Caddo needs ERRATA_SME_POWER_DOWN=1 to powerdown correctly" 26*656500f9SGovindraj Raja#endif 27*656500f9SGovindraj Raja 28*656500f9SGovindraj Rajacpu_reset_prologue caddo 29*656500f9SGovindraj Raja 30*656500f9SGovindraj Rajacpu_reset_func_start caddo 31*656500f9SGovindraj Raja /* ---------------------------------------------------- 32*656500f9SGovindraj Raja * Disable speculative loads 33*656500f9SGovindraj Raja * ---------------------------------------------------- 34*656500f9SGovindraj Raja */ 35*656500f9SGovindraj Raja msr SSBS, xzr 36*656500f9SGovindraj Rajacpu_reset_func_end caddo 37*656500f9SGovindraj Raja 38*656500f9SGovindraj Rajafunc caddo_core_pwr_dwn 39*656500f9SGovindraj Raja /* --------------------------------------------------- 40*656500f9SGovindraj Raja * Flip CPU power down bit in power control register. 41*656500f9SGovindraj Raja * It will be set on powerdown and cleared on wakeup 42*656500f9SGovindraj Raja * --------------------------------------------------- 43*656500f9SGovindraj Raja */ 44*656500f9SGovindraj Raja sysreg_bit_toggle CADDO_IMP_CPUPWRCTLR_EL1, \ 45*656500f9SGovindraj Raja CADDO_IMP_CPUPWRCTLR_EL1_CORE_PWRDN_EN_BIT 46*656500f9SGovindraj Raja isb 47*656500f9SGovindraj Raja signal_pabandon_handled 48*656500f9SGovindraj Raja ret 49*656500f9SGovindraj Rajaendfunc caddo_core_pwr_dwn 50*656500f9SGovindraj Raja 51*656500f9SGovindraj Raja.section .rodata.caddo_regs, "aS" 52*656500f9SGovindraj Rajacaddo_regs: /* The ASCII list of register names to be reported */ 53*656500f9SGovindraj Raja .asciz "cpuectlr_el1", "" 54*656500f9SGovindraj Raja 55*656500f9SGovindraj Rajafunc caddo_cpu_reg_dump 56*656500f9SGovindraj Raja adr x6, caddo_regs 57*656500f9SGovindraj Raja mrs x8, CADDO_IMP_CPUECTLR_EL1 58*656500f9SGovindraj Raja ret 59*656500f9SGovindraj Rajaendfunc caddo_cpu_reg_dump 60*656500f9SGovindraj Raja 61*656500f9SGovindraj Rajadeclare_cpu_ops caddo, CADDO_MIDR, \ 62*656500f9SGovindraj Raja caddo_reset_func, \ 63*656500f9SGovindraj Raja caddo_core_pwr_dwn 64