xref: /rk3399_ARM-atf/lib/cpus/aarch64/aem_generic.S (revision add403514d0f792b9df3c81006cd9a9395b213f6)
19b476841SSoby Mathew/*
29b476841SSoby Mathew * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
39b476841SSoby Mathew *
49b476841SSoby Mathew * Redistribution and use in source and binary forms, with or without
59b476841SSoby Mathew * modification, are permitted provided that the following conditions are met:
69b476841SSoby Mathew *
79b476841SSoby Mathew * Redistributions of source code must retain the above copyright notice, this
89b476841SSoby Mathew * list of conditions and the following disclaimer.
99b476841SSoby Mathew *
109b476841SSoby Mathew * Redistributions in binary form must reproduce the above copyright notice,
119b476841SSoby Mathew * this list of conditions and the following disclaimer in the documentation
129b476841SSoby Mathew * and/or other materials provided with the distribution.
139b476841SSoby Mathew *
149b476841SSoby Mathew * Neither the name of ARM nor the names of its contributors may be used
159b476841SSoby Mathew * to endorse or promote products derived from this software without specific
169b476841SSoby Mathew * prior written permission.
179b476841SSoby Mathew *
189b476841SSoby Mathew * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
199b476841SSoby Mathew * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
209b476841SSoby Mathew * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
219b476841SSoby Mathew * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
229b476841SSoby Mathew * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
239b476841SSoby Mathew * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
249b476841SSoby Mathew * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
259b476841SSoby Mathew * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
269b476841SSoby Mathew * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
279b476841SSoby Mathew * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
289b476841SSoby Mathew * POSSIBILITY OF SUCH DAMAGE.
299b476841SSoby Mathew */
30*add40351SSoby Mathew#include <aem_generic.h>
319b476841SSoby Mathew#include <arch.h>
329b476841SSoby Mathew#include <asm_macros.S>
339b476841SSoby Mathew#include <cpu_macros.S>
349b476841SSoby Mathew
35*add40351SSoby Mathewfunc aem_generic_core_pwr_dwn
36*add40351SSoby Mathew	/* ---------------------------------------------
37*add40351SSoby Mathew	 * Disable the Data Cache.
38*add40351SSoby Mathew	 * ---------------------------------------------
39*add40351SSoby Mathew	 */
40*add40351SSoby Mathew	mrs	x1, sctlr_el3
41*add40351SSoby Mathew	bic	x1, x1, #SCTLR_C_BIT
42*add40351SSoby Mathew	msr	sctlr_el3, x1
43*add40351SSoby Mathew	isb
449b476841SSoby Mathew
45*add40351SSoby Mathew	mov	x0, #DCCISW
46*add40351SSoby Mathew
47*add40351SSoby Mathew	/* ---------------------------------------------
48*add40351SSoby Mathew	 * Flush L1 cache to PoU.
49*add40351SSoby Mathew	 * ---------------------------------------------
50*add40351SSoby Mathew	 */
51*add40351SSoby Mathew	b	dcsw_op_louis
529b476841SSoby Mathew
539b476841SSoby Mathew
54*add40351SSoby Mathewfunc aem_generic_cluster_pwr_dwn
55*add40351SSoby Mathew	/* ---------------------------------------------
56*add40351SSoby Mathew	 * Disable the Data Cache.
57*add40351SSoby Mathew	 * ---------------------------------------------
58*add40351SSoby Mathew	 */
59*add40351SSoby Mathew	mrs	x1, sctlr_el3
60*add40351SSoby Mathew	bic	x1, x1, #SCTLR_C_BIT
61*add40351SSoby Mathew	msr	sctlr_el3, x1
62*add40351SSoby Mathew	isb
63*add40351SSoby Mathew
64*add40351SSoby Mathew	/* ---------------------------------------------
65*add40351SSoby Mathew	 * Flush L1 and L2 caches to PoC.
66*add40351SSoby Mathew	 * ---------------------------------------------
67*add40351SSoby Mathew	 */
68*add40351SSoby Mathew	mov	x0, #DCCISW
69*add40351SSoby Mathew	b	dcsw_op_all
70*add40351SSoby Mathew
71*add40351SSoby Mathew
72*add40351SSoby Mathew/* cpu_ops for Base AEM FVP */
739b476841SSoby Mathewdeclare_cpu_ops aem_generic, BASE_AEM_MIDR, 1
749b476841SSoby Mathew
75*add40351SSoby Mathew/* cpu_ops for Foundation FVP */
769b476841SSoby Mathewdeclare_cpu_ops aem_generic, FOUNDATION_AEM_MIDR, 1
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