1/* 2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31#include <arch.h> 32#include <asm_macros.S> 33#include <assert_macros.S> 34#include <cpu_data.h> 35#include <cpu_macros.S> 36 37 /* 38 * The reset handler common to all platforms. After a matching 39 * cpu_ops structure entry is found, the correponding reset_handler 40 * in the cpu_ops is invoked. The reset handler is invoked very early 41 * in the boot sequence and it is assumed that we can clobber r0 - r10 42 * without the need to follow AAPCS. 43 * Clobbers: r0 - r10 44 */ 45 .globl reset_handler 46func reset_handler 47 mov r10, lr 48 49 /* The plat_reset_handler can clobber r0 - r9 */ 50 bl plat_reset_handler 51 52 /* Get the matching cpu_ops pointer (clobbers: r0 - r5) */ 53 bl get_cpu_ops_ptr 54 55#if ASM_ASSERTION 56 cmp r0, #0 57 ASM_ASSERT(ne) 58#endif 59 60 /* Get the cpu_ops reset handler */ 61 ldr r1, [r0, #CPU_RESET_FUNC] 62 cmp r1, #0 63 mov lr, r10 64 bxne r1 65 bx lr 66endfunc reset_handler 67 68 /* 69 * The prepare core power down function for all platforms. After 70 * the cpu_ops pointer is retrieved from cpu_data, the corresponding 71 * pwr_dwn_core in the cpu_ops is invoked. Follows AAPCS. 72 */ 73 .globl prepare_core_pwr_dwn 74func prepare_core_pwr_dwn 75 push {lr} 76 bl _cpu_data 77 pop {lr} 78 79 ldr r1, [r0, #CPU_DATA_CPU_OPS_PTR] 80#if ASM_ASSERTION 81 cmp r1, #0 82 ASM_ASSERT(ne) 83#endif 84 85 /* Get the cpu_ops core_pwr_dwn handler */ 86 ldr r0, [r1, #CPU_PWR_DWN_CORE] 87 bx r0 88endfunc prepare_core_pwr_dwn 89 90 /* 91 * The prepare cluster power down function for all platforms. After 92 * the cpu_ops pointer is retrieved from cpu_data, the corresponding 93 * pwr_dwn_cluster in the cpu_ops is invoked. Follows AAPCS. 94 */ 95 .globl prepare_cluster_pwr_dwn 96func prepare_cluster_pwr_dwn 97 push {lr} 98 bl _cpu_data 99 pop {lr} 100 101 ldr r1, [r0, #CPU_DATA_CPU_OPS_PTR] 102#if ASM_ASSERTION 103 cmp r1, #0 104 ASM_ASSERT(ne) 105#endif 106 107 /* Get the cpu_ops cluster_pwr_dwn handler */ 108 ldr r0, [r1, #CPU_PWR_DWN_CLUSTER] 109 bx r0 110endfunc prepare_cluster_pwr_dwn 111 112 /* 113 * Initializes the cpu_ops_ptr if not already initialized 114 * in cpu_data. This must only be called after the data cache 115 * is enabled. AAPCS is followed. 116 */ 117 .globl init_cpu_ops 118func init_cpu_ops 119 push {r4 - r6, lr} 120 bl _cpu_data 121 mov r6, r0 122 ldr r1, [r0, #CPU_DATA_CPU_OPS_PTR] 123 cmp r1, #0 124 bne 1f 125 bl get_cpu_ops_ptr 126#if ASM_ASSERTION 127 cmp r0, #0 128 ASM_ASSERT(ne) 129#endif 130 str r0, [r6, #CPU_DATA_CPU_OPS_PTR]! 1311: 132 pop {r4 - r6, pc} 133endfunc init_cpu_ops 134 135 /* 136 * The below function returns the cpu_ops structure matching the 137 * midr of the core. It reads the MIDR and finds the matching 138 * entry in cpu_ops entries. Only the implementation and part number 139 * are used to match the entries. 140 * Return : 141 * r0 - The matching cpu_ops pointer on Success 142 * r0 - 0 on failure. 143 * Clobbers: r0 - r5 144 */ 145 .globl get_cpu_ops_ptr 146func get_cpu_ops_ptr 147 /* Get the cpu_ops start and end locations */ 148 ldr r4, =(__CPU_OPS_START__ + CPU_MIDR) 149 ldr r5, =(__CPU_OPS_END__ + CPU_MIDR) 150 151 /* Initialize the return parameter */ 152 mov r0, #0 153 154 /* Read the MIDR_EL1 */ 155 ldcopr r2, MIDR 156 ldr r3, =CPU_IMPL_PN_MASK 157 158 /* Retain only the implementation and part number using mask */ 159 and r2, r2, r3 1601: 161 /* Check if we have reached end of list */ 162 cmp r4, r5 163 bge error_exit 164 165 /* load the midr from the cpu_ops */ 166 ldr r1, [r4], #CPU_OPS_SIZE 167 and r1, r1, r3 168 169 /* Check if midr matches to midr of this core */ 170 cmp r1, r2 171 bne 1b 172 173 /* Subtract the increment and offset to get the cpu-ops pointer */ 174 sub r0, r4, #(CPU_OPS_SIZE + CPU_MIDR) 175error_exit: 176 bx lr 177endfunc get_cpu_ops_ptr 178