xref: /rk3399_ARM-atf/lib/cpus/aarch32/aem_generic.S (revision 044bb2faabd7981af4ef419e1037fec28e5b3f8b)
1e33b78a6SSoby Mathew/*
2*044bb2faSAntonio Nino Diaz * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
3e33b78a6SSoby Mathew *
4e33b78a6SSoby Mathew * Redistribution and use in source and binary forms, with or without
5e33b78a6SSoby Mathew * modification, are permitted provided that the following conditions are met:
6e33b78a6SSoby Mathew *
7e33b78a6SSoby Mathew * Redistributions of source code must retain the above copyright notice, this
8e33b78a6SSoby Mathew * list of conditions and the following disclaimer.
9e33b78a6SSoby Mathew *
10e33b78a6SSoby Mathew * Redistributions in binary form must reproduce the above copyright notice,
11e33b78a6SSoby Mathew * this list of conditions and the following disclaimer in the documentation
12e33b78a6SSoby Mathew * and/or other materials provided with the distribution.
13e33b78a6SSoby Mathew *
14e33b78a6SSoby Mathew * Neither the name of ARM nor the names of its contributors may be used
15e33b78a6SSoby Mathew * to endorse or promote products derived from this software without specific
16e33b78a6SSoby Mathew * prior written permission.
17e33b78a6SSoby Mathew *
18e33b78a6SSoby Mathew * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19e33b78a6SSoby Mathew * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20e33b78a6SSoby Mathew * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21e33b78a6SSoby Mathew * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22e33b78a6SSoby Mathew * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23e33b78a6SSoby Mathew * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24e33b78a6SSoby Mathew * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25e33b78a6SSoby Mathew * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26e33b78a6SSoby Mathew * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27e33b78a6SSoby Mathew * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28e33b78a6SSoby Mathew * POSSIBILITY OF SUCH DAMAGE.
29e33b78a6SSoby Mathew */
30e33b78a6SSoby Mathew#include <aem_generic.h>
31e33b78a6SSoby Mathew#include <arch.h>
32e33b78a6SSoby Mathew#include <asm_macros.S>
33e33b78a6SSoby Mathew#include <assert_macros.S>
34e33b78a6SSoby Mathew#include <cpu_macros.S>
35e33b78a6SSoby Mathew
36e33b78a6SSoby Mathewfunc aem_generic_core_pwr_dwn
37e33b78a6SSoby Mathew	/* Assert if cache is enabled */
38*044bb2faSAntonio Nino Diaz#if ENABLE_ASSERTIONS
39e33b78a6SSoby Mathew	ldcopr	r0, SCTLR
40e33b78a6SSoby Mathew	tst	r0, #SCTLR_C_BIT
41e33b78a6SSoby Mathew	ASM_ASSERT(eq)
42e33b78a6SSoby Mathew#endif
43e33b78a6SSoby Mathew	/* ---------------------------------------------
44e33b78a6SSoby Mathew	 * Flush L1 cache to PoU.
45e33b78a6SSoby Mathew	 * ---------------------------------------------
46e33b78a6SSoby Mathew	 */
47e33b78a6SSoby Mathew	mov	r0, #DC_OP_CISW
48e33b78a6SSoby Mathew	b	dcsw_op_louis
49e33b78a6SSoby Mathewendfunc aem_generic_core_pwr_dwn
50e33b78a6SSoby Mathew
51e33b78a6SSoby Mathew
52e33b78a6SSoby Mathewfunc aem_generic_cluster_pwr_dwn
53e33b78a6SSoby Mathew	/* Assert if cache is enabled */
54*044bb2faSAntonio Nino Diaz#if ENABLE_ASSERTIONS
55e33b78a6SSoby Mathew	ldcopr	r0, SCTLR
56e33b78a6SSoby Mathew	tst	r0, #SCTLR_C_BIT
57e33b78a6SSoby Mathew	ASM_ASSERT(eq)
58e33b78a6SSoby Mathew#endif
59e33b78a6SSoby Mathew	/* ---------------------------------------------
60e33b78a6SSoby Mathew	 * Flush L1 and L2 caches to PoC.
61e33b78a6SSoby Mathew	 * ---------------------------------------------
62e33b78a6SSoby Mathew	 */
63e33b78a6SSoby Mathew	mov	r0, #DC_OP_CISW
64e33b78a6SSoby Mathew	b	dcsw_op_all
65e33b78a6SSoby Mathewendfunc aem_generic_cluster_pwr_dwn
66e33b78a6SSoby Mathew
67e33b78a6SSoby Mathew/* cpu_ops for Base AEM FVP */
685dd9dbb5SJeenu Viswambharandeclare_cpu_ops aem_generic, BASE_AEM_MIDR, CPU_NO_RESET_FUNC, \
695dd9dbb5SJeenu Viswambharan	aem_generic_core_pwr_dwn, \
705dd9dbb5SJeenu Viswambharan	aem_generic_cluster_pwr_dwn
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