1*d801fbb0Sdp-arm# 2*d801fbb0Sdp-arm# Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3*d801fbb0Sdp-arm# 4*d801fbb0Sdp-arm# Redistribution and use in source and binary forms, with or without 5*d801fbb0Sdp-arm# modification, are permitted provided that the following conditions are met: 6*d801fbb0Sdp-arm# 7*d801fbb0Sdp-arm# Redistributions of source code must retain the above copyright notice, this 8*d801fbb0Sdp-arm# list of conditions and the following disclaimer. 9*d801fbb0Sdp-arm# 10*d801fbb0Sdp-arm# Redistributions in binary form must reproduce the above copyright notice, 11*d801fbb0Sdp-arm# this list of conditions and the following disclaimer in the documentation 12*d801fbb0Sdp-arm# and/or other materials provided with the distribution. 13*d801fbb0Sdp-arm# 14*d801fbb0Sdp-arm# Neither the name of ARM nor the names of its contributors may be used 15*d801fbb0Sdp-arm# to endorse or promote products derived from this software without specific 16*d801fbb0Sdp-arm# prior written permission. 17*d801fbb0Sdp-arm# 18*d801fbb0Sdp-arm# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19*d801fbb0Sdp-arm# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20*d801fbb0Sdp-arm# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21*d801fbb0Sdp-arm# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22*d801fbb0Sdp-arm# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23*d801fbb0Sdp-arm# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24*d801fbb0Sdp-arm# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25*d801fbb0Sdp-arm# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26*d801fbb0Sdp-arm# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27*d801fbb0Sdp-arm# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28*d801fbb0Sdp-arm# POSSIBILITY OF SUCH DAMAGE. 29*d801fbb0Sdp-arm# 30*d801fbb0Sdp-arm 31*d801fbb0Sdp-armifeq (${ARCH},aarch32) 32*d801fbb0Sdp-armCOMPILER_RT_SRCS := lib/compiler-rt/builtins/arm/aeabi_uldivmod.S \ 33*d801fbb0Sdp-arm lib/compiler-rt/builtins/udivmoddi4.c 34*d801fbb0Sdp-armendif 35