1 #ifndef __ODY_CSRS_TAD_CMN_H__
2 #define __ODY_CSRS_TAD_CMN_H__
3 /* This file is auto-generated. Do not edit */
4
5 /***********************license start***********************************
6 * Copyright (C) 2021-2026 Marvell.
7 * SPDX-License-Identifier: BSD-3-Clause
8 * https://spdx.org/licenses
9 ***********************license end**************************************/
10
11
12 /**
13 * @file
14 *
15 * Configuration and status register (CSR) address and type definitions for
16 * TAD_CMN.
17 *
18 * This file is auto generated. Do not edit.
19 *
20 */
21
22 /**
23 * Enumeration tad_cmn_bar_e
24 *
25 * TAD Common Base Address Register Enumeration
26 * Enumerates the base address registers.
27 */
28 #define ODY_TAD_CMN_BAR_E_TAD_CMN_PF_BAR0 (0x87e053000000ll)
29 #define ODY_TAD_CMN_BAR_E_TAD_CMN_PF_BAR0_SIZE 0x100000ull
30
31 /**
32 * Enumeration tad_cmn_mpam_err_e
33 *
34 * MPAM Error Code Enumeration
35 * Error codes to be reported in MPAMF_ESR (if TAD_CMN_MPAMF_IDR_NS/S[HAS_ESR]==1)
36 */
37 #define ODY_TAD_CMN_MPAM_ERR_E_INTPARTID_RANGE (6)
38 #define ODY_TAD_CMN_MPAM_ERR_E_MONITOR_RANGE (5)
39 #define ODY_TAD_CMN_MPAM_ERR_E_MSMONCFG_ID_RANGE (3)
40 #define ODY_TAD_CMN_MPAM_ERR_E_NO_ERROR (0)
41 #define ODY_TAD_CMN_MPAM_ERR_E_PARTID_SEL_RANGE (1)
42 #define ODY_TAD_CMN_MPAM_ERR_E_REQ_PARTID_RANGE (2)
43 #define ODY_TAD_CMN_MPAM_ERR_E_REQ_PMG_RANGE (4)
44 #define ODY_TAD_CMN_MPAM_ERR_E_RESERVED_ERRCODE_12 (0xc)
45 #define ODY_TAD_CMN_MPAM_ERR_E_RESERVED_ERRCODE_13 (0xd)
46 #define ODY_TAD_CMN_MPAM_ERR_E_RESERVED_ERRCODE_14 (0xe)
47 #define ODY_TAD_CMN_MPAM_ERR_E_RESERVED_ERRCODE_15 (0xf)
48 #define ODY_TAD_CMN_MPAM_ERR_E_RIS_NO_CONTROL (9)
49 #define ODY_TAD_CMN_MPAM_ERR_E_RIS_NO_MONITOR (0xb)
50 #define ODY_TAD_CMN_MPAM_ERR_E_UNDEFINED_RIS_MON_SEL (0xa)
51 #define ODY_TAD_CMN_MPAM_ERR_E_UNDEFINED_RIS_PART_SEL (8)
52 #define ODY_TAD_CMN_MPAM_ERR_E_UNEXPECTED_INTERNAL (7)
53
54 /**
55 * Enumeration tad_cmn_mpam_ris_e
56 *
57 * MPAM Resource Instance Enumeration
58 * Resource instances
59 */
60 #define ODY_TAD_CMN_MPAM_RIS_E_DTG (2)
61 #define ODY_TAD_CMN_MPAM_RIS_E_LTG (1)
62 #define ODY_TAD_CMN_MPAM_RIS_E_MSC (0)
63
64 /**
65 * Register (RSL) tad_cmn_cache_flush
66 *
67 * TAD Common Cache Flush Register
68 * Controls TAD cache flush behavior.
69 */
70 union ody_tad_cmn_cache_flush {
71 uint64_t u;
72 struct ody_tad_cmn_cache_flush_s {
73 uint64_t start : 1;
74 uint64_t flush_type : 2;
75 uint64_t reserved_3_20 : 18;
76 uint64_t noltg : 1;
77 uint64_t nodtg : 1;
78 uint64_t reserved_23_63 : 41;
79 } s;
80 /* struct ody_tad_cmn_cache_flush_s cn; */
81 };
82 typedef union ody_tad_cmn_cache_flush ody_tad_cmn_cache_flush_t;
83
84 #define ODY_TAD_CMN_CACHE_FLUSH ODY_TAD_CMN_CACHE_FLUSH_FUNC()
85 static inline uint64_t ODY_TAD_CMN_CACHE_FLUSH_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_CACHE_FLUSH_FUNC(void)86 static inline uint64_t ODY_TAD_CMN_CACHE_FLUSH_FUNC(void)
87 {
88 return 0x87e053000010ll;
89 }
90
91 #define typedef_ODY_TAD_CMN_CACHE_FLUSH ody_tad_cmn_cache_flush_t
92 #define bustype_ODY_TAD_CMN_CACHE_FLUSH CSR_TYPE_RSL
93 #define basename_ODY_TAD_CMN_CACHE_FLUSH "TAD_CMN_CACHE_FLUSH"
94 #define device_bar_ODY_TAD_CMN_CACHE_FLUSH 0x0 /* PF_BAR0 */
95 #define busnum_ODY_TAD_CMN_CACHE_FLUSH 0
96 #define arguments_ODY_TAD_CMN_CACHE_FLUSH -1, -1, -1, -1
97
98 /**
99 * Register (RSL) tad_cmn_cbusy
100 *
101 * TAD Common CBUSY Control Register
102 * Controls CBUSY behavior.
103 */
104 union ody_tad_cmn_cbusy {
105 uint64_t u;
106 struct ody_tad_cmn_cbusy_s {
107 uint64_t tad_cbusy_en : 2;
108 uint64_t ddr_cbusy_en : 2;
109 uint64_t tad_cbusy0_free_trsh : 7;
110 uint64_t tad_cbusy0_busy_trsh : 7;
111 uint64_t tad_cbusy1_free_trsh : 7;
112 uint64_t tad_cbusy1_busy_trsh : 7;
113 uint64_t ddr_timeout : 32;
114 } s;
115 /* struct ody_tad_cmn_cbusy_s cn; */
116 };
117 typedef union ody_tad_cmn_cbusy ody_tad_cmn_cbusy_t;
118
119 #define ODY_TAD_CMN_CBUSY ODY_TAD_CMN_CBUSY_FUNC()
120 static inline uint64_t ODY_TAD_CMN_CBUSY_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_CBUSY_FUNC(void)121 static inline uint64_t ODY_TAD_CMN_CBUSY_FUNC(void)
122 {
123 return 0x87e053000020ll;
124 }
125
126 #define typedef_ODY_TAD_CMN_CBUSY ody_tad_cmn_cbusy_t
127 #define bustype_ODY_TAD_CMN_CBUSY CSR_TYPE_RSL
128 #define basename_ODY_TAD_CMN_CBUSY "TAD_CMN_CBUSY"
129 #define device_bar_ODY_TAD_CMN_CBUSY 0x0 /* PF_BAR0 */
130 #define busnum_ODY_TAD_CMN_CBUSY 0
131 #define arguments_ODY_TAD_CMN_CBUSY -1, -1, -1, -1
132
133 /**
134 * Register (RSL) tad_cmn_const
135 *
136 * TAD Constants Register
137 * This register contains TAD constants for software discovery.
138 */
139 union ody_tad_cmn_const {
140 uint64_t u;
141 struct ody_tad_cmn_const_s {
142 uint64_t num_cols : 4;
143 uint64_t num_rows : 4;
144 uint64_t num_tads : 8;
145 uint64_t ltgsets : 12;
146 uint64_t ltgways : 8;
147 uint64_t dtgsets : 12;
148 uint64_t dtgways : 8;
149 uint64_t reserved_56_63 : 8;
150 } s;
151 /* struct ody_tad_cmn_const_s cn; */
152 };
153 typedef union ody_tad_cmn_const ody_tad_cmn_const_t;
154
155 #define ODY_TAD_CMN_CONST ODY_TAD_CMN_CONST_FUNC()
156 static inline uint64_t ODY_TAD_CMN_CONST_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_CONST_FUNC(void)157 static inline uint64_t ODY_TAD_CMN_CONST_FUNC(void)
158 {
159 return 0x87e053000028ll;
160 }
161
162 #define typedef_ODY_TAD_CMN_CONST ody_tad_cmn_const_t
163 #define bustype_ODY_TAD_CMN_CONST CSR_TYPE_RSL
164 #define basename_ODY_TAD_CMN_CONST "TAD_CMN_CONST"
165 #define device_bar_ODY_TAD_CMN_CONST 0x0 /* PF_BAR0 */
166 #define busnum_ODY_TAD_CMN_CONST 0
167 #define arguments_ODY_TAD_CMN_CONST -1, -1, -1, -1
168
169 /**
170 * Register (RSL) tad_cmn_ctl
171 *
172 * TAD Common Control Register
173 * Controls TAD behavior.
174 */
175 union ody_tad_cmn_ctl {
176 uint64_t u;
177 struct ody_tad_cmn_ctl_s {
178 uint64_t frcnalc : 1;
179 uint64_t disdwt : 1;
180 uint64_t disdct : 1;
181 uint64_t disdmt : 1;
182 uint64_t dispsn : 1;
183 uint64_t discor : 1;
184 uint64_t reserved_6_7 : 2;
185 uint64_t maxifb : 5;
186 uint64_t dismultmpam : 1;
187 uint64_t disearlydq : 1;
188 uint64_t iobchiso : 1;
189 uint64_t distagscrub : 1;
190 uint64_t disexmsysevent : 1;
191 uint64_t enaexmpocevent : 1;
192 uint64_t row_bcst_thresh : 4;
193 uint64_t mpam_upd_wr : 1;
194 uint64_t reserved_24_44 : 21;
195 uint64_t omon_cclk_dis : 1;
196 uint64_t chn_cclk_dis : 1;
197 uint64_t mn_cclk_dis : 1;
198 uint64_t req_cclk_dis : 1;
199 uint64_t sam_cclk_dis : 1;
200 uint64_t lnk_rx_cclk_dis : 1;
201 uint64_t lnk_tx_cclk_dis : 1;
202 uint64_t csr_cclk_dis : 1;
203 uint64_t rxtbl_cclk_dis : 1;
204 uint64_t txreq_cclk_dis : 1;
205 uint64_t txsnp_cclk_dis : 1;
206 uint64_t snp_cclk_dis : 1;
207 uint64_t rsp_cclk_dis : 1;
208 uint64_t dat_cclk_dis : 1;
209 uint64_t ctldat_cclk_dis : 1;
210 uint64_t dtg_cclk_dis : 1;
211 uint64_t ltg_cclk_dis : 1;
212 uint64_t tag_cclk_dis : 1;
213 uint64_t cclk_dis : 1;
214 } s;
215 struct ody_tad_cmn_ctl_cn {
216 uint64_t frcnalc : 1;
217 uint64_t disdwt : 1;
218 uint64_t disdct : 1;
219 uint64_t disdmt : 1;
220 uint64_t dispsn : 1;
221 uint64_t discor : 1;
222 uint64_t reserved_6 : 1;
223 uint64_t reserved_7 : 1;
224 uint64_t maxifb : 5;
225 uint64_t dismultmpam : 1;
226 uint64_t disearlydq : 1;
227 uint64_t iobchiso : 1;
228 uint64_t distagscrub : 1;
229 uint64_t disexmsysevent : 1;
230 uint64_t enaexmpocevent : 1;
231 uint64_t row_bcst_thresh : 4;
232 uint64_t mpam_upd_wr : 1;
233 uint64_t reserved_24_44 : 21;
234 uint64_t omon_cclk_dis : 1;
235 uint64_t chn_cclk_dis : 1;
236 uint64_t mn_cclk_dis : 1;
237 uint64_t req_cclk_dis : 1;
238 uint64_t sam_cclk_dis : 1;
239 uint64_t lnk_rx_cclk_dis : 1;
240 uint64_t lnk_tx_cclk_dis : 1;
241 uint64_t csr_cclk_dis : 1;
242 uint64_t rxtbl_cclk_dis : 1;
243 uint64_t txreq_cclk_dis : 1;
244 uint64_t txsnp_cclk_dis : 1;
245 uint64_t snp_cclk_dis : 1;
246 uint64_t rsp_cclk_dis : 1;
247 uint64_t dat_cclk_dis : 1;
248 uint64_t ctldat_cclk_dis : 1;
249 uint64_t dtg_cclk_dis : 1;
250 uint64_t ltg_cclk_dis : 1;
251 uint64_t tag_cclk_dis : 1;
252 uint64_t cclk_dis : 1;
253 } cn;
254 };
255 typedef union ody_tad_cmn_ctl ody_tad_cmn_ctl_t;
256
257 #define ODY_TAD_CMN_CTL ODY_TAD_CMN_CTL_FUNC()
258 static inline uint64_t ODY_TAD_CMN_CTL_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_CTL_FUNC(void)259 static inline uint64_t ODY_TAD_CMN_CTL_FUNC(void)
260 {
261 return 0x87e053000008ll;
262 }
263
264 #define typedef_ODY_TAD_CMN_CTL ody_tad_cmn_ctl_t
265 #define bustype_ODY_TAD_CMN_CTL CSR_TYPE_RSL
266 #define basename_ODY_TAD_CMN_CTL "TAD_CMN_CTL"
267 #define device_bar_ODY_TAD_CMN_CTL 0x0 /* PF_BAR0 */
268 #define busnum_ODY_TAD_CMN_CTL 0
269 #define arguments_ODY_TAD_CMN_CTL -1, -1, -1, -1
270
271 /**
272 * Register (RSL) tad_cmn_mn_ctl
273 *
274 * TAD Common Miscellaneous Node Control Register
275 * Controls TAD MN (DVMOps) settings.
276 */
277 union ody_tad_cmn_mn_ctl {
278 uint64_t u;
279 struct ody_tad_cmn_mn_ctl_s {
280 uint64_t reserved_0_2 : 3;
281 uint64_t dev_ncb : 3;
282 uint64_t comp_qos : 4;
283 uint64_t snp_qos : 4;
284 uint64_t iob_has_smmu : 8;
285 uint64_t reserved_22_63 : 42;
286 } s;
287 /* struct ody_tad_cmn_mn_ctl_s cn; */
288 };
289 typedef union ody_tad_cmn_mn_ctl ody_tad_cmn_mn_ctl_t;
290
291 #define ODY_TAD_CMN_MN_CTL ODY_TAD_CMN_MN_CTL_FUNC()
292 static inline uint64_t ODY_TAD_CMN_MN_CTL_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MN_CTL_FUNC(void)293 static inline uint64_t ODY_TAD_CMN_MN_CTL_FUNC(void)
294 {
295 return 0x87e053000030ll;
296 }
297
298 #define typedef_ODY_TAD_CMN_MN_CTL ody_tad_cmn_mn_ctl_t
299 #define bustype_ODY_TAD_CMN_MN_CTL CSR_TYPE_RSL
300 #define basename_ODY_TAD_CMN_MN_CTL "TAD_CMN_MN_CTL"
301 #define device_bar_ODY_TAD_CMN_MN_CTL 0x0 /* PF_BAR0 */
302 #define busnum_ODY_TAD_CMN_MN_CTL 0
303 #define arguments_ODY_TAD_CMN_MN_CTL -1, -1, -1, -1
304
305 /**
306 * Register (RSL) tad_cmn_mpamcfg_cpbm_ns
307 *
308 * MPAM Cache Portion Bitmap Partition Configuration Register
309 * The TAD_CMN_MPAMCFG_CPBM register is a read-write register that configures the cache
310 * portions that a
311 * PARTID is allowed to allocate. After setting TAD_CMN_MPAMCFG_PART_SEL with a PARTID, software
312 * (usually a hypervisor) writes to the TAD_CMN_MPAMCFG_CPBM register to configure
313 * which cache portions
314 * the PARTID is allowed to allocate.
315 * TAD_CMN_MPAMCFG_CPBM_NS controls the cache portions for the
316 * Non-secure PARTID selected by the Non-secure instance of TAD_CMN_MPAMCFG_PART_SEL.
317 */
318 union ody_tad_cmn_mpamcfg_cpbm_ns {
319 uint64_t u;
320 struct ody_tad_cmn_mpamcfg_cpbm_ns_s {
321 uint64_t cpbm : 18;
322 uint64_t reserved_18_63 : 46;
323 } s;
324 /* struct ody_tad_cmn_mpamcfg_cpbm_ns_s cn; */
325 };
326 typedef union ody_tad_cmn_mpamcfg_cpbm_ns ody_tad_cmn_mpamcfg_cpbm_ns_t;
327
328 #define ODY_TAD_CMN_MPAMCFG_CPBM_NS ODY_TAD_CMN_MPAMCFG_CPBM_NS_FUNC()
329 static inline uint64_t ODY_TAD_CMN_MPAMCFG_CPBM_NS_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MPAMCFG_CPBM_NS_FUNC(void)330 static inline uint64_t ODY_TAD_CMN_MPAMCFG_CPBM_NS_FUNC(void)
331 {
332 return 0x87e053011000ll;
333 }
334
335 #define typedef_ODY_TAD_CMN_MPAMCFG_CPBM_NS ody_tad_cmn_mpamcfg_cpbm_ns_t
336 #define bustype_ODY_TAD_CMN_MPAMCFG_CPBM_NS CSR_TYPE_RSL
337 #define basename_ODY_TAD_CMN_MPAMCFG_CPBM_NS "TAD_CMN_MPAMCFG_CPBM_NS"
338 #define device_bar_ODY_TAD_CMN_MPAMCFG_CPBM_NS 0x0 /* PF_BAR0 */
339 #define busnum_ODY_TAD_CMN_MPAMCFG_CPBM_NS 0
340 #define arguments_ODY_TAD_CMN_MPAMCFG_CPBM_NS -1, -1, -1, -1
341
342 /**
343 * Register (RSL) tad_cmn_mpamcfg_cpbm_s
344 *
345 * Secure MPAM Cache Portion Bitmap Partition Configuration Register
346 * The TAD_CMN_MPAMCFG_CPBM register is a read-write register that configures the cache
347 * portions that a
348 * PARTID is allowed to allocate. After setting TAD_CMN_MPAMCFG_PART_SEL with a PARTID, software
349 * (usually a hypervisor) writes to the TAD_CMN_MPAMCFG_CPBM register to configure
350 * which cache portions
351 * the PARTID is allowed to allocate.
352 * TAD_CMN_MPAMCFG_CPBM_S controls cache portions for the Secure PARTID selected by the Secure
353 * instance of TAD_CMN_MPAMCFG_PART_SEL.
354 */
355 union ody_tad_cmn_mpamcfg_cpbm_s {
356 uint64_t u;
357 struct ody_tad_cmn_mpamcfg_cpbm_s_s {
358 uint64_t cpbm : 18;
359 uint64_t reserved_18_63 : 46;
360 } s;
361 /* struct ody_tad_cmn_mpamcfg_cpbm_s_s cn; */
362 };
363 typedef union ody_tad_cmn_mpamcfg_cpbm_s ody_tad_cmn_mpamcfg_cpbm_s_t;
364
365 #define ODY_TAD_CMN_MPAMCFG_CPBM_S ODY_TAD_CMN_MPAMCFG_CPBM_S_FUNC()
366 static inline uint64_t ODY_TAD_CMN_MPAMCFG_CPBM_S_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MPAMCFG_CPBM_S_FUNC(void)367 static inline uint64_t ODY_TAD_CMN_MPAMCFG_CPBM_S_FUNC(void)
368 {
369 return 0x87e053021000ll;
370 }
371
372 #define typedef_ODY_TAD_CMN_MPAMCFG_CPBM_S ody_tad_cmn_mpamcfg_cpbm_s_t
373 #define bustype_ODY_TAD_CMN_MPAMCFG_CPBM_S CSR_TYPE_RSL
374 #define basename_ODY_TAD_CMN_MPAMCFG_CPBM_S "TAD_CMN_MPAMCFG_CPBM_S"
375 #define device_bar_ODY_TAD_CMN_MPAMCFG_CPBM_S 0x0 /* PF_BAR0 */
376 #define busnum_ODY_TAD_CMN_MPAMCFG_CPBM_S 0
377 #define arguments_ODY_TAD_CMN_MPAMCFG_CPBM_S -1, -1, -1, -1
378
379 /**
380 * Register (RSL) tad_cmn_mpamcfg_impl_pri_ns
381 *
382 * MPAM Implementation-Specific Optional Priority Partitioning Configuration Register
383 * Controls the MPAM priority partitioning features of this MSC.
384 */
385 union ody_tad_cmn_mpamcfg_impl_pri_ns {
386 uint64_t u;
387 struct ody_tad_cmn_mpamcfg_impl_pri_ns_s {
388 uint64_t mpam_qos : 1;
389 uint64_t reserved_1_63 : 63;
390 } s;
391 /* struct ody_tad_cmn_mpamcfg_impl_pri_ns_s cn; */
392 };
393 typedef union ody_tad_cmn_mpamcfg_impl_pri_ns ody_tad_cmn_mpamcfg_impl_pri_ns_t;
394
395 #define ODY_TAD_CMN_MPAMCFG_IMPL_PRI_NS ODY_TAD_CMN_MPAMCFG_IMPL_PRI_NS_FUNC()
396 static inline uint64_t ODY_TAD_CMN_MPAMCFG_IMPL_PRI_NS_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MPAMCFG_IMPL_PRI_NS_FUNC(void)397 static inline uint64_t ODY_TAD_CMN_MPAMCFG_IMPL_PRI_NS_FUNC(void)
398 {
399 return 0x87e053013000ll;
400 }
401
402 #define typedef_ODY_TAD_CMN_MPAMCFG_IMPL_PRI_NS ody_tad_cmn_mpamcfg_impl_pri_ns_t
403 #define bustype_ODY_TAD_CMN_MPAMCFG_IMPL_PRI_NS CSR_TYPE_RSL
404 #define basename_ODY_TAD_CMN_MPAMCFG_IMPL_PRI_NS "TAD_CMN_MPAMCFG_IMPL_PRI_NS"
405 #define device_bar_ODY_TAD_CMN_MPAMCFG_IMPL_PRI_NS 0x0 /* PF_BAR0 */
406 #define busnum_ODY_TAD_CMN_MPAMCFG_IMPL_PRI_NS 0
407 #define arguments_ODY_TAD_CMN_MPAMCFG_IMPL_PRI_NS -1, -1, -1, -1
408
409 /**
410 * Register (RSL) tad_cmn_mpamcfg_impl_pri_s
411 *
412 * MPAM Implementation-Specific Optional Priority Partitioning Configuration Register
413 * Controls the MPAM priority partitioning features of this MSC.
414 */
415 union ody_tad_cmn_mpamcfg_impl_pri_s {
416 uint64_t u;
417 struct ody_tad_cmn_mpamcfg_impl_pri_s_s {
418 uint64_t mpam_qos : 1;
419 uint64_t reserved_1_63 : 63;
420 } s;
421 /* struct ody_tad_cmn_mpamcfg_impl_pri_s_s cn; */
422 };
423 typedef union ody_tad_cmn_mpamcfg_impl_pri_s ody_tad_cmn_mpamcfg_impl_pri_s_t;
424
425 #define ODY_TAD_CMN_MPAMCFG_IMPL_PRI_S ODY_TAD_CMN_MPAMCFG_IMPL_PRI_S_FUNC()
426 static inline uint64_t ODY_TAD_CMN_MPAMCFG_IMPL_PRI_S_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MPAMCFG_IMPL_PRI_S_FUNC(void)427 static inline uint64_t ODY_TAD_CMN_MPAMCFG_IMPL_PRI_S_FUNC(void)
428 {
429 return 0x87e053023000ll;
430 }
431
432 #define typedef_ODY_TAD_CMN_MPAMCFG_IMPL_PRI_S ody_tad_cmn_mpamcfg_impl_pri_s_t
433 #define bustype_ODY_TAD_CMN_MPAMCFG_IMPL_PRI_S CSR_TYPE_RSL
434 #define basename_ODY_TAD_CMN_MPAMCFG_IMPL_PRI_S "TAD_CMN_MPAMCFG_IMPL_PRI_S"
435 #define device_bar_ODY_TAD_CMN_MPAMCFG_IMPL_PRI_S 0x0 /* PF_BAR0 */
436 #define busnum_ODY_TAD_CMN_MPAMCFG_IMPL_PRI_S 0
437 #define arguments_ODY_TAD_CMN_MPAMCFG_IMPL_PRI_S -1, -1, -1, -1
438
439 /**
440 * Register (RSL) tad_cmn_mpamcfg_part_sel_ns
441 *
442 * MPAM Partition Configuration Selection Register
443 * Selects a partition ID to configure. TAD_CMN_MPAMCFG_PART_SEL_NS selects a Non-
444 * secure PARTID to configure.
445 * After setting this register with a PARTID, software (usually a hypervisor) can perform a series of
446 * accesses to TAD_CMN_MPAMCFG registers to configure parameters for MPAM resource
447 * controls to use when
448 * requests have that PARTID.
449 */
450 union ody_tad_cmn_mpamcfg_part_sel_ns {
451 uint64_t u;
452 struct ody_tad_cmn_mpamcfg_part_sel_ns_s {
453 uint64_t partid_sel : 16;
454 uint64_t internal : 1;
455 uint64_t reserved_17_23 : 7;
456 uint64_t ris : 4;
457 uint64_t reserved_28_63 : 36;
458 } s;
459 /* struct ody_tad_cmn_mpamcfg_part_sel_ns_s cn; */
460 };
461 typedef union ody_tad_cmn_mpamcfg_part_sel_ns ody_tad_cmn_mpamcfg_part_sel_ns_t;
462
463 #define ODY_TAD_CMN_MPAMCFG_PART_SEL_NS ODY_TAD_CMN_MPAMCFG_PART_SEL_NS_FUNC()
464 static inline uint64_t ODY_TAD_CMN_MPAMCFG_PART_SEL_NS_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MPAMCFG_PART_SEL_NS_FUNC(void)465 static inline uint64_t ODY_TAD_CMN_MPAMCFG_PART_SEL_NS_FUNC(void)
466 {
467 return 0x87e053010100ll;
468 }
469
470 #define typedef_ODY_TAD_CMN_MPAMCFG_PART_SEL_NS ody_tad_cmn_mpamcfg_part_sel_ns_t
471 #define bustype_ODY_TAD_CMN_MPAMCFG_PART_SEL_NS CSR_TYPE_RSL
472 #define basename_ODY_TAD_CMN_MPAMCFG_PART_SEL_NS "TAD_CMN_MPAMCFG_PART_SEL_NS"
473 #define device_bar_ODY_TAD_CMN_MPAMCFG_PART_SEL_NS 0x0 /* PF_BAR0 */
474 #define busnum_ODY_TAD_CMN_MPAMCFG_PART_SEL_NS 0
475 #define arguments_ODY_TAD_CMN_MPAMCFG_PART_SEL_NS -1, -1, -1, -1
476
477 /**
478 * Register (RSL) tad_cmn_mpamcfg_part_sel_s
479 *
480 * Secure MPAM Partition Configuration Selection Register
481 * Selects a partition ID to configure. TAD_CMN_MPAMCFG_PART_SEL_S selects a Secure PARTID to
482 * configure.
483 * After setting this register with a PARTID, software (usually a hypervisor) can perform a series of
484 * accesses to TAD_CMN_MPAMCFG registers to configure parameters for MPAM resource
485 * controls to use when
486 * requests have that PARTID.
487 */
488 union ody_tad_cmn_mpamcfg_part_sel_s {
489 uint64_t u;
490 struct ody_tad_cmn_mpamcfg_part_sel_s_s {
491 uint64_t partid_sel : 16;
492 uint64_t internal : 1;
493 uint64_t reserved_17_23 : 7;
494 uint64_t ris : 4;
495 uint64_t reserved_28_63 : 36;
496 } s;
497 /* struct ody_tad_cmn_mpamcfg_part_sel_s_s cn; */
498 };
499 typedef union ody_tad_cmn_mpamcfg_part_sel_s ody_tad_cmn_mpamcfg_part_sel_s_t;
500
501 #define ODY_TAD_CMN_MPAMCFG_PART_SEL_S ODY_TAD_CMN_MPAMCFG_PART_SEL_S_FUNC()
502 static inline uint64_t ODY_TAD_CMN_MPAMCFG_PART_SEL_S_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MPAMCFG_PART_SEL_S_FUNC(void)503 static inline uint64_t ODY_TAD_CMN_MPAMCFG_PART_SEL_S_FUNC(void)
504 {
505 return 0x87e053020100ll;
506 }
507
508 #define typedef_ODY_TAD_CMN_MPAMCFG_PART_SEL_S ody_tad_cmn_mpamcfg_part_sel_s_t
509 #define bustype_ODY_TAD_CMN_MPAMCFG_PART_SEL_S CSR_TYPE_RSL
510 #define basename_ODY_TAD_CMN_MPAMCFG_PART_SEL_S "TAD_CMN_MPAMCFG_PART_SEL_S"
511 #define device_bar_ODY_TAD_CMN_MPAMCFG_PART_SEL_S 0x0 /* PF_BAR0 */
512 #define busnum_ODY_TAD_CMN_MPAMCFG_PART_SEL_S 0
513 #define arguments_ODY_TAD_CMN_MPAMCFG_PART_SEL_S -1, -1, -1, -1
514
515 /**
516 * Register (RSL) tad_cmn_mpamcfg_pri_ns
517 *
518 * MPAM Priority Partition Configuration Register
519 * Controls the internal and downstream priority of requests attributed to the PARTID
520 * selected by TAD_CMN_MPAMCFG_PART_SEL_NS.
521 */
522 union ody_tad_cmn_mpamcfg_pri_ns {
523 uint64_t u;
524 struct ody_tad_cmn_mpamcfg_pri_ns_s {
525 uint64_t intpri : 16;
526 uint64_t dspri : 16;
527 uint64_t reserved_32_63 : 32;
528 } s;
529 /* struct ody_tad_cmn_mpamcfg_pri_ns_s cn; */
530 };
531 typedef union ody_tad_cmn_mpamcfg_pri_ns ody_tad_cmn_mpamcfg_pri_ns_t;
532
533 #define ODY_TAD_CMN_MPAMCFG_PRI_NS ODY_TAD_CMN_MPAMCFG_PRI_NS_FUNC()
534 static inline uint64_t ODY_TAD_CMN_MPAMCFG_PRI_NS_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MPAMCFG_PRI_NS_FUNC(void)535 static inline uint64_t ODY_TAD_CMN_MPAMCFG_PRI_NS_FUNC(void)
536 {
537 return 0x87e053010400ll;
538 }
539
540 #define typedef_ODY_TAD_CMN_MPAMCFG_PRI_NS ody_tad_cmn_mpamcfg_pri_ns_t
541 #define bustype_ODY_TAD_CMN_MPAMCFG_PRI_NS CSR_TYPE_RSL
542 #define basename_ODY_TAD_CMN_MPAMCFG_PRI_NS "TAD_CMN_MPAMCFG_PRI_NS"
543 #define device_bar_ODY_TAD_CMN_MPAMCFG_PRI_NS 0x0 /* PF_BAR0 */
544 #define busnum_ODY_TAD_CMN_MPAMCFG_PRI_NS 0
545 #define arguments_ODY_TAD_CMN_MPAMCFG_PRI_NS -1, -1, -1, -1
546
547 /**
548 * Register (RSL) tad_cmn_mpamcfg_pri_s
549 *
550 * MPAM Priority Partition Configuration Register
551 * Controls the internal and downstream priority of requests attributed to the PARTID
552 * selected by TAD_CMN_MPAMCFG_PART_SEL_S.
553 */
554 union ody_tad_cmn_mpamcfg_pri_s {
555 uint64_t u;
556 struct ody_tad_cmn_mpamcfg_pri_s_s {
557 uint64_t intpri : 16;
558 uint64_t dspri : 16;
559 uint64_t reserved_32_63 : 32;
560 } s;
561 /* struct ody_tad_cmn_mpamcfg_pri_s_s cn; */
562 };
563 typedef union ody_tad_cmn_mpamcfg_pri_s ody_tad_cmn_mpamcfg_pri_s_t;
564
565 #define ODY_TAD_CMN_MPAMCFG_PRI_S ODY_TAD_CMN_MPAMCFG_PRI_S_FUNC()
566 static inline uint64_t ODY_TAD_CMN_MPAMCFG_PRI_S_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MPAMCFG_PRI_S_FUNC(void)567 static inline uint64_t ODY_TAD_CMN_MPAMCFG_PRI_S_FUNC(void)
568 {
569 return 0x87e053020400ll;
570 }
571
572 #define typedef_ODY_TAD_CMN_MPAMCFG_PRI_S ody_tad_cmn_mpamcfg_pri_s_t
573 #define bustype_ODY_TAD_CMN_MPAMCFG_PRI_S CSR_TYPE_RSL
574 #define basename_ODY_TAD_CMN_MPAMCFG_PRI_S "TAD_CMN_MPAMCFG_PRI_S"
575 #define device_bar_ODY_TAD_CMN_MPAMCFG_PRI_S 0x0 /* PF_BAR0 */
576 #define busnum_ODY_TAD_CMN_MPAMCFG_PRI_S 0
577 #define arguments_ODY_TAD_CMN_MPAMCFG_PRI_S -1, -1, -1, -1
578
579 /**
580 * Register (RSL) tad_cmn_mpamf_aidr_ns
581 *
582 * MPAM Architecture Identification Register
583 * Identifies the version of the MPAM architecture that this MSC implements.
584 * This MSC implements MPAM architecture v1.1
585 */
586 union ody_tad_cmn_mpamf_aidr_ns {
587 uint64_t u;
588 struct ody_tad_cmn_mpamf_aidr_ns_s {
589 uint64_t archminorrev : 4;
590 uint64_t archmajorrev : 4;
591 uint64_t reserved_8_63 : 56;
592 } s;
593 /* struct ody_tad_cmn_mpamf_aidr_ns_s cn; */
594 };
595 typedef union ody_tad_cmn_mpamf_aidr_ns ody_tad_cmn_mpamf_aidr_ns_t;
596
597 #define ODY_TAD_CMN_MPAMF_AIDR_NS ODY_TAD_CMN_MPAMF_AIDR_NS_FUNC()
598 static inline uint64_t ODY_TAD_CMN_MPAMF_AIDR_NS_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MPAMF_AIDR_NS_FUNC(void)599 static inline uint64_t ODY_TAD_CMN_MPAMF_AIDR_NS_FUNC(void)
600 {
601 return 0x87e053010020ll;
602 }
603
604 #define typedef_ODY_TAD_CMN_MPAMF_AIDR_NS ody_tad_cmn_mpamf_aidr_ns_t
605 #define bustype_ODY_TAD_CMN_MPAMF_AIDR_NS CSR_TYPE_RSL
606 #define basename_ODY_TAD_CMN_MPAMF_AIDR_NS "TAD_CMN_MPAMF_AIDR_NS"
607 #define device_bar_ODY_TAD_CMN_MPAMF_AIDR_NS 0x0 /* PF_BAR0 */
608 #define busnum_ODY_TAD_CMN_MPAMF_AIDR_NS 0
609 #define arguments_ODY_TAD_CMN_MPAMF_AIDR_NS -1, -1, -1, -1
610
611 /**
612 * Register (RSL) tad_cmn_mpamf_aidr_s
613 *
614 * MPAM Architecture Identification Register
615 * Identifies the version of the MPAM architecture that this MSC implements.
616 * This MSC implements MPAM architecture v1.1
617 */
618 union ody_tad_cmn_mpamf_aidr_s {
619 uint64_t u;
620 struct ody_tad_cmn_mpamf_aidr_s_s {
621 uint64_t archminorrev : 4;
622 uint64_t archmajorrev : 4;
623 uint64_t reserved_8_63 : 56;
624 } s;
625 /* struct ody_tad_cmn_mpamf_aidr_s_s cn; */
626 };
627 typedef union ody_tad_cmn_mpamf_aidr_s ody_tad_cmn_mpamf_aidr_s_t;
628
629 #define ODY_TAD_CMN_MPAMF_AIDR_S ODY_TAD_CMN_MPAMF_AIDR_S_FUNC()
630 static inline uint64_t ODY_TAD_CMN_MPAMF_AIDR_S_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MPAMF_AIDR_S_FUNC(void)631 static inline uint64_t ODY_TAD_CMN_MPAMF_AIDR_S_FUNC(void)
632 {
633 return 0x87e053020020ll;
634 }
635
636 #define typedef_ODY_TAD_CMN_MPAMF_AIDR_S ody_tad_cmn_mpamf_aidr_s_t
637 #define bustype_ODY_TAD_CMN_MPAMF_AIDR_S CSR_TYPE_RSL
638 #define basename_ODY_TAD_CMN_MPAMF_AIDR_S "TAD_CMN_MPAMF_AIDR_S"
639 #define device_bar_ODY_TAD_CMN_MPAMF_AIDR_S 0x0 /* PF_BAR0 */
640 #define busnum_ODY_TAD_CMN_MPAMF_AIDR_S 0
641 #define arguments_ODY_TAD_CMN_MPAMF_AIDR_S -1, -1, -1, -1
642
643 /**
644 * Register (RSL) tad_cmn_mpamf_cpor_idr_ns
645 *
646 * MPAM Features Cache Portion Partitioning ID Register
647 * Indicates the number of bits in TAD_CMN_MPAMCFG_CPBM for this MSC.
648 * TAD_CMN_MPAMF_CPOR_IDR_NS indicates the number of bits in the Non-secure instance of
649 * TAD_CMN_MPAMCFG_CPBM.
650 */
651 union ody_tad_cmn_mpamf_cpor_idr_ns {
652 uint64_t u;
653 struct ody_tad_cmn_mpamf_cpor_idr_ns_s {
654 uint64_t cpbm_wd : 16;
655 uint64_t reserved_16_63 : 48;
656 } s;
657 /* struct ody_tad_cmn_mpamf_cpor_idr_ns_s cn; */
658 };
659 typedef union ody_tad_cmn_mpamf_cpor_idr_ns ody_tad_cmn_mpamf_cpor_idr_ns_t;
660
661 #define ODY_TAD_CMN_MPAMF_CPOR_IDR_NS ODY_TAD_CMN_MPAMF_CPOR_IDR_NS_FUNC()
662 static inline uint64_t ODY_TAD_CMN_MPAMF_CPOR_IDR_NS_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MPAMF_CPOR_IDR_NS_FUNC(void)663 static inline uint64_t ODY_TAD_CMN_MPAMF_CPOR_IDR_NS_FUNC(void)
664 {
665 return 0x87e053010030ll;
666 }
667
668 #define typedef_ODY_TAD_CMN_MPAMF_CPOR_IDR_NS ody_tad_cmn_mpamf_cpor_idr_ns_t
669 #define bustype_ODY_TAD_CMN_MPAMF_CPOR_IDR_NS CSR_TYPE_RSL
670 #define basename_ODY_TAD_CMN_MPAMF_CPOR_IDR_NS "TAD_CMN_MPAMF_CPOR_IDR_NS"
671 #define device_bar_ODY_TAD_CMN_MPAMF_CPOR_IDR_NS 0x0 /* PF_BAR0 */
672 #define busnum_ODY_TAD_CMN_MPAMF_CPOR_IDR_NS 0
673 #define arguments_ODY_TAD_CMN_MPAMF_CPOR_IDR_NS -1, -1, -1, -1
674
675 /**
676 * Register (RSL) tad_cmn_mpamf_cpor_idr_s
677 *
678 * Secure MPAM Features Cache Portion Partitioning ID Register
679 * Indicates the number of bits in TAD_CMN_MPAMCFG_CPBM for this MSC. TAD_CMN_MPAMF_CPOR_IDR_S
680 * indicates the number of bits in the Secure instance of TAD_CMN_MPAMCFG_CPBM.
681 */
682 union ody_tad_cmn_mpamf_cpor_idr_s {
683 uint64_t u;
684 struct ody_tad_cmn_mpamf_cpor_idr_s_s {
685 uint64_t cpbm_wd : 16;
686 uint64_t reserved_16_63 : 48;
687 } s;
688 /* struct ody_tad_cmn_mpamf_cpor_idr_s_s cn; */
689 };
690 typedef union ody_tad_cmn_mpamf_cpor_idr_s ody_tad_cmn_mpamf_cpor_idr_s_t;
691
692 #define ODY_TAD_CMN_MPAMF_CPOR_IDR_S ODY_TAD_CMN_MPAMF_CPOR_IDR_S_FUNC()
693 static inline uint64_t ODY_TAD_CMN_MPAMF_CPOR_IDR_S_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MPAMF_CPOR_IDR_S_FUNC(void)694 static inline uint64_t ODY_TAD_CMN_MPAMF_CPOR_IDR_S_FUNC(void)
695 {
696 return 0x87e053020030ll;
697 }
698
699 #define typedef_ODY_TAD_CMN_MPAMF_CPOR_IDR_S ody_tad_cmn_mpamf_cpor_idr_s_t
700 #define bustype_ODY_TAD_CMN_MPAMF_CPOR_IDR_S CSR_TYPE_RSL
701 #define basename_ODY_TAD_CMN_MPAMF_CPOR_IDR_S "TAD_CMN_MPAMF_CPOR_IDR_S"
702 #define device_bar_ODY_TAD_CMN_MPAMF_CPOR_IDR_S 0x0 /* PF_BAR0 */
703 #define busnum_ODY_TAD_CMN_MPAMF_CPOR_IDR_S 0
704 #define arguments_ODY_TAD_CMN_MPAMF_CPOR_IDR_S -1, -1, -1, -1
705
706 /**
707 * Register (RSL) tad_cmn_mpamf_csumon_idr_ns
708 *
709 * MPAM Features Cache Storage Usage Monitoring ID Register
710 * Indicates the number of cache storage usage monitors for this MSC.
711 * TAD_CMN_MPAMF_CSUMON_IDR_NS indicates the number of Non-secure cache storage usage monitors.
712 */
713 union ody_tad_cmn_mpamf_csumon_idr_ns {
714 uint64_t u;
715 struct ody_tad_cmn_mpamf_csumon_idr_ns_s {
716 uint64_t num_mon : 16;
717 uint64_t reserved_16_30 : 15;
718 uint64_t has_capture : 1;
719 uint64_t reserved_32_63 : 32;
720 } s;
721 /* struct ody_tad_cmn_mpamf_csumon_idr_ns_s cn; */
722 };
723 typedef union ody_tad_cmn_mpamf_csumon_idr_ns ody_tad_cmn_mpamf_csumon_idr_ns_t;
724
725 #define ODY_TAD_CMN_MPAMF_CSUMON_IDR_NS ODY_TAD_CMN_MPAMF_CSUMON_IDR_NS_FUNC()
726 static inline uint64_t ODY_TAD_CMN_MPAMF_CSUMON_IDR_NS_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MPAMF_CSUMON_IDR_NS_FUNC(void)727 static inline uint64_t ODY_TAD_CMN_MPAMF_CSUMON_IDR_NS_FUNC(void)
728 {
729 return 0x87e053010088ll;
730 }
731
732 #define typedef_ODY_TAD_CMN_MPAMF_CSUMON_IDR_NS ody_tad_cmn_mpamf_csumon_idr_ns_t
733 #define bustype_ODY_TAD_CMN_MPAMF_CSUMON_IDR_NS CSR_TYPE_RSL
734 #define basename_ODY_TAD_CMN_MPAMF_CSUMON_IDR_NS "TAD_CMN_MPAMF_CSUMON_IDR_NS"
735 #define device_bar_ODY_TAD_CMN_MPAMF_CSUMON_IDR_NS 0x0 /* PF_BAR0 */
736 #define busnum_ODY_TAD_CMN_MPAMF_CSUMON_IDR_NS 0
737 #define arguments_ODY_TAD_CMN_MPAMF_CSUMON_IDR_NS -1, -1, -1, -1
738
739 /**
740 * Register (RSL) tad_cmn_mpamf_csumon_idr_s
741 *
742 * MPAM Features Cache Storage Usage Monitoring ID Register
743 * Indicates the number of cache storage usage monitors for this MSC.
744 * TAD_CMN_MPAMF_CSUMON_IDR_S indicates the number of secure cache storage usage monitors.
745 */
746 union ody_tad_cmn_mpamf_csumon_idr_s {
747 uint64_t u;
748 struct ody_tad_cmn_mpamf_csumon_idr_s_s {
749 uint64_t num_mon : 16;
750 uint64_t reserved_16_30 : 15;
751 uint64_t has_capture : 1;
752 uint64_t reserved_32_63 : 32;
753 } s;
754 /* struct ody_tad_cmn_mpamf_csumon_idr_s_s cn; */
755 };
756 typedef union ody_tad_cmn_mpamf_csumon_idr_s ody_tad_cmn_mpamf_csumon_idr_s_t;
757
758 #define ODY_TAD_CMN_MPAMF_CSUMON_IDR_S ODY_TAD_CMN_MPAMF_CSUMON_IDR_S_FUNC()
759 static inline uint64_t ODY_TAD_CMN_MPAMF_CSUMON_IDR_S_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MPAMF_CSUMON_IDR_S_FUNC(void)760 static inline uint64_t ODY_TAD_CMN_MPAMF_CSUMON_IDR_S_FUNC(void)
761 {
762 return 0x87e053020088ll;
763 }
764
765 #define typedef_ODY_TAD_CMN_MPAMF_CSUMON_IDR_S ody_tad_cmn_mpamf_csumon_idr_s_t
766 #define bustype_ODY_TAD_CMN_MPAMF_CSUMON_IDR_S CSR_TYPE_RSL
767 #define basename_ODY_TAD_CMN_MPAMF_CSUMON_IDR_S "TAD_CMN_MPAMF_CSUMON_IDR_S"
768 #define device_bar_ODY_TAD_CMN_MPAMF_CSUMON_IDR_S 0x0 /* PF_BAR0 */
769 #define busnum_ODY_TAD_CMN_MPAMF_CSUMON_IDR_S 0
770 #define arguments_ODY_TAD_CMN_MPAMF_CSUMON_IDR_S -1, -1, -1, -1
771
772 /**
773 * Register (RSL) tad_cmn_mpamf_idr_ns
774 *
775 * MPAM Features Identification Register
776 * Indicates which memory partitioning and monitoring features are present on this MSC.
777 * TAD_CMN_MPAMF_IDR_NS indicates the MPAM features accessed from the Non-secure MPAM feature page.
778 */
779 union ody_tad_cmn_mpamf_idr_ns {
780 uint64_t u;
781 struct ody_tad_cmn_mpamf_idr_ns_s {
782 uint64_t partid_max : 16;
783 uint64_t pmg_max : 8;
784 uint64_t has_ccap_part : 1;
785 uint64_t has_cpor_part : 1;
786 uint64_t has_mbw_part : 1;
787 uint64_t has_pri_part : 1;
788 uint64_t ext : 1;
789 uint64_t has_impl_idr : 1;
790 uint64_t has_msmon : 1;
791 uint64_t has_partid_nrw : 1;
792 uint64_t has_ris : 1;
793 uint64_t reserved_33_35 : 3;
794 uint64_t no_impl_part : 1;
795 uint64_t no_impl_msmon : 1;
796 uint64_t has_extd_esr : 1;
797 uint64_t has_esr : 1;
798 uint64_t reserved_40_55 : 16;
799 uint64_t ris_max : 4;
800 uint64_t reserved_60_63 : 4;
801 } s;
802 /* struct ody_tad_cmn_mpamf_idr_ns_s cn; */
803 };
804 typedef union ody_tad_cmn_mpamf_idr_ns ody_tad_cmn_mpamf_idr_ns_t;
805
806 #define ODY_TAD_CMN_MPAMF_IDR_NS ODY_TAD_CMN_MPAMF_IDR_NS_FUNC()
807 static inline uint64_t ODY_TAD_CMN_MPAMF_IDR_NS_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MPAMF_IDR_NS_FUNC(void)808 static inline uint64_t ODY_TAD_CMN_MPAMF_IDR_NS_FUNC(void)
809 {
810 return 0x87e053010000ll;
811 }
812
813 #define typedef_ODY_TAD_CMN_MPAMF_IDR_NS ody_tad_cmn_mpamf_idr_ns_t
814 #define bustype_ODY_TAD_CMN_MPAMF_IDR_NS CSR_TYPE_RSL
815 #define basename_ODY_TAD_CMN_MPAMF_IDR_NS "TAD_CMN_MPAMF_IDR_NS"
816 #define device_bar_ODY_TAD_CMN_MPAMF_IDR_NS 0x0 /* PF_BAR0 */
817 #define busnum_ODY_TAD_CMN_MPAMF_IDR_NS 0
818 #define arguments_ODY_TAD_CMN_MPAMF_IDR_NS -1, -1, -1, -1
819
820 /**
821 * Register (RSL) tad_cmn_mpamf_idr_s
822 *
823 * MPAM Features Identification Register
824 * Indicates which memory partitioning and monitoring features are present on this MSC.
825 * TAD_CMN_MPAMF_IDR_S indicates the MPAM features accessed from the Secure MPAM feature page.
826 */
827 union ody_tad_cmn_mpamf_idr_s {
828 uint64_t u;
829 struct ody_tad_cmn_mpamf_idr_s_s {
830 uint64_t partid_max : 16;
831 uint64_t pmg_max : 8;
832 uint64_t has_ccap_part : 1;
833 uint64_t has_cpor_part : 1;
834 uint64_t has_mbw_part : 1;
835 uint64_t has_pri_part : 1;
836 uint64_t ext : 1;
837 uint64_t has_impl_idr : 1;
838 uint64_t has_msmon : 1;
839 uint64_t has_partid_nrw : 1;
840 uint64_t has_ris : 1;
841 uint64_t reserved_33_35 : 3;
842 uint64_t no_impl_part : 1;
843 uint64_t no_impl_msmon : 1;
844 uint64_t has_extd_esr : 1;
845 uint64_t has_esr : 1;
846 uint64_t reserved_40_55 : 16;
847 uint64_t ris_max : 4;
848 uint64_t reserved_60_63 : 4;
849 } s;
850 /* struct ody_tad_cmn_mpamf_idr_s_s cn; */
851 };
852 typedef union ody_tad_cmn_mpamf_idr_s ody_tad_cmn_mpamf_idr_s_t;
853
854 #define ODY_TAD_CMN_MPAMF_IDR_S ODY_TAD_CMN_MPAMF_IDR_S_FUNC()
855 static inline uint64_t ODY_TAD_CMN_MPAMF_IDR_S_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MPAMF_IDR_S_FUNC(void)856 static inline uint64_t ODY_TAD_CMN_MPAMF_IDR_S_FUNC(void)
857 {
858 return 0x87e053020000ll;
859 }
860
861 #define typedef_ODY_TAD_CMN_MPAMF_IDR_S ody_tad_cmn_mpamf_idr_s_t
862 #define bustype_ODY_TAD_CMN_MPAMF_IDR_S CSR_TYPE_RSL
863 #define basename_ODY_TAD_CMN_MPAMF_IDR_S "TAD_CMN_MPAMF_IDR_S"
864 #define device_bar_ODY_TAD_CMN_MPAMF_IDR_S 0x0 /* PF_BAR0 */
865 #define busnum_ODY_TAD_CMN_MPAMF_IDR_S 0
866 #define arguments_ODY_TAD_CMN_MPAMF_IDR_S -1, -1, -1, -1
867
868 /**
869 * Register (RSL) tad_cmn_mpamf_iidr_ns
870 *
871 * MPAM Implementation Identification Register
872 * Uniquely identifies the MSC implementation by the combination of implementer, product ID,
873 * variant and revision.
874 */
875 union ody_tad_cmn_mpamf_iidr_ns {
876 uint64_t u;
877 struct ody_tad_cmn_mpamf_iidr_ns_s {
878 uint64_t implementer : 12;
879 uint64_t revision : 4;
880 uint64_t variant : 4;
881 uint64_t productid : 12;
882 uint64_t reserved_32_63 : 32;
883 } s;
884 /* struct ody_tad_cmn_mpamf_iidr_ns_s cn; */
885 };
886 typedef union ody_tad_cmn_mpamf_iidr_ns ody_tad_cmn_mpamf_iidr_ns_t;
887
888 #define ODY_TAD_CMN_MPAMF_IIDR_NS ODY_TAD_CMN_MPAMF_IIDR_NS_FUNC()
889 static inline uint64_t ODY_TAD_CMN_MPAMF_IIDR_NS_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MPAMF_IIDR_NS_FUNC(void)890 static inline uint64_t ODY_TAD_CMN_MPAMF_IIDR_NS_FUNC(void)
891 {
892 return 0x87e053010018ll;
893 }
894
895 #define typedef_ODY_TAD_CMN_MPAMF_IIDR_NS ody_tad_cmn_mpamf_iidr_ns_t
896 #define bustype_ODY_TAD_CMN_MPAMF_IIDR_NS CSR_TYPE_RSL
897 #define basename_ODY_TAD_CMN_MPAMF_IIDR_NS "TAD_CMN_MPAMF_IIDR_NS"
898 #define device_bar_ODY_TAD_CMN_MPAMF_IIDR_NS 0x0 /* PF_BAR0 */
899 #define busnum_ODY_TAD_CMN_MPAMF_IIDR_NS 0
900 #define arguments_ODY_TAD_CMN_MPAMF_IIDR_NS -1, -1, -1, -1
901
902 /**
903 * Register (RSL) tad_cmn_mpamf_iidr_s
904 *
905 * MPAM Implementation Identification Register
906 * Uniquely identifies the MSC implementation by the combination of implementer, product ID,
907 * variant and revision.
908 */
909 union ody_tad_cmn_mpamf_iidr_s {
910 uint64_t u;
911 struct ody_tad_cmn_mpamf_iidr_s_s {
912 uint64_t implementer : 12;
913 uint64_t revision : 4;
914 uint64_t variant : 4;
915 uint64_t productid : 12;
916 uint64_t reserved_32_63 : 32;
917 } s;
918 /* struct ody_tad_cmn_mpamf_iidr_s_s cn; */
919 };
920 typedef union ody_tad_cmn_mpamf_iidr_s ody_tad_cmn_mpamf_iidr_s_t;
921
922 #define ODY_TAD_CMN_MPAMF_IIDR_S ODY_TAD_CMN_MPAMF_IIDR_S_FUNC()
923 static inline uint64_t ODY_TAD_CMN_MPAMF_IIDR_S_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MPAMF_IIDR_S_FUNC(void)924 static inline uint64_t ODY_TAD_CMN_MPAMF_IIDR_S_FUNC(void)
925 {
926 return 0x87e053020018ll;
927 }
928
929 #define typedef_ODY_TAD_CMN_MPAMF_IIDR_S ody_tad_cmn_mpamf_iidr_s_t
930 #define bustype_ODY_TAD_CMN_MPAMF_IIDR_S CSR_TYPE_RSL
931 #define basename_ODY_TAD_CMN_MPAMF_IIDR_S "TAD_CMN_MPAMF_IIDR_S"
932 #define device_bar_ODY_TAD_CMN_MPAMF_IIDR_S 0x0 /* PF_BAR0 */
933 #define busnum_ODY_TAD_CMN_MPAMF_IIDR_S 0
934 #define arguments_ODY_TAD_CMN_MPAMF_IIDR_S -1, -1, -1, -1
935
936 /**
937 * Register (RSL) tad_cmn_mpamf_impl_idr_ns
938 *
939 * MPAM Implementation-Specific Partitioning Feature Identification Register
940 * Indicates the implementation-defined partitioning and monitoring features and
941 * parameters of this MSC.
942 */
943 union ody_tad_cmn_mpamf_impl_idr_ns {
944 uint64_t u;
945 struct ody_tad_cmn_mpamf_impl_idr_ns_s {
946 uint64_t has_pri : 1;
947 uint64_t reserved_1_63 : 63;
948 } s;
949 /* struct ody_tad_cmn_mpamf_impl_idr_ns_s cn; */
950 };
951 typedef union ody_tad_cmn_mpamf_impl_idr_ns ody_tad_cmn_mpamf_impl_idr_ns_t;
952
953 #define ODY_TAD_CMN_MPAMF_IMPL_IDR_NS ODY_TAD_CMN_MPAMF_IMPL_IDR_NS_FUNC()
954 static inline uint64_t ODY_TAD_CMN_MPAMF_IMPL_IDR_NS_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MPAMF_IMPL_IDR_NS_FUNC(void)955 static inline uint64_t ODY_TAD_CMN_MPAMF_IMPL_IDR_NS_FUNC(void)
956 {
957 return 0x87e053010028ll;
958 }
959
960 #define typedef_ODY_TAD_CMN_MPAMF_IMPL_IDR_NS ody_tad_cmn_mpamf_impl_idr_ns_t
961 #define bustype_ODY_TAD_CMN_MPAMF_IMPL_IDR_NS CSR_TYPE_RSL
962 #define basename_ODY_TAD_CMN_MPAMF_IMPL_IDR_NS "TAD_CMN_MPAMF_IMPL_IDR_NS"
963 #define device_bar_ODY_TAD_CMN_MPAMF_IMPL_IDR_NS 0x0 /* PF_BAR0 */
964 #define busnum_ODY_TAD_CMN_MPAMF_IMPL_IDR_NS 0
965 #define arguments_ODY_TAD_CMN_MPAMF_IMPL_IDR_NS -1, -1, -1, -1
966
967 /**
968 * Register (RSL) tad_cmn_mpamf_impl_idr_s
969 *
970 * MPAM Implementation-Specific Partitioning Feature Identification Register
971 * Indicates the implementation-defined partitioning and monitoring features and
972 * parameters of this MSC.
973 */
974 union ody_tad_cmn_mpamf_impl_idr_s {
975 uint64_t u;
976 struct ody_tad_cmn_mpamf_impl_idr_s_s {
977 uint64_t has_pri : 1;
978 uint64_t reserved_1_63 : 63;
979 } s;
980 /* struct ody_tad_cmn_mpamf_impl_idr_s_s cn; */
981 };
982 typedef union ody_tad_cmn_mpamf_impl_idr_s ody_tad_cmn_mpamf_impl_idr_s_t;
983
984 #define ODY_TAD_CMN_MPAMF_IMPL_IDR_S ODY_TAD_CMN_MPAMF_IMPL_IDR_S_FUNC()
985 static inline uint64_t ODY_TAD_CMN_MPAMF_IMPL_IDR_S_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MPAMF_IMPL_IDR_S_FUNC(void)986 static inline uint64_t ODY_TAD_CMN_MPAMF_IMPL_IDR_S_FUNC(void)
987 {
988 return 0x87e053020028ll;
989 }
990
991 #define typedef_ODY_TAD_CMN_MPAMF_IMPL_IDR_S ody_tad_cmn_mpamf_impl_idr_s_t
992 #define bustype_ODY_TAD_CMN_MPAMF_IMPL_IDR_S CSR_TYPE_RSL
993 #define basename_ODY_TAD_CMN_MPAMF_IMPL_IDR_S "TAD_CMN_MPAMF_IMPL_IDR_S"
994 #define device_bar_ODY_TAD_CMN_MPAMF_IMPL_IDR_S 0x0 /* PF_BAR0 */
995 #define busnum_ODY_TAD_CMN_MPAMF_IMPL_IDR_S 0
996 #define arguments_ODY_TAD_CMN_MPAMF_IMPL_IDR_S -1, -1, -1, -1
997
998 /**
999 * Register (RSL) tad_cmn_mpamf_msmon_idr_ns
1000 *
1001 * MPAM Resource Monitoring Identification Register
1002 * Indicates which MPAM monitoring features are present on this MSC.
1003 * TAD_CMN_MPAMF_MSMON_IDR_NS indicates Non-secure monitoring features.
1004 */
1005 union ody_tad_cmn_mpamf_msmon_idr_ns {
1006 uint64_t u;
1007 struct ody_tad_cmn_mpamf_msmon_idr_ns_s {
1008 uint64_t reserved_0_15 : 16;
1009 uint64_t msmon_csu : 1;
1010 uint64_t msmon_mbwu : 1;
1011 uint64_t reserved_18_30 : 13;
1012 uint64_t has_local_capt_evnt : 1;
1013 uint64_t reserved_32_63 : 32;
1014 } s;
1015 /* struct ody_tad_cmn_mpamf_msmon_idr_ns_s cn; */
1016 };
1017 typedef union ody_tad_cmn_mpamf_msmon_idr_ns ody_tad_cmn_mpamf_msmon_idr_ns_t;
1018
1019 #define ODY_TAD_CMN_MPAMF_MSMON_IDR_NS ODY_TAD_CMN_MPAMF_MSMON_IDR_NS_FUNC()
1020 static inline uint64_t ODY_TAD_CMN_MPAMF_MSMON_IDR_NS_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MPAMF_MSMON_IDR_NS_FUNC(void)1021 static inline uint64_t ODY_TAD_CMN_MPAMF_MSMON_IDR_NS_FUNC(void)
1022 {
1023 return 0x87e053010080ll;
1024 }
1025
1026 #define typedef_ODY_TAD_CMN_MPAMF_MSMON_IDR_NS ody_tad_cmn_mpamf_msmon_idr_ns_t
1027 #define bustype_ODY_TAD_CMN_MPAMF_MSMON_IDR_NS CSR_TYPE_RSL
1028 #define basename_ODY_TAD_CMN_MPAMF_MSMON_IDR_NS "TAD_CMN_MPAMF_MSMON_IDR_NS"
1029 #define device_bar_ODY_TAD_CMN_MPAMF_MSMON_IDR_NS 0x0 /* PF_BAR0 */
1030 #define busnum_ODY_TAD_CMN_MPAMF_MSMON_IDR_NS 0
1031 #define arguments_ODY_TAD_CMN_MPAMF_MSMON_IDR_NS -1, -1, -1, -1
1032
1033 /**
1034 * Register (RSL) tad_cmn_mpamf_msmon_idr_s
1035 *
1036 * MPAM Resource Monitoring Identification Register
1037 * Indicates which MPAM monitoring features are present on this MSC.
1038 * TAD_CMN_MPAMF_MSMON_IDR_S indicates secure monitoring features.
1039 */
1040 union ody_tad_cmn_mpamf_msmon_idr_s {
1041 uint64_t u;
1042 struct ody_tad_cmn_mpamf_msmon_idr_s_s {
1043 uint64_t reserved_0_15 : 16;
1044 uint64_t msmon_csu : 1;
1045 uint64_t msmon_mbwu : 1;
1046 uint64_t reserved_18_30 : 13;
1047 uint64_t has_local_capt_evnt : 1;
1048 uint64_t reserved_32_63 : 32;
1049 } s;
1050 /* struct ody_tad_cmn_mpamf_msmon_idr_s_s cn; */
1051 };
1052 typedef union ody_tad_cmn_mpamf_msmon_idr_s ody_tad_cmn_mpamf_msmon_idr_s_t;
1053
1054 #define ODY_TAD_CMN_MPAMF_MSMON_IDR_S ODY_TAD_CMN_MPAMF_MSMON_IDR_S_FUNC()
1055 static inline uint64_t ODY_TAD_CMN_MPAMF_MSMON_IDR_S_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MPAMF_MSMON_IDR_S_FUNC(void)1056 static inline uint64_t ODY_TAD_CMN_MPAMF_MSMON_IDR_S_FUNC(void)
1057 {
1058 return 0x87e053020080ll;
1059 }
1060
1061 #define typedef_ODY_TAD_CMN_MPAMF_MSMON_IDR_S ody_tad_cmn_mpamf_msmon_idr_s_t
1062 #define bustype_ODY_TAD_CMN_MPAMF_MSMON_IDR_S CSR_TYPE_RSL
1063 #define basename_ODY_TAD_CMN_MPAMF_MSMON_IDR_S "TAD_CMN_MPAMF_MSMON_IDR_S"
1064 #define device_bar_ODY_TAD_CMN_MPAMF_MSMON_IDR_S 0x0 /* PF_BAR0 */
1065 #define busnum_ODY_TAD_CMN_MPAMF_MSMON_IDR_S 0
1066 #define arguments_ODY_TAD_CMN_MPAMF_MSMON_IDR_S -1, -1, -1, -1
1067
1068 /**
1069 * Register (RSL) tad_cmn_mpamf_pri_idr_ns
1070 *
1071 * MPAM Priority Partitioning Identification Register
1072 * Indicates which MPAM priority partitioning features are present on this MSC.
1073 */
1074 union ody_tad_cmn_mpamf_pri_idr_ns {
1075 uint64_t u;
1076 struct ody_tad_cmn_mpamf_pri_idr_ns_s {
1077 uint64_t has_intpri : 1;
1078 uint64_t intpri_0_is_low : 1;
1079 uint64_t reserved_2_3 : 2;
1080 uint64_t intpri_wd : 6;
1081 uint64_t reserved_10_15 : 6;
1082 uint64_t has_dspri : 1;
1083 uint64_t dspri_0_is_low : 1;
1084 uint64_t reserved_18_19 : 2;
1085 uint64_t dspri_wd : 6;
1086 uint64_t reserved_26_63 : 38;
1087 } s;
1088 /* struct ody_tad_cmn_mpamf_pri_idr_ns_s cn; */
1089 };
1090 typedef union ody_tad_cmn_mpamf_pri_idr_ns ody_tad_cmn_mpamf_pri_idr_ns_t;
1091
1092 #define ODY_TAD_CMN_MPAMF_PRI_IDR_NS ODY_TAD_CMN_MPAMF_PRI_IDR_NS_FUNC()
1093 static inline uint64_t ODY_TAD_CMN_MPAMF_PRI_IDR_NS_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MPAMF_PRI_IDR_NS_FUNC(void)1094 static inline uint64_t ODY_TAD_CMN_MPAMF_PRI_IDR_NS_FUNC(void)
1095 {
1096 return 0x87e053010048ll;
1097 }
1098
1099 #define typedef_ODY_TAD_CMN_MPAMF_PRI_IDR_NS ody_tad_cmn_mpamf_pri_idr_ns_t
1100 #define bustype_ODY_TAD_CMN_MPAMF_PRI_IDR_NS CSR_TYPE_RSL
1101 #define basename_ODY_TAD_CMN_MPAMF_PRI_IDR_NS "TAD_CMN_MPAMF_PRI_IDR_NS"
1102 #define device_bar_ODY_TAD_CMN_MPAMF_PRI_IDR_NS 0x0 /* PF_BAR0 */
1103 #define busnum_ODY_TAD_CMN_MPAMF_PRI_IDR_NS 0
1104 #define arguments_ODY_TAD_CMN_MPAMF_PRI_IDR_NS -1, -1, -1, -1
1105
1106 /**
1107 * Register (RSL) tad_cmn_mpamf_pri_idr_s
1108 *
1109 * MPAM Priority Partitioning Identification Register
1110 * Indicates which MPAM priority partitioning features are present on this MSC.
1111 */
1112 union ody_tad_cmn_mpamf_pri_idr_s {
1113 uint64_t u;
1114 struct ody_tad_cmn_mpamf_pri_idr_s_s {
1115 uint64_t has_intpri : 1;
1116 uint64_t intpri_0_is_low : 1;
1117 uint64_t reserved_2_3 : 2;
1118 uint64_t intpri_wd : 6;
1119 uint64_t reserved_10_15 : 6;
1120 uint64_t has_dspri : 1;
1121 uint64_t dspri_0_is_low : 1;
1122 uint64_t reserved_18_19 : 2;
1123 uint64_t dspri_wd : 6;
1124 uint64_t reserved_26_63 : 38;
1125 } s;
1126 /* struct ody_tad_cmn_mpamf_pri_idr_s_s cn; */
1127 };
1128 typedef union ody_tad_cmn_mpamf_pri_idr_s ody_tad_cmn_mpamf_pri_idr_s_t;
1129
1130 #define ODY_TAD_CMN_MPAMF_PRI_IDR_S ODY_TAD_CMN_MPAMF_PRI_IDR_S_FUNC()
1131 static inline uint64_t ODY_TAD_CMN_MPAMF_PRI_IDR_S_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MPAMF_PRI_IDR_S_FUNC(void)1132 static inline uint64_t ODY_TAD_CMN_MPAMF_PRI_IDR_S_FUNC(void)
1133 {
1134 return 0x87e053020048ll;
1135 }
1136
1137 #define typedef_ODY_TAD_CMN_MPAMF_PRI_IDR_S ody_tad_cmn_mpamf_pri_idr_s_t
1138 #define bustype_ODY_TAD_CMN_MPAMF_PRI_IDR_S CSR_TYPE_RSL
1139 #define basename_ODY_TAD_CMN_MPAMF_PRI_IDR_S "TAD_CMN_MPAMF_PRI_IDR_S"
1140 #define device_bar_ODY_TAD_CMN_MPAMF_PRI_IDR_S 0x0 /* PF_BAR0 */
1141 #define busnum_ODY_TAD_CMN_MPAMF_PRI_IDR_S 0
1142 #define arguments_ODY_TAD_CMN_MPAMF_PRI_IDR_S -1, -1, -1, -1
1143
1144 /**
1145 * Register (RSL) tad_cmn_mpamf_sidr
1146 *
1147 * MPAM Features Secure Identification Register
1148 * The TAD_CMN_MPAMF_SIDR is a 32-bit read-only register that indicates the maximum Secure PARTID and
1149 * Secure PMG on this MSC.
1150 */
1151 union ody_tad_cmn_mpamf_sidr {
1152 uint64_t u;
1153 struct ody_tad_cmn_mpamf_sidr_s {
1154 uint64_t s_partid_max : 16;
1155 uint64_t s_pmg_max : 8;
1156 uint64_t reserved_24_63 : 40;
1157 } s;
1158 /* struct ody_tad_cmn_mpamf_sidr_s cn; */
1159 };
1160 typedef union ody_tad_cmn_mpamf_sidr ody_tad_cmn_mpamf_sidr_t;
1161
1162 #define ODY_TAD_CMN_MPAMF_SIDR ODY_TAD_CMN_MPAMF_SIDR_FUNC()
1163 static inline uint64_t ODY_TAD_CMN_MPAMF_SIDR_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MPAMF_SIDR_FUNC(void)1164 static inline uint64_t ODY_TAD_CMN_MPAMF_SIDR_FUNC(void)
1165 {
1166 return 0x87e053020008ll;
1167 }
1168
1169 #define typedef_ODY_TAD_CMN_MPAMF_SIDR ody_tad_cmn_mpamf_sidr_t
1170 #define bustype_ODY_TAD_CMN_MPAMF_SIDR CSR_TYPE_RSL
1171 #define basename_ODY_TAD_CMN_MPAMF_SIDR "TAD_CMN_MPAMF_SIDR"
1172 #define device_bar_ODY_TAD_CMN_MPAMF_SIDR 0x0 /* PF_BAR0 */
1173 #define busnum_ODY_TAD_CMN_MPAMF_SIDR 0
1174 #define arguments_ODY_TAD_CMN_MPAMF_SIDR -1, -1, -1, -1
1175
1176 /**
1177 * Register (RSL) tad_cmn_msmon_cfg_csu_ctl_ns
1178 *
1179 * MPAM Memory System Monitor Configure Cache Storage Usage Monitor Control Register
1180 * Controls the CSU monitor selected by TAD_CMN_MSMON_CFG_MON_SEL_NS.
1181 * TAD_CMN_MSMON_CFG_CSU_CTL_NS controls Non-secure cache storage usage monitor instance
1182 * selected by the Non-secure instance of TAD_CMN_MSMON_CFG_MON_SEL_NS.
1183 */
1184 union ody_tad_cmn_msmon_cfg_csu_ctl_ns {
1185 uint64_t u;
1186 struct ody_tad_cmn_msmon_cfg_csu_ctl_ns_s {
1187 uint64_t monitor_type : 8;
1188 uint64_t reserved_8_15 : 8;
1189 uint64_t match_partid : 1;
1190 uint64_t match_pmg : 1;
1191 uint64_t reserved_18_19 : 2;
1192 uint64_t subtype : 4;
1193 uint64_t oflow_frz : 1;
1194 uint64_t oflow_intr : 1;
1195 uint64_t oflow_status : 1;
1196 uint64_t capt_reset : 1;
1197 uint64_t capt_evnt : 3;
1198 uint64_t en : 1;
1199 uint64_t reserved_32_63 : 32;
1200 } s;
1201 /* struct ody_tad_cmn_msmon_cfg_csu_ctl_ns_s cn; */
1202 };
1203 typedef union ody_tad_cmn_msmon_cfg_csu_ctl_ns ody_tad_cmn_msmon_cfg_csu_ctl_ns_t;
1204
1205 #define ODY_TAD_CMN_MSMON_CFG_CSU_CTL_NS ODY_TAD_CMN_MSMON_CFG_CSU_CTL_NS_FUNC()
1206 static inline uint64_t ODY_TAD_CMN_MSMON_CFG_CSU_CTL_NS_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MSMON_CFG_CSU_CTL_NS_FUNC(void)1207 static inline uint64_t ODY_TAD_CMN_MSMON_CFG_CSU_CTL_NS_FUNC(void)
1208 {
1209 return 0x87e053010818ll;
1210 }
1211
1212 #define typedef_ODY_TAD_CMN_MSMON_CFG_CSU_CTL_NS ody_tad_cmn_msmon_cfg_csu_ctl_ns_t
1213 #define bustype_ODY_TAD_CMN_MSMON_CFG_CSU_CTL_NS CSR_TYPE_RSL
1214 #define basename_ODY_TAD_CMN_MSMON_CFG_CSU_CTL_NS "TAD_CMN_MSMON_CFG_CSU_CTL_NS"
1215 #define device_bar_ODY_TAD_CMN_MSMON_CFG_CSU_CTL_NS 0x0 /* PF_BAR0 */
1216 #define busnum_ODY_TAD_CMN_MSMON_CFG_CSU_CTL_NS 0
1217 #define arguments_ODY_TAD_CMN_MSMON_CFG_CSU_CTL_NS -1, -1, -1, -1
1218
1219 /**
1220 * Register (RSL) tad_cmn_msmon_cfg_csu_ctl_s
1221 *
1222 * MPAM Memory System Monitor Configure Cache Storage Usage Monitor Control Register
1223 * Controls the CSU monitor selected by TAD_CMN_MSMON_CFG_MON_SEL_S.
1224 * TAD_CMN_MSMON_CFG_CSU_CTL_S controls secure cache storage usage monitor instance
1225 * selected by the secure instance of TAD_CMN_MSMON_CFG_MON_SEL_S.
1226 */
1227 union ody_tad_cmn_msmon_cfg_csu_ctl_s {
1228 uint64_t u;
1229 struct ody_tad_cmn_msmon_cfg_csu_ctl_s_s {
1230 uint64_t monitor_type : 8;
1231 uint64_t reserved_8_15 : 8;
1232 uint64_t match_partid : 1;
1233 uint64_t match_pmg : 1;
1234 uint64_t reserved_18_19 : 2;
1235 uint64_t subtype : 4;
1236 uint64_t oflow_frz : 1;
1237 uint64_t oflow_intr : 1;
1238 uint64_t oflow_status : 1;
1239 uint64_t capt_reset : 1;
1240 uint64_t capt_evnt : 3;
1241 uint64_t en : 1;
1242 uint64_t reserved_32_63 : 32;
1243 } s;
1244 /* struct ody_tad_cmn_msmon_cfg_csu_ctl_s_s cn; */
1245 };
1246 typedef union ody_tad_cmn_msmon_cfg_csu_ctl_s ody_tad_cmn_msmon_cfg_csu_ctl_s_t;
1247
1248 #define ODY_TAD_CMN_MSMON_CFG_CSU_CTL_S ODY_TAD_CMN_MSMON_CFG_CSU_CTL_S_FUNC()
1249 static inline uint64_t ODY_TAD_CMN_MSMON_CFG_CSU_CTL_S_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MSMON_CFG_CSU_CTL_S_FUNC(void)1250 static inline uint64_t ODY_TAD_CMN_MSMON_CFG_CSU_CTL_S_FUNC(void)
1251 {
1252 return 0x87e053020818ll;
1253 }
1254
1255 #define typedef_ODY_TAD_CMN_MSMON_CFG_CSU_CTL_S ody_tad_cmn_msmon_cfg_csu_ctl_s_t
1256 #define bustype_ODY_TAD_CMN_MSMON_CFG_CSU_CTL_S CSR_TYPE_RSL
1257 #define basename_ODY_TAD_CMN_MSMON_CFG_CSU_CTL_S "TAD_CMN_MSMON_CFG_CSU_CTL_S"
1258 #define device_bar_ODY_TAD_CMN_MSMON_CFG_CSU_CTL_S 0x0 /* PF_BAR0 */
1259 #define busnum_ODY_TAD_CMN_MSMON_CFG_CSU_CTL_S 0
1260 #define arguments_ODY_TAD_CMN_MSMON_CFG_CSU_CTL_S -1, -1, -1, -1
1261
1262 /**
1263 * Register (RSL) tad_cmn_msmon_cfg_csu_flt_ns
1264 *
1265 * MPAM Memory System Monitor Configure Cache Storage Usage Monitor Filter Register
1266 * Configures PARTID and PMG to measure or count in the CSU monitor selected by
1267 * TAD_CMN_MSMON_CFG_MON_SEL_NS.
1268 * TAD_CMN_MSMON_CFG_CSU_CTL_NS sets filter conditions for the Non-secure cache storage
1269 * usage monitor instance
1270 * selected by the Non-secure instance of TAD_CMN_MSMON_CFG_MON_SEL_NS.
1271 */
1272 union ody_tad_cmn_msmon_cfg_csu_flt_ns {
1273 uint64_t u;
1274 struct ody_tad_cmn_msmon_cfg_csu_flt_ns_s {
1275 uint64_t partid : 16;
1276 uint64_t pmg : 8;
1277 uint64_t reserved_24_63 : 40;
1278 } s;
1279 /* struct ody_tad_cmn_msmon_cfg_csu_flt_ns_s cn; */
1280 };
1281 typedef union ody_tad_cmn_msmon_cfg_csu_flt_ns ody_tad_cmn_msmon_cfg_csu_flt_ns_t;
1282
1283 #define ODY_TAD_CMN_MSMON_CFG_CSU_FLT_NS ODY_TAD_CMN_MSMON_CFG_CSU_FLT_NS_FUNC()
1284 static inline uint64_t ODY_TAD_CMN_MSMON_CFG_CSU_FLT_NS_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MSMON_CFG_CSU_FLT_NS_FUNC(void)1285 static inline uint64_t ODY_TAD_CMN_MSMON_CFG_CSU_FLT_NS_FUNC(void)
1286 {
1287 return 0x87e053010810ll;
1288 }
1289
1290 #define typedef_ODY_TAD_CMN_MSMON_CFG_CSU_FLT_NS ody_tad_cmn_msmon_cfg_csu_flt_ns_t
1291 #define bustype_ODY_TAD_CMN_MSMON_CFG_CSU_FLT_NS CSR_TYPE_RSL
1292 #define basename_ODY_TAD_CMN_MSMON_CFG_CSU_FLT_NS "TAD_CMN_MSMON_CFG_CSU_FLT_NS"
1293 #define device_bar_ODY_TAD_CMN_MSMON_CFG_CSU_FLT_NS 0x0 /* PF_BAR0 */
1294 #define busnum_ODY_TAD_CMN_MSMON_CFG_CSU_FLT_NS 0
1295 #define arguments_ODY_TAD_CMN_MSMON_CFG_CSU_FLT_NS -1, -1, -1, -1
1296
1297 /**
1298 * Register (RSL) tad_cmn_msmon_cfg_csu_flt_s
1299 *
1300 * MPAM Memory System Monitor Configure Cache Storage Usage Monitor Filter Register
1301 * Configures PARTID and PMG to measure or count in the CSU monitor selected by
1302 * TAD_CMN_MSMON_CFG_MON_SEL_S.
1303 * TAD_CMN_MSMON_CFG_CSU_CTL_S sets filter conditions for the secure cache storage
1304 * usage monitor instance
1305 * selected by the secure instance of TAD_CMN_MSMON_CFG_MON_SEL_S.
1306 */
1307 union ody_tad_cmn_msmon_cfg_csu_flt_s {
1308 uint64_t u;
1309 struct ody_tad_cmn_msmon_cfg_csu_flt_s_s {
1310 uint64_t partid : 16;
1311 uint64_t pmg : 8;
1312 uint64_t reserved_24_63 : 40;
1313 } s;
1314 /* struct ody_tad_cmn_msmon_cfg_csu_flt_s_s cn; */
1315 };
1316 typedef union ody_tad_cmn_msmon_cfg_csu_flt_s ody_tad_cmn_msmon_cfg_csu_flt_s_t;
1317
1318 #define ODY_TAD_CMN_MSMON_CFG_CSU_FLT_S ODY_TAD_CMN_MSMON_CFG_CSU_FLT_S_FUNC()
1319 static inline uint64_t ODY_TAD_CMN_MSMON_CFG_CSU_FLT_S_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MSMON_CFG_CSU_FLT_S_FUNC(void)1320 static inline uint64_t ODY_TAD_CMN_MSMON_CFG_CSU_FLT_S_FUNC(void)
1321 {
1322 return 0x87e053020810ll;
1323 }
1324
1325 #define typedef_ODY_TAD_CMN_MSMON_CFG_CSU_FLT_S ody_tad_cmn_msmon_cfg_csu_flt_s_t
1326 #define bustype_ODY_TAD_CMN_MSMON_CFG_CSU_FLT_S CSR_TYPE_RSL
1327 #define basename_ODY_TAD_CMN_MSMON_CFG_CSU_FLT_S "TAD_CMN_MSMON_CFG_CSU_FLT_S"
1328 #define device_bar_ODY_TAD_CMN_MSMON_CFG_CSU_FLT_S 0x0 /* PF_BAR0 */
1329 #define busnum_ODY_TAD_CMN_MSMON_CFG_CSU_FLT_S 0
1330 #define arguments_ODY_TAD_CMN_MSMON_CFG_CSU_FLT_S -1, -1, -1, -1
1331
1332 /**
1333 * Register (RSL) tad_cmn_msmon_cfg_mon_sel_ns
1334 *
1335 * MPAM Monitor Instance Selection Register
1336 * Selects a monitor instance to access through the MSMON configuration and counter
1337 * registers. TAD_CMN_MSMON_CFG_MON_SEL_NS selects a Non-secure monitor instance
1338 * to access via the Non-secure MPAM feature page.
1339 *
1340 * To configure a monitor, set MON_SEL in this register to the index of the monitor
1341 * instance to configure, then write to the MSMON_CFG_x register to set the
1342 * configuration of the monitor. At a later time, read the monitor register (for
1343 * example TAD_MSMON_CSU_NS) to get the value of the monitor.
1344 */
1345 union ody_tad_cmn_msmon_cfg_mon_sel_ns {
1346 uint64_t u;
1347 struct ody_tad_cmn_msmon_cfg_mon_sel_ns_s {
1348 uint64_t mon_sel : 16;
1349 uint64_t reserved_16_23 : 8;
1350 uint64_t ris : 4;
1351 uint64_t reserved_28_63 : 36;
1352 } s;
1353 /* struct ody_tad_cmn_msmon_cfg_mon_sel_ns_s cn; */
1354 };
1355 typedef union ody_tad_cmn_msmon_cfg_mon_sel_ns ody_tad_cmn_msmon_cfg_mon_sel_ns_t;
1356
1357 #define ODY_TAD_CMN_MSMON_CFG_MON_SEL_NS ODY_TAD_CMN_MSMON_CFG_MON_SEL_NS_FUNC()
1358 static inline uint64_t ODY_TAD_CMN_MSMON_CFG_MON_SEL_NS_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MSMON_CFG_MON_SEL_NS_FUNC(void)1359 static inline uint64_t ODY_TAD_CMN_MSMON_CFG_MON_SEL_NS_FUNC(void)
1360 {
1361 return 0x87e053010800ll;
1362 }
1363
1364 #define typedef_ODY_TAD_CMN_MSMON_CFG_MON_SEL_NS ody_tad_cmn_msmon_cfg_mon_sel_ns_t
1365 #define bustype_ODY_TAD_CMN_MSMON_CFG_MON_SEL_NS CSR_TYPE_RSL
1366 #define basename_ODY_TAD_CMN_MSMON_CFG_MON_SEL_NS "TAD_CMN_MSMON_CFG_MON_SEL_NS"
1367 #define device_bar_ODY_TAD_CMN_MSMON_CFG_MON_SEL_NS 0x0 /* PF_BAR0 */
1368 #define busnum_ODY_TAD_CMN_MSMON_CFG_MON_SEL_NS 0
1369 #define arguments_ODY_TAD_CMN_MSMON_CFG_MON_SEL_NS -1, -1, -1, -1
1370
1371 /**
1372 * Register (RSL) tad_cmn_msmon_cfg_mon_sel_s
1373 *
1374 * MPAM Monitor Instance Selection Register
1375 * Selects a monitor instance to access through the MSMON configuration and counter
1376 * registers. TAD_CMN_MSMON_CFG_MON_SEL_S selects a secure monitor instance
1377 * to access via the secure MPAM feature page.
1378 *
1379 * To configure a monitor, set MON_SEL in this register to the index of the monitor
1380 * instance to configure, then write to the MSMON_CFG_x register to set the
1381 * configuration of the monitor. At a later time, read the monitor register (for
1382 * example TAD_MSMON_CSU_S) to get the value of the monitor.
1383 */
1384 union ody_tad_cmn_msmon_cfg_mon_sel_s {
1385 uint64_t u;
1386 struct ody_tad_cmn_msmon_cfg_mon_sel_s_s {
1387 uint64_t mon_sel : 16;
1388 uint64_t reserved_16_23 : 8;
1389 uint64_t ris : 4;
1390 uint64_t reserved_28_63 : 36;
1391 } s;
1392 /* struct ody_tad_cmn_msmon_cfg_mon_sel_s_s cn; */
1393 };
1394 typedef union ody_tad_cmn_msmon_cfg_mon_sel_s ody_tad_cmn_msmon_cfg_mon_sel_s_t;
1395
1396 #define ODY_TAD_CMN_MSMON_CFG_MON_SEL_S ODY_TAD_CMN_MSMON_CFG_MON_SEL_S_FUNC()
1397 static inline uint64_t ODY_TAD_CMN_MSMON_CFG_MON_SEL_S_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MSMON_CFG_MON_SEL_S_FUNC(void)1398 static inline uint64_t ODY_TAD_CMN_MSMON_CFG_MON_SEL_S_FUNC(void)
1399 {
1400 return 0x87e053020800ll;
1401 }
1402
1403 #define typedef_ODY_TAD_CMN_MSMON_CFG_MON_SEL_S ody_tad_cmn_msmon_cfg_mon_sel_s_t
1404 #define bustype_ODY_TAD_CMN_MSMON_CFG_MON_SEL_S CSR_TYPE_RSL
1405 #define basename_ODY_TAD_CMN_MSMON_CFG_MON_SEL_S "TAD_CMN_MSMON_CFG_MON_SEL_S"
1406 #define device_bar_ODY_TAD_CMN_MSMON_CFG_MON_SEL_S 0x0 /* PF_BAR0 */
1407 #define busnum_ODY_TAD_CMN_MSMON_CFG_MON_SEL_S 0
1408 #define arguments_ODY_TAD_CMN_MSMON_CFG_MON_SEL_S -1, -1, -1, -1
1409
1410 /**
1411 * Register (RSL) tad_cmn_msmon_csu_ns
1412 *
1413 * MPAM Cache Storage Usage Monitor Register
1414 * Accesses the CSU monitor selected by TAD_CMN_MSMON_CFG_MON_SEL_NS.
1415 * TAD_MSMON_CSU_NS is the Non-secure cache storage usage monitor instance selected by the
1416 * Non-secure instance of TAD_CMN_MSMON_CFG_MON_SEL_NS.
1417 */
1418 union ody_tad_cmn_msmon_csu_ns {
1419 uint64_t u;
1420 struct ody_tad_cmn_msmon_csu_ns_s {
1421 uint64_t value : 31;
1422 uint64_t nrdy : 1;
1423 uint64_t reserved_32_63 : 32;
1424 } s;
1425 /* struct ody_tad_cmn_msmon_csu_ns_s cn; */
1426 };
1427 typedef union ody_tad_cmn_msmon_csu_ns ody_tad_cmn_msmon_csu_ns_t;
1428
1429 #define ODY_TAD_CMN_MSMON_CSU_NS ODY_TAD_CMN_MSMON_CSU_NS_FUNC()
1430 static inline uint64_t ODY_TAD_CMN_MSMON_CSU_NS_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MSMON_CSU_NS_FUNC(void)1431 static inline uint64_t ODY_TAD_CMN_MSMON_CSU_NS_FUNC(void)
1432 {
1433 return 0x87e053010840ll;
1434 }
1435
1436 #define typedef_ODY_TAD_CMN_MSMON_CSU_NS ody_tad_cmn_msmon_csu_ns_t
1437 #define bustype_ODY_TAD_CMN_MSMON_CSU_NS CSR_TYPE_RSL
1438 #define basename_ODY_TAD_CMN_MSMON_CSU_NS "TAD_CMN_MSMON_CSU_NS"
1439 #define device_bar_ODY_TAD_CMN_MSMON_CSU_NS 0x0 /* PF_BAR0 */
1440 #define busnum_ODY_TAD_CMN_MSMON_CSU_NS 0
1441 #define arguments_ODY_TAD_CMN_MSMON_CSU_NS -1, -1, -1, -1
1442
1443 /**
1444 * Register (RSL) tad_cmn_msmon_csu_s
1445 *
1446 * MPAM Cache Storage Usage Monitor Register
1447 * Accesses the CSU monitor selected by TAD_CMN_MSMON_CFG_MON_SEL_S.
1448 * TAD_MSMON_CSU_S is the secure cache storage usage monitor instance selected by the
1449 * Non-secure instance of TAD_CMN_MSMON_CFG_MON_SEL_S.
1450 */
1451 union ody_tad_cmn_msmon_csu_s {
1452 uint64_t u;
1453 struct ody_tad_cmn_msmon_csu_s_s {
1454 uint64_t value : 31;
1455 uint64_t nrdy : 1;
1456 uint64_t reserved_32_63 : 32;
1457 } s;
1458 /* struct ody_tad_cmn_msmon_csu_s_s cn; */
1459 };
1460 typedef union ody_tad_cmn_msmon_csu_s ody_tad_cmn_msmon_csu_s_t;
1461
1462 #define ODY_TAD_CMN_MSMON_CSU_S ODY_TAD_CMN_MSMON_CSU_S_FUNC()
1463 static inline uint64_t ODY_TAD_CMN_MSMON_CSU_S_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_MSMON_CSU_S_FUNC(void)1464 static inline uint64_t ODY_TAD_CMN_MSMON_CSU_S_FUNC(void)
1465 {
1466 return 0x87e053020840ll;
1467 }
1468
1469 #define typedef_ODY_TAD_CMN_MSMON_CSU_S ody_tad_cmn_msmon_csu_s_t
1470 #define bustype_ODY_TAD_CMN_MSMON_CSU_S CSR_TYPE_RSL
1471 #define basename_ODY_TAD_CMN_MSMON_CSU_S "TAD_CMN_MSMON_CSU_S"
1472 #define device_bar_ODY_TAD_CMN_MSMON_CSU_S 0x0 /* PF_BAR0 */
1473 #define busnum_ODY_TAD_CMN_MSMON_CSU_S 0
1474 #define arguments_ODY_TAD_CMN_MSMON_CSU_S -1, -1, -1, -1
1475
1476 /**
1477 * Register (RSL) tad_cmn_req_retry
1478 *
1479 * TAD Common Request Retry Control Register
1480 * Controls TAD Request retry settings.
1481 */
1482 union ody_tad_cmn_req_retry {
1483 uint64_t u;
1484 struct ody_tad_cmn_req_retry_s {
1485 uint64_t sadr_req_low_wmark : 6;
1486 uint64_t sadr_req_high_wmark : 6;
1487 uint64_t sadr_pcrdtype_dis : 4;
1488 uint64_t max_wait_sbf : 7;
1489 uint64_t num_rsvd_sbf : 6;
1490 uint64_t reserved_29_63 : 35;
1491 } s;
1492 /* struct ody_tad_cmn_req_retry_s cn; */
1493 };
1494 typedef union ody_tad_cmn_req_retry ody_tad_cmn_req_retry_t;
1495
1496 #define ODY_TAD_CMN_REQ_RETRY ODY_TAD_CMN_REQ_RETRY_FUNC()
1497 static inline uint64_t ODY_TAD_CMN_REQ_RETRY_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_REQ_RETRY_FUNC(void)1498 static inline uint64_t ODY_TAD_CMN_REQ_RETRY_FUNC(void)
1499 {
1500 return 0x87e053000018ll;
1501 }
1502
1503 #define typedef_ODY_TAD_CMN_REQ_RETRY ody_tad_cmn_req_retry_t
1504 #define bustype_ODY_TAD_CMN_REQ_RETRY CSR_TYPE_RSL
1505 #define basename_ODY_TAD_CMN_REQ_RETRY "TAD_CMN_REQ_RETRY"
1506 #define device_bar_ODY_TAD_CMN_REQ_RETRY 0x0 /* PF_BAR0 */
1507 #define busnum_ODY_TAD_CMN_REQ_RETRY 0
1508 #define arguments_ODY_TAD_CMN_REQ_RETRY -1, -1, -1, -1
1509
1510 /**
1511 * Register (RSL) tad_cmn_scr_ctl
1512 *
1513 * TAD Common Scratchpad Control Register
1514 * Controls TAD Scratchpad settings.
1515 */
1516 union ody_tad_cmn_scr_ctl {
1517 uint64_t u;
1518 struct ody_tad_cmn_scr_ctl_s {
1519 uint64_t size : 5;
1520 uint64_t disnxm : 1;
1521 uint64_t reserved_6_53 : 48;
1522 uint64_t chunkways : 5;
1523 uint64_t maxsize : 5;
1524 } s;
1525 /* struct ody_tad_cmn_scr_ctl_s cn; */
1526 };
1527 typedef union ody_tad_cmn_scr_ctl ody_tad_cmn_scr_ctl_t;
1528
1529 #define ODY_TAD_CMN_SCR_CTL ODY_TAD_CMN_SCR_CTL_FUNC()
1530 static inline uint64_t ODY_TAD_CMN_SCR_CTL_FUNC(void) __attribute__ ((pure, always_inline));
ODY_TAD_CMN_SCR_CTL_FUNC(void)1531 static inline uint64_t ODY_TAD_CMN_SCR_CTL_FUNC(void)
1532 {
1533 return 0x87e053000038ll;
1534 }
1535
1536 #define typedef_ODY_TAD_CMN_SCR_CTL ody_tad_cmn_scr_ctl_t
1537 #define bustype_ODY_TAD_CMN_SCR_CTL CSR_TYPE_RSL
1538 #define basename_ODY_TAD_CMN_SCR_CTL "TAD_CMN_SCR_CTL"
1539 #define device_bar_ODY_TAD_CMN_SCR_CTL 0x0 /* PF_BAR0 */
1540 #define busnum_ODY_TAD_CMN_SCR_CTL 0
1541 #define arguments_ODY_TAD_CMN_SCR_CTL -1, -1, -1, -1
1542
1543 #endif /* __ODY_CSRS_TAD_CMN_H__ */
1544