1 #ifndef __ODY_CSRS_PEMRC_H__ 2 #define __ODY_CSRS_PEMRC_H__ 3 /* This file is auto-generated. Do not edit */ 4 5 /***********************license start*********************************** 6 * Copyright (C) 2021-2026 Marvell. 7 * SPDX-License-Identifier: BSD-3-Clause 8 * https://spdx.org/licenses 9 ***********************license end**************************************/ 10 11 12 /** 13 * @file 14 * 15 * Configuration and status register (CSR) address and type definitions for 16 * PEMRC. 17 * 18 * This file is auto generated. Do not edit. 19 * 20 */ 21 22 /** 23 * Enumeration pemrc_bar_e 24 * 25 * PEM Base Address Register Enumeration 26 * Enumerates the base address registers. 27 */ 28 #define ODY_PEMRC_BAR_E_PEMRCX_PF_BAR0(a) (0x8e0e00000000ll + 0x1000000000ll * (a)) 29 #define ODY_PEMRC_BAR_E_PEMRCX_PF_BAR0_SIZE 0x100000ull 30 31 /** 32 * Enumeration pemrc_int_vec_e 33 * 34 * PEM RC MSI-X Vector Enumeration 35 * Enumerates the MSI-X interrupt vectors. 36 */ 37 #define ODY_PEMRC_INT_VEC_E_ERROR_AERI (0) 38 #define ODY_PEMRC_INT_VEC_E_HP_PMEI (1) 39 40 /** 41 * Register (NCB) pemrc#_msix_pba# 42 * 43 * PEM RC MSI-X Pending Bit Array Registers 44 * This register is the MSI-X PBA table, the bit number is indexed by the PEMRC_INT_VEC_E enumeration. 45 */ 46 union ody_pemrcx_msix_pbax { 47 uint64_t u; 48 struct ody_pemrcx_msix_pbax_s { 49 uint64_t pend : 64; 50 } s; 51 /* struct ody_pemrcx_msix_pbax_s cn; */ 52 }; 53 typedef union ody_pemrcx_msix_pbax ody_pemrcx_msix_pbax_t; 54 55 static inline uint64_t ODY_PEMRCX_MSIX_PBAX(uint64_t a, uint64_t b) __attribute__ ((pure, always_inline)); 56 static inline uint64_t ODY_PEMRCX_MSIX_PBAX(uint64_t a, uint64_t b) 57 { 58 if ((a <= 15) && (b == 0)) 59 return 0x8e0e000f0000ll + 0x1000000000ll * ((a) & 0xf); 60 __ody_csr_fatal("PEMRCX_MSIX_PBAX", 2, a, b, 0, 0, 0, 0); 61 } 62 63 #define typedef_ODY_PEMRCX_MSIX_PBAX(a, b) ody_pemrcx_msix_pbax_t 64 #define bustype_ODY_PEMRCX_MSIX_PBAX(a, b) CSR_TYPE_NCB 65 #define basename_ODY_PEMRCX_MSIX_PBAX(a, b) "PEMRCX_MSIX_PBAX" 66 #define device_bar_ODY_PEMRCX_MSIX_PBAX(a, b) 0x0 /* PF_BAR0 */ 67 #define busnum_ODY_PEMRCX_MSIX_PBAX(a, b) (a) 68 #define arguments_ODY_PEMRCX_MSIX_PBAX(a, b) (a), (b), -1, -1 69 70 /** 71 * Register (NCB) pemrc#_msix_vec#_addr 72 * 73 * PEM RC MSI-X Vector Table Address Registers 74 * This register is the MSI-X vector table, indexed by the PEMRC_INT_VEC_E enumeration. 75 */ 76 union ody_pemrcx_msix_vecx_addr { 77 uint64_t u; 78 struct ody_pemrcx_msix_vecx_addr_s { 79 uint64_t secvec : 1; 80 uint64_t reserved_1 : 1; 81 uint64_t addr : 51; 82 uint64_t reserved_53_63 : 11; 83 } s; 84 /* struct ody_pemrcx_msix_vecx_addr_s cn; */ 85 }; 86 typedef union ody_pemrcx_msix_vecx_addr ody_pemrcx_msix_vecx_addr_t; 87 88 static inline uint64_t ODY_PEMRCX_MSIX_VECX_ADDR(uint64_t a, uint64_t b) __attribute__ ((pure, always_inline)); 89 static inline uint64_t ODY_PEMRCX_MSIX_VECX_ADDR(uint64_t a, uint64_t b) 90 { 91 if ((a <= 15) && (b <= 1)) 92 return 0x8e0e00000000ll + 0x1000000000ll * ((a) & 0xf) + 0x10ll * ((b) & 0x1); 93 __ody_csr_fatal("PEMRCX_MSIX_VECX_ADDR", 2, a, b, 0, 0, 0, 0); 94 } 95 96 #define typedef_ODY_PEMRCX_MSIX_VECX_ADDR(a, b) ody_pemrcx_msix_vecx_addr_t 97 #define bustype_ODY_PEMRCX_MSIX_VECX_ADDR(a, b) CSR_TYPE_NCB 98 #define basename_ODY_PEMRCX_MSIX_VECX_ADDR(a, b) "PEMRCX_MSIX_VECX_ADDR" 99 #define device_bar_ODY_PEMRCX_MSIX_VECX_ADDR(a, b) 0x0 /* PF_BAR0 */ 100 #define busnum_ODY_PEMRCX_MSIX_VECX_ADDR(a, b) (a) 101 #define arguments_ODY_PEMRCX_MSIX_VECX_ADDR(a, b) (a), (b), -1, -1 102 103 /** 104 * Register (NCB) pemrc#_msix_vec#_ctl 105 * 106 * PEM RC MSI-X Vector Table Control and Data Registers 107 * This register is the MSI-X vector table, indexed by the PEMRC_INT_VEC_E enumeration. 108 */ 109 union ody_pemrcx_msix_vecx_ctl { 110 uint64_t u; 111 struct ody_pemrcx_msix_vecx_ctl_s { 112 uint64_t data : 32; 113 uint64_t mask : 1; 114 uint64_t reserved_33_63 : 31; 115 } s; 116 /* struct ody_pemrcx_msix_vecx_ctl_s cn; */ 117 }; 118 typedef union ody_pemrcx_msix_vecx_ctl ody_pemrcx_msix_vecx_ctl_t; 119 120 static inline uint64_t ODY_PEMRCX_MSIX_VECX_CTL(uint64_t a, uint64_t b) __attribute__ ((pure, always_inline)); 121 static inline uint64_t ODY_PEMRCX_MSIX_VECX_CTL(uint64_t a, uint64_t b) 122 { 123 if ((a <= 15) && (b <= 1)) 124 return 0x8e0e00000008ll + 0x1000000000ll * ((a) & 0xf) + 0x10ll * ((b) & 0x1); 125 __ody_csr_fatal("PEMRCX_MSIX_VECX_CTL", 2, a, b, 0, 0, 0, 0); 126 } 127 128 #define typedef_ODY_PEMRCX_MSIX_VECX_CTL(a, b) ody_pemrcx_msix_vecx_ctl_t 129 #define bustype_ODY_PEMRCX_MSIX_VECX_CTL(a, b) CSR_TYPE_NCB 130 #define basename_ODY_PEMRCX_MSIX_VECX_CTL(a, b) "PEMRCX_MSIX_VECX_CTL" 131 #define device_bar_ODY_PEMRCX_MSIX_VECX_CTL(a, b) 0x0 /* PF_BAR0 */ 132 #define busnum_ODY_PEMRCX_MSIX_VECX_CTL(a, b) (a) 133 #define arguments_ODY_PEMRCX_MSIX_VECX_CTL(a, b) (a), (b), -1, -1 134 135 #endif /* __ODY_CSRS_PEMRC_H__ */ 136