1 #ifndef __ODY_CSRS_FUS_H__
2 #define __ODY_CSRS_FUS_H__
3 /* This file is auto-generated. Do not edit */
4
5 /***********************license start***********************************
6 * Copyright (C) 2021-2026 Marvell.
7 * SPDX-License-Identifier: BSD-3-Clause
8 * https://spdx.org/licenses
9 ***********************license end**************************************/
10
11
12 /**
13 * @file
14 *
15 * Configuration and status register (CSR) address and type definitions for
16 * FUS.
17 *
18 * This file is auto generated. Do not edit.
19 *
20 */
21
22 /**
23 * Enumeration fus_bar_e
24 *
25 * Fuse Base Address Register Enumeration
26 * Enumerates the base address registers.
27 */
28 #define ODY_FUS_BAR_E_FUS_PF_BAR0 (0x87e003000000ll)
29 #define ODY_FUS_BAR_E_FUS_PF_BAR0_SIZE 0x10000ull
30
31 /**
32 * Register (RSL) fus_bnk_dat#
33 *
34 * Fuse Bank Store Register
35 * The initial state of FUS_BNK_DAT() is as if bank6 were just read,
36 * i.e. DAT* = fus[895:768].
37 */
38 union ody_fus_bnk_datx {
39 uint64_t u;
40 struct ody_fus_bnk_datx_s {
41 uint64_t dat : 64;
42 } s;
43 /* struct ody_fus_bnk_datx_s cn; */
44 };
45 typedef union ody_fus_bnk_datx ody_fus_bnk_datx_t;
46
47 static inline uint64_t ODY_FUS_BNK_DATX(uint64_t a) __attribute__ ((pure, always_inline));
ODY_FUS_BNK_DATX(uint64_t a)48 static inline uint64_t ODY_FUS_BNK_DATX(uint64_t a)
49 {
50 if (a <= 1)
51 return 0x87e003001520ll + 8ll * ((a) & 0x1);
52 __ody_csr_fatal("FUS_BNK_DATX", 1, a, 0, 0, 0, 0, 0);
53 }
54
55 #define typedef_ODY_FUS_BNK_DATX(a) ody_fus_bnk_datx_t
56 #define bustype_ODY_FUS_BNK_DATX(a) CSR_TYPE_RSL
57 #define basename_ODY_FUS_BNK_DATX(a) "FUS_BNK_DATX"
58 #define device_bar_ODY_FUS_BNK_DATX(a) 0x0 /* PF_BAR0 */
59 #define busnum_ODY_FUS_BNK_DATX(a) (a)
60 #define arguments_ODY_FUS_BNK_DATX(a) (a), -1, -1, -1
61
62 /**
63 * Register (RSL) fus_cache#
64 *
65 * Fuse Cache Register
66 * This register returns the cached state of every fuse, organized into 64-fuse
67 * chunks. Each bit corresponds to a fuse enumerated by FUSE_NUM_E.
68 */
69 union ody_fus_cachex {
70 uint64_t u;
71 struct ody_fus_cachex_s {
72 uint64_t data : 64;
73 } s;
74 /* struct ody_fus_cachex_s cn; */
75 };
76 typedef union ody_fus_cachex ody_fus_cachex_t;
77
78 static inline uint64_t ODY_FUS_CACHEX(uint64_t a) __attribute__ ((pure, always_inline));
ODY_FUS_CACHEX(uint64_t a)79 static inline uint64_t ODY_FUS_CACHEX(uint64_t a)
80 {
81 if (a <= 63)
82 return 0x87e003001000ll + 8ll * ((a) & 0x3f);
83 __ody_csr_fatal("FUS_CACHEX", 1, a, 0, 0, 0, 0, 0);
84 }
85
86 #define typedef_ODY_FUS_CACHEX(a) ody_fus_cachex_t
87 #define bustype_ODY_FUS_CACHEX(a) CSR_TYPE_RSL
88 #define basename_ODY_FUS_CACHEX(a) "FUS_CACHEX"
89 #define device_bar_ODY_FUS_CACHEX(a) 0x0 /* PF_BAR0 */
90 #define busnum_ODY_FUS_CACHEX(a) (a)
91 #define arguments_ODY_FUS_CACHEX(a) (a), -1, -1, -1
92
93 /**
94 * Register (RSL) fus_const
95 *
96 * Fuse Constants Register
97 */
98 union ody_fus_const {
99 uint64_t u;
100 struct ody_fus_const_s {
101 uint64_t fuse_banks : 8;
102 uint64_t repair_banks : 8;
103 uint64_t extra_banks : 8;
104 uint64_t reserved_24_63 : 40;
105 } s;
106 /* struct ody_fus_const_s cn; */
107 };
108 typedef union ody_fus_const ody_fus_const_t;
109
110 #define ODY_FUS_CONST ODY_FUS_CONST_FUNC()
111 static inline uint64_t ODY_FUS_CONST_FUNC(void) __attribute__ ((pure, always_inline));
ODY_FUS_CONST_FUNC(void)112 static inline uint64_t ODY_FUS_CONST_FUNC(void)
113 {
114 return 0x87e003001578ll;
115 }
116
117 #define typedef_ODY_FUS_CONST ody_fus_const_t
118 #define bustype_ODY_FUS_CONST CSR_TYPE_RSL
119 #define basename_ODY_FUS_CONST "FUS_CONST"
120 #define device_bar_ODY_FUS_CONST 0x0 /* PF_BAR0 */
121 #define busnum_ODY_FUS_CONST 0
122 #define arguments_ODY_FUS_CONST -1, -1, -1, -1
123
124 /**
125 * Register (RSL) fus_rcmd
126 *
127 * Fuse Read Command Register
128 * Read Fuse Banks.
129 */
130 union ody_fus_rcmd {
131 uint64_t u;
132 struct ody_fus_rcmd_s {
133 uint64_t reserved_0_3 : 4;
134 uint64_t addr : 7;
135 uint64_t reserved_11 : 1;
136 uint64_t pend : 1;
137 uint64_t reserved_13 : 1;
138 uint64_t voltage : 1;
139 uint64_t efuse : 1;
140 uint64_t reserved_16_63 : 48;
141 } s;
142 /* struct ody_fus_rcmd_s cn; */
143 };
144 typedef union ody_fus_rcmd ody_fus_rcmd_t;
145
146 #define ODY_FUS_RCMD ODY_FUS_RCMD_FUNC()
147 static inline uint64_t ODY_FUS_RCMD_FUNC(void) __attribute__ ((pure, always_inline));
ODY_FUS_RCMD_FUNC(void)148 static inline uint64_t ODY_FUS_RCMD_FUNC(void)
149 {
150 return 0x87e003001500ll;
151 }
152
153 #define typedef_ODY_FUS_RCMD ody_fus_rcmd_t
154 #define bustype_ODY_FUS_RCMD CSR_TYPE_RSL
155 #define basename_ODY_FUS_RCMD "FUS_RCMD"
156 #define device_bar_ODY_FUS_RCMD 0x0 /* PF_BAR0 */
157 #define busnum_ODY_FUS_RCMD 0
158 #define arguments_ODY_FUS_RCMD -1, -1, -1, -1
159
160 /**
161 * Register (RSL) fus_read_times
162 *
163 * Fuse Read Times Register
164 * The reset values correspond to accesses of internal fuses with PLL reference clock
165 * up to 115 MHz. If any of the formulas below result in a value less than 0x0, the
166 * corresponding timing parameter should be set to zero.
167 *
168 * Prior to issuing a read operation to the fuse banks (via FUS_RCMD),
169 * this register should be written with the timing parameters that will be read.
170 * This register should not be written while FUS_RCMD[PEND] = 1.
171 */
172 union ody_fus_read_times {
173 uint64_t u;
174 struct ody_fus_read_times_s {
175 uint64_t setup : 4;
176 uint64_t asu : 4;
177 uint64_t rdstb_wh : 4;
178 uint64_t wrstb_wh : 12;
179 uint64_t ahd : 4;
180 uint64_t done : 4;
181 uint64_t margin : 1;
182 uint64_t reserved_33_63 : 31;
183 } s;
184 /* struct ody_fus_read_times_s cn; */
185 };
186 typedef union ody_fus_read_times ody_fus_read_times_t;
187
188 #define ODY_FUS_READ_TIMES ODY_FUS_READ_TIMES_FUNC()
189 static inline uint64_t ODY_FUS_READ_TIMES_FUNC(void) __attribute__ ((pure, always_inline));
ODY_FUS_READ_TIMES_FUNC(void)190 static inline uint64_t ODY_FUS_READ_TIMES_FUNC(void)
191 {
192 return 0x87e003001570ll;
193 }
194
195 #define typedef_ODY_FUS_READ_TIMES ody_fus_read_times_t
196 #define bustype_ODY_FUS_READ_TIMES CSR_TYPE_RSL
197 #define basename_ODY_FUS_READ_TIMES "FUS_READ_TIMES"
198 #define device_bar_ODY_FUS_READ_TIMES 0x0 /* PF_BAR0 */
199 #define busnum_ODY_FUS_READ_TIMES 0
200 #define arguments_ODY_FUS_READ_TIMES -1, -1, -1, -1
201
202 #endif /* __ODY_CSRS_FUS_H__ */
203