1 #ifndef __ODY_CSRS_EHSM_H__ 2 #define __ODY_CSRS_EHSM_H__ 3 /* This file is auto-generated. Do not edit */ 4 5 /***********************license start*********************************** 6 * Copyright (C) 2021-2026 Marvell. 7 * SPDX-License-Identifier: BSD-3-Clause 8 * https://spdx.org/licenses 9 ***********************license end**************************************/ 10 11 12 /** 13 * @file 14 * 15 * Configuration and status register (CSR) address and type definitions for 16 * EHSM. 17 * 18 * This file is auto generated. Do not edit. 19 * 20 */ 21 22 /** 23 * Enumeration ehsm_bar_e 24 * 25 * EHSM Base Address Register Enumeration 26 * Enumerates the base address registers. 27 */ 28 #define ODY_EHSM_BAR_E_EHSM_PF_BAR0 (0x80b000000000ll) 29 #define ODY_EHSM_BAR_E_EHSM_PF_BAR0_SIZE 0x100000ull 30 31 /** 32 * Register (NCB32b) ehsm_biu_boot_strap_pin_status 33 * 34 * EHSM Biu Boot Strap Pin Status Register 35 * This is for EHSM-78 36 */ 37 union ody_ehsm_biu_boot_strap_pin_status { 38 uint32_t u; 39 struct ody_ehsm_biu_boot_strap_pin_status_s { 40 uint32_t disable_boot_strap0 : 1; 41 uint32_t disable_boot_strap1 : 1; 42 uint32_t disable_boot_strap2 : 1; 43 uint32_t disable_boot_strap3 : 1; 44 uint32_t disable_boot_strap4 : 1; 45 uint32_t disable_boot_strap5 : 1; 46 uint32_t disable_boot_strap6 : 1; 47 uint32_t disable_boot_strap7 : 1; 48 uint32_t disable_boot_strap8 : 1; 49 uint32_t disable_boot_strap9 : 1; 50 uint32_t disable_boot_strap10 : 1; 51 uint32_t disable_boot_strap11 : 1; 52 uint32_t disable_boot_strap12 : 1; 53 uint32_t disable_boot_strap13 : 1; 54 uint32_t disable_boot_strap14 : 1; 55 uint32_t disable_boot_strap15 : 1; 56 uint32_t disable_boot_strap16 : 1; 57 uint32_t disable_boot_strap17 : 1; 58 uint32_t disable_boot_strap18 : 1; 59 uint32_t disable_boot_strap19 : 1; 60 uint32_t disable_boot_strap20 : 1; 61 uint32_t disable_boot_strap21 : 1; 62 uint32_t disable_boot_strap22 : 1; 63 uint32_t disable_boot_strap23 : 1; 64 uint32_t disable_boot_strap24 : 1; 65 uint32_t disable_boot_strap25 : 1; 66 uint32_t disable_boot_strap26 : 1; 67 uint32_t disable_boot_strap27 : 1; 68 uint32_t disable_boot_strap28 : 1; 69 uint32_t disable_boot_strap29 : 1; 70 uint32_t disable_boot_strap30 : 1; 71 uint32_t disable_boot_strap31 : 1; 72 } s; 73 /* struct ody_ehsm_biu_boot_strap_pin_status_s cn; */ 74 }; 75 typedef union ody_ehsm_biu_boot_strap_pin_status ody_ehsm_biu_boot_strap_pin_status_t; 76 77 #define ODY_EHSM_BIU_BOOT_STRAP_PIN_STATUS ODY_EHSM_BIU_BOOT_STRAP_PIN_STATUS_FUNC() 78 static inline uint64_t ODY_EHSM_BIU_BOOT_STRAP_PIN_STATUS_FUNC(void) __attribute__ ((pure, always_inline)); 79 static inline uint64_t ODY_EHSM_BIU_BOOT_STRAP_PIN_STATUS_FUNC(void) 80 { 81 return 0x80b000000128ll; 82 } 83 84 #define typedef_ODY_EHSM_BIU_BOOT_STRAP_PIN_STATUS ody_ehsm_biu_boot_strap_pin_status_t 85 #define bustype_ODY_EHSM_BIU_BOOT_STRAP_PIN_STATUS CSR_TYPE_NCB32b 86 #define basename_ODY_EHSM_BIU_BOOT_STRAP_PIN_STATUS "EHSM_BIU_BOOT_STRAP_PIN_STATUS" 87 #define device_bar_ODY_EHSM_BIU_BOOT_STRAP_PIN_STATUS 0x0 /* PF_BAR0 */ 88 #define busnum_ODY_EHSM_BIU_BOOT_STRAP_PIN_STATUS 0 89 #define arguments_ODY_EHSM_BIU_BOOT_STRAP_PIN_STATUS -1, -1, -1, -1 90 91 /** 92 * Register (NCB32b) ehsm_biu_bootrom_config_status 93 * 94 * EHSM Biu Bootrom Config Status Register 95 * This is for EHSM-78 96 */ 97 union ody_ehsm_biu_bootrom_config_status { 98 uint32_t u; 99 struct ody_ehsm_biu_bootrom_config_status_s { 100 uint32_t secure_boot : 1; 101 uint32_t encrypted_boot : 1; 102 uint32_t measured_boot : 1; 103 uint32_t secure_boot_lock : 1; 104 uint32_t encrypted_boot_lock : 1; 105 uint32_t measured_boot_lock : 1; 106 uint32_t dsa_scheme_id : 5; 107 uint32_t aes_scheme_id : 5; 108 uint32_t dice_scheme_id : 3; 109 uint32_t bootrom_rsvd_param : 12; 110 uint32_t reserved_31 : 1; 111 } s; 112 /* struct ody_ehsm_biu_bootrom_config_status_s cn; */ 113 }; 114 typedef union ody_ehsm_biu_bootrom_config_status ody_ehsm_biu_bootrom_config_status_t; 115 116 #define ODY_EHSM_BIU_BOOTROM_CONFIG_STATUS ODY_EHSM_BIU_BOOTROM_CONFIG_STATUS_FUNC() 117 static inline uint64_t ODY_EHSM_BIU_BOOTROM_CONFIG_STATUS_FUNC(void) __attribute__ ((pure, always_inline)); 118 static inline uint64_t ODY_EHSM_BIU_BOOTROM_CONFIG_STATUS_FUNC(void) 119 { 120 return 0x80b000000118ll; 121 } 122 123 #define typedef_ODY_EHSM_BIU_BOOTROM_CONFIG_STATUS ody_ehsm_biu_bootrom_config_status_t 124 #define bustype_ODY_EHSM_BIU_BOOTROM_CONFIG_STATUS CSR_TYPE_NCB32b 125 #define basename_ODY_EHSM_BIU_BOOTROM_CONFIG_STATUS "EHSM_BIU_BOOTROM_CONFIG_STATUS" 126 #define device_bar_ODY_EHSM_BIU_BOOTROM_CONFIG_STATUS 0x0 /* PF_BAR0 */ 127 #define busnum_ODY_EHSM_BIU_BOOTROM_CONFIG_STATUS 0 128 #define arguments_ODY_EHSM_BIU_BOOTROM_CONFIG_STATUS -1, -1, -1, -1 129 130 /** 131 * Register (NCB32b) ehsm_biu_chain_of_trust_status 132 * 133 * EHSM Biu Chain Of Trust Status Register 134 * This reigster is for IROM to program runtime trust status bits. 135 */ 136 union ody_ehsm_biu_chain_of_trust_status { 137 uint32_t u; 138 struct ody_ehsm_biu_chain_of_trust_status_s { 139 uint32_t pie_load_status : 1; 140 uint32_t reserved_1 : 1; 141 uint32_t key_manifest_load_status : 1; 142 uint32_t key_manifest_lock_status : 1; 143 uint32_t uds_lock_status : 1; 144 uint32_t soc_noise_injection : 1; 145 uint32_t pie_lock_status : 1; 146 uint32_t irom_panic_state : 1; 147 uint32_t reserved_8_31 : 24; 148 } s; 149 /* struct ody_ehsm_biu_chain_of_trust_status_s cn; */ 150 }; 151 typedef union ody_ehsm_biu_chain_of_trust_status ody_ehsm_biu_chain_of_trust_status_t; 152 153 #define ODY_EHSM_BIU_CHAIN_OF_TRUST_STATUS ODY_EHSM_BIU_CHAIN_OF_TRUST_STATUS_FUNC() 154 static inline uint64_t ODY_EHSM_BIU_CHAIN_OF_TRUST_STATUS_FUNC(void) __attribute__ ((pure, always_inline)); 155 static inline uint64_t ODY_EHSM_BIU_CHAIN_OF_TRUST_STATUS_FUNC(void) 156 { 157 return 0x80b000000130ll; 158 } 159 160 #define typedef_ODY_EHSM_BIU_CHAIN_OF_TRUST_STATUS ody_ehsm_biu_chain_of_trust_status_t 161 #define bustype_ODY_EHSM_BIU_CHAIN_OF_TRUST_STATUS CSR_TYPE_NCB32b 162 #define basename_ODY_EHSM_BIU_CHAIN_OF_TRUST_STATUS "EHSM_BIU_CHAIN_OF_TRUST_STATUS" 163 #define device_bar_ODY_EHSM_BIU_CHAIN_OF_TRUST_STATUS 0x0 /* PF_BAR0 */ 164 #define busnum_ODY_EHSM_BIU_CHAIN_OF_TRUST_STATUS 0 165 #define arguments_ODY_EHSM_BIU_CHAIN_OF_TRUST_STATUS -1, -1, -1, -1 166 167 /** 168 * Register (NCB32b) ehsm_biu_cmd_fifo_status 169 * 170 * EHSM Biu Cmd Fifo Status Register 171 */ 172 union ody_ehsm_biu_cmd_fifo_status { 173 uint32_t u; 174 struct ody_ehsm_biu_cmd_fifo_status_s { 175 uint32_t cmd_cntr : 4; 176 uint32_t core1_cmd_buffer_full : 1; 177 uint32_t core2_cmd_buffer_full : 1; 178 uint32_t core1_cmd_status_read_done : 1; 179 uint32_t core2_cmd_status_read_done : 1; 180 uint32_t cmd_status : 8; 181 uint32_t cmd_exe_core_id : 1; 182 uint32_t reserved_17_31 : 15; 183 } s; 184 /* struct ody_ehsm_biu_cmd_fifo_status_s cn; */ 185 }; 186 typedef union ody_ehsm_biu_cmd_fifo_status ody_ehsm_biu_cmd_fifo_status_t; 187 188 #define ODY_EHSM_BIU_CMD_FIFO_STATUS ODY_EHSM_BIU_CMD_FIFO_STATUS_FUNC() 189 static inline uint64_t ODY_EHSM_BIU_CMD_FIFO_STATUS_FUNC(void) __attribute__ ((pure, always_inline)); 190 static inline uint64_t ODY_EHSM_BIU_CMD_FIFO_STATUS_FUNC(void) 191 { 192 return 0x80b0000000c4ll; 193 } 194 195 #define typedef_ODY_EHSM_BIU_CMD_FIFO_STATUS ody_ehsm_biu_cmd_fifo_status_t 196 #define bustype_ODY_EHSM_BIU_CMD_FIFO_STATUS CSR_TYPE_NCB32b 197 #define basename_ODY_EHSM_BIU_CMD_FIFO_STATUS "EHSM_BIU_CMD_FIFO_STATUS" 198 #define device_bar_ODY_EHSM_BIU_CMD_FIFO_STATUS 0x0 /* PF_BAR0 */ 199 #define busnum_ODY_EHSM_BIU_CMD_FIFO_STATUS 0 200 #define arguments_ODY_EHSM_BIU_CMD_FIFO_STATUS -1, -1, -1, -1 201 202 /** 203 * Register (NCB32b) ehsm_biu_context_status 204 * 205 * EHSM Biu Context Status Register 206 */ 207 union ody_ehsm_biu_context_status { 208 uint32_t u; 209 struct ody_ehsm_biu_context_status_s { 210 uint32_t context_status : 32; 211 } s; 212 /* struct ody_ehsm_biu_context_status_s cn; */ 213 }; 214 typedef union ody_ehsm_biu_context_status ody_ehsm_biu_context_status_t; 215 216 #define ODY_EHSM_BIU_CONTEXT_STATUS ODY_EHSM_BIU_CONTEXT_STATUS_FUNC() 217 static inline uint64_t ODY_EHSM_BIU_CONTEXT_STATUS_FUNC(void) __attribute__ ((pure, always_inline)); 218 static inline uint64_t ODY_EHSM_BIU_CONTEXT_STATUS_FUNC(void) 219 { 220 return 0x80b0000000e0ll; 221 } 222 223 #define typedef_ODY_EHSM_BIU_CONTEXT_STATUS ody_ehsm_biu_context_status_t 224 #define bustype_ODY_EHSM_BIU_CONTEXT_STATUS CSR_TYPE_NCB32b 225 #define basename_ODY_EHSM_BIU_CONTEXT_STATUS "EHSM_BIU_CONTEXT_STATUS" 226 #define device_bar_ODY_EHSM_BIU_CONTEXT_STATUS 0x0 /* PF_BAR0 */ 227 #define busnum_ODY_EHSM_BIU_CONTEXT_STATUS 0 228 #define arguments_ODY_EHSM_BIU_CONTEXT_STATUS -1, -1, -1, -1 229 230 /** 231 * Register (NCB32b) ehsm_biu_core1_cmd 232 * 233 * EHSM Biu Core1 Cmd Register 234 */ 235 union ody_ehsm_biu_core1_cmd { 236 uint32_t u; 237 struct ody_ehsm_biu_core1_cmd_s { 238 uint32_t cmd : 16; 239 uint32_t reserved_16_19 : 4; 240 uint32_t host_core_id : 12; 241 } s; 242 /* struct ody_ehsm_biu_core1_cmd_s cn; */ 243 }; 244 typedef union ody_ehsm_biu_core1_cmd ody_ehsm_biu_core1_cmd_t; 245 246 #define ODY_EHSM_BIU_CORE1_CMD ODY_EHSM_BIU_CORE1_CMD_FUNC() 247 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_FUNC(void) __attribute__ ((pure, always_inline)); 248 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_FUNC(void) 249 { 250 return 0x80b000000040ll; 251 } 252 253 #define typedef_ODY_EHSM_BIU_CORE1_CMD ody_ehsm_biu_core1_cmd_t 254 #define bustype_ODY_EHSM_BIU_CORE1_CMD CSR_TYPE_NCB32b 255 #define basename_ODY_EHSM_BIU_CORE1_CMD "EHSM_BIU_CORE1_CMD" 256 #define device_bar_ODY_EHSM_BIU_CORE1_CMD 0x0 /* PF_BAR0 */ 257 #define busnum_ODY_EHSM_BIU_CORE1_CMD 0 258 #define arguments_ODY_EHSM_BIU_CORE1_CMD -1, -1, -1, -1 259 260 /** 261 * Register (NCB32b) ehsm_biu_core1_cmd_param0 262 * 263 * EHSM Biu Core1 Cmd Param0 Register 264 * This register contains parameter 0 associated with a EHSM primitive command from 265 * host processor core 1. There are a total of 16 spaces for primitive command 266 * parameters. When the host processor core 1 wants to send a primitive command to 267 * EHSM, it must first write all the associated parameters (if any). Once all the 268 * parameters associated with a primitive command have been written, the host processor 269 * core 1 can write the associated primitive command to the CORE1_CMD register. Host 270 * does not need to write the unused parameters. The CM3 processor has read access to 271 * all 16 Command Parameter registers, but no write access. 272 */ 273 union ody_ehsm_biu_core1_cmd_param0 { 274 uint32_t u; 275 struct ody_ehsm_biu_core1_cmd_param0_s { 276 uint32_t core1_cmd_param0 : 32; 277 } s; 278 /* struct ody_ehsm_biu_core1_cmd_param0_s cn; */ 279 }; 280 typedef union ody_ehsm_biu_core1_cmd_param0 ody_ehsm_biu_core1_cmd_param0_t; 281 282 #define ODY_EHSM_BIU_CORE1_CMD_PARAM0 ODY_EHSM_BIU_CORE1_CMD_PARAM0_FUNC() 283 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM0_FUNC(void) __attribute__ ((pure, always_inline)); 284 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM0_FUNC(void) 285 { 286 return 0x80b000000000ll; 287 } 288 289 #define typedef_ODY_EHSM_BIU_CORE1_CMD_PARAM0 ody_ehsm_biu_core1_cmd_param0_t 290 #define bustype_ODY_EHSM_BIU_CORE1_CMD_PARAM0 CSR_TYPE_NCB32b 291 #define basename_ODY_EHSM_BIU_CORE1_CMD_PARAM0 "EHSM_BIU_CORE1_CMD_PARAM0" 292 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_PARAM0 0x0 /* PF_BAR0 */ 293 #define busnum_ODY_EHSM_BIU_CORE1_CMD_PARAM0 0 294 #define arguments_ODY_EHSM_BIU_CORE1_CMD_PARAM0 -1, -1, -1, -1 295 296 /** 297 * Register (NCB32b) ehsm_biu_core1_cmd_param1 298 * 299 * EHSM Biu Core1 Cmd Param1 Register 300 * This register contains parameter 1 associated with a EHSM primitive command from 301 * host processor core 1. 302 */ 303 union ody_ehsm_biu_core1_cmd_param1 { 304 uint32_t u; 305 struct ody_ehsm_biu_core1_cmd_param1_s { 306 uint32_t core1_cmd_param1 : 32; 307 } s; 308 /* struct ody_ehsm_biu_core1_cmd_param1_s cn; */ 309 }; 310 typedef union ody_ehsm_biu_core1_cmd_param1 ody_ehsm_biu_core1_cmd_param1_t; 311 312 #define ODY_EHSM_BIU_CORE1_CMD_PARAM1 ODY_EHSM_BIU_CORE1_CMD_PARAM1_FUNC() 313 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM1_FUNC(void) __attribute__ ((pure, always_inline)); 314 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM1_FUNC(void) 315 { 316 return 0x80b000000004ll; 317 } 318 319 #define typedef_ODY_EHSM_BIU_CORE1_CMD_PARAM1 ody_ehsm_biu_core1_cmd_param1_t 320 #define bustype_ODY_EHSM_BIU_CORE1_CMD_PARAM1 CSR_TYPE_NCB32b 321 #define basename_ODY_EHSM_BIU_CORE1_CMD_PARAM1 "EHSM_BIU_CORE1_CMD_PARAM1" 322 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_PARAM1 0x0 /* PF_BAR0 */ 323 #define busnum_ODY_EHSM_BIU_CORE1_CMD_PARAM1 0 324 #define arguments_ODY_EHSM_BIU_CORE1_CMD_PARAM1 -1, -1, -1, -1 325 326 /** 327 * Register (NCB32b) ehsm_biu_core1_cmd_param10 328 * 329 * EHSM Biu Core1 Cmd Param10 Register 330 * This register contains parameter 10 associated with a EHSM primitive command from 331 * host processor core 1. 332 */ 333 union ody_ehsm_biu_core1_cmd_param10 { 334 uint32_t u; 335 struct ody_ehsm_biu_core1_cmd_param10_s { 336 uint32_t core1_cmd_param10 : 32; 337 } s; 338 /* struct ody_ehsm_biu_core1_cmd_param10_s cn; */ 339 }; 340 typedef union ody_ehsm_biu_core1_cmd_param10 ody_ehsm_biu_core1_cmd_param10_t; 341 342 #define ODY_EHSM_BIU_CORE1_CMD_PARAM10 ODY_EHSM_BIU_CORE1_CMD_PARAM10_FUNC() 343 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM10_FUNC(void) __attribute__ ((pure, always_inline)); 344 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM10_FUNC(void) 345 { 346 return 0x80b000000028ll; 347 } 348 349 #define typedef_ODY_EHSM_BIU_CORE1_CMD_PARAM10 ody_ehsm_biu_core1_cmd_param10_t 350 #define bustype_ODY_EHSM_BIU_CORE1_CMD_PARAM10 CSR_TYPE_NCB32b 351 #define basename_ODY_EHSM_BIU_CORE1_CMD_PARAM10 "EHSM_BIU_CORE1_CMD_PARAM10" 352 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_PARAM10 0x0 /* PF_BAR0 */ 353 #define busnum_ODY_EHSM_BIU_CORE1_CMD_PARAM10 0 354 #define arguments_ODY_EHSM_BIU_CORE1_CMD_PARAM10 -1, -1, -1, -1 355 356 /** 357 * Register (NCB32b) ehsm_biu_core1_cmd_param11 358 * 359 * EHSM Biu Core1 Cmd Param11 Register 360 * This register contains parameter 11 associated with a EHSM primitive command from 361 * host processor core 1. 362 */ 363 union ody_ehsm_biu_core1_cmd_param11 { 364 uint32_t u; 365 struct ody_ehsm_biu_core1_cmd_param11_s { 366 uint32_t core1_cmd_param11 : 32; 367 } s; 368 /* struct ody_ehsm_biu_core1_cmd_param11_s cn; */ 369 }; 370 typedef union ody_ehsm_biu_core1_cmd_param11 ody_ehsm_biu_core1_cmd_param11_t; 371 372 #define ODY_EHSM_BIU_CORE1_CMD_PARAM11 ODY_EHSM_BIU_CORE1_CMD_PARAM11_FUNC() 373 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM11_FUNC(void) __attribute__ ((pure, always_inline)); 374 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM11_FUNC(void) 375 { 376 return 0x80b00000002cll; 377 } 378 379 #define typedef_ODY_EHSM_BIU_CORE1_CMD_PARAM11 ody_ehsm_biu_core1_cmd_param11_t 380 #define bustype_ODY_EHSM_BIU_CORE1_CMD_PARAM11 CSR_TYPE_NCB32b 381 #define basename_ODY_EHSM_BIU_CORE1_CMD_PARAM11 "EHSM_BIU_CORE1_CMD_PARAM11" 382 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_PARAM11 0x0 /* PF_BAR0 */ 383 #define busnum_ODY_EHSM_BIU_CORE1_CMD_PARAM11 0 384 #define arguments_ODY_EHSM_BIU_CORE1_CMD_PARAM11 -1, -1, -1, -1 385 386 /** 387 * Register (NCB32b) ehsm_biu_core1_cmd_param12 388 * 389 * EHSM Biu Core1 Cmd Param12 Register 390 * This register contains parameter 12 associated with a EHSM primitive command from 391 * host processor core 1. 392 */ 393 union ody_ehsm_biu_core1_cmd_param12 { 394 uint32_t u; 395 struct ody_ehsm_biu_core1_cmd_param12_s { 396 uint32_t core1_cmd_param12 : 32; 397 } s; 398 /* struct ody_ehsm_biu_core1_cmd_param12_s cn; */ 399 }; 400 typedef union ody_ehsm_biu_core1_cmd_param12 ody_ehsm_biu_core1_cmd_param12_t; 401 402 #define ODY_EHSM_BIU_CORE1_CMD_PARAM12 ODY_EHSM_BIU_CORE1_CMD_PARAM12_FUNC() 403 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM12_FUNC(void) __attribute__ ((pure, always_inline)); 404 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM12_FUNC(void) 405 { 406 return 0x80b000000030ll; 407 } 408 409 #define typedef_ODY_EHSM_BIU_CORE1_CMD_PARAM12 ody_ehsm_biu_core1_cmd_param12_t 410 #define bustype_ODY_EHSM_BIU_CORE1_CMD_PARAM12 CSR_TYPE_NCB32b 411 #define basename_ODY_EHSM_BIU_CORE1_CMD_PARAM12 "EHSM_BIU_CORE1_CMD_PARAM12" 412 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_PARAM12 0x0 /* PF_BAR0 */ 413 #define busnum_ODY_EHSM_BIU_CORE1_CMD_PARAM12 0 414 #define arguments_ODY_EHSM_BIU_CORE1_CMD_PARAM12 -1, -1, -1, -1 415 416 /** 417 * Register (NCB32b) ehsm_biu_core1_cmd_param13 418 * 419 * EHSM Biu Core1 Cmd Param13 Register 420 * This register contains parameter 13 associated with a EHSM primitive command from 421 * host processor core 1. 422 */ 423 union ody_ehsm_biu_core1_cmd_param13 { 424 uint32_t u; 425 struct ody_ehsm_biu_core1_cmd_param13_s { 426 uint32_t core1_cmd_param13 : 32; 427 } s; 428 /* struct ody_ehsm_biu_core1_cmd_param13_s cn; */ 429 }; 430 typedef union ody_ehsm_biu_core1_cmd_param13 ody_ehsm_biu_core1_cmd_param13_t; 431 432 #define ODY_EHSM_BIU_CORE1_CMD_PARAM13 ODY_EHSM_BIU_CORE1_CMD_PARAM13_FUNC() 433 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM13_FUNC(void) __attribute__ ((pure, always_inline)); 434 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM13_FUNC(void) 435 { 436 return 0x80b000000034ll; 437 } 438 439 #define typedef_ODY_EHSM_BIU_CORE1_CMD_PARAM13 ody_ehsm_biu_core1_cmd_param13_t 440 #define bustype_ODY_EHSM_BIU_CORE1_CMD_PARAM13 CSR_TYPE_NCB32b 441 #define basename_ODY_EHSM_BIU_CORE1_CMD_PARAM13 "EHSM_BIU_CORE1_CMD_PARAM13" 442 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_PARAM13 0x0 /* PF_BAR0 */ 443 #define busnum_ODY_EHSM_BIU_CORE1_CMD_PARAM13 0 444 #define arguments_ODY_EHSM_BIU_CORE1_CMD_PARAM13 -1, -1, -1, -1 445 446 /** 447 * Register (NCB32b) ehsm_biu_core1_cmd_param14 448 * 449 * EHSM Biu Core1 Cmd Param14 Register 450 * This register contains parameter 14 associated with a EHSM primitive command from 451 * host processor core 1. 452 */ 453 union ody_ehsm_biu_core1_cmd_param14 { 454 uint32_t u; 455 struct ody_ehsm_biu_core1_cmd_param14_s { 456 uint32_t core1_cmd_param14 : 32; 457 } s; 458 /* struct ody_ehsm_biu_core1_cmd_param14_s cn; */ 459 }; 460 typedef union ody_ehsm_biu_core1_cmd_param14 ody_ehsm_biu_core1_cmd_param14_t; 461 462 #define ODY_EHSM_BIU_CORE1_CMD_PARAM14 ODY_EHSM_BIU_CORE1_CMD_PARAM14_FUNC() 463 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM14_FUNC(void) __attribute__ ((pure, always_inline)); 464 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM14_FUNC(void) 465 { 466 return 0x80b000000038ll; 467 } 468 469 #define typedef_ODY_EHSM_BIU_CORE1_CMD_PARAM14 ody_ehsm_biu_core1_cmd_param14_t 470 #define bustype_ODY_EHSM_BIU_CORE1_CMD_PARAM14 CSR_TYPE_NCB32b 471 #define basename_ODY_EHSM_BIU_CORE1_CMD_PARAM14 "EHSM_BIU_CORE1_CMD_PARAM14" 472 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_PARAM14 0x0 /* PF_BAR0 */ 473 #define busnum_ODY_EHSM_BIU_CORE1_CMD_PARAM14 0 474 #define arguments_ODY_EHSM_BIU_CORE1_CMD_PARAM14 -1, -1, -1, -1 475 476 /** 477 * Register (NCB32b) ehsm_biu_core1_cmd_param15 478 * 479 * EHSM Biu Core1 Cmd Param15 Register 480 * This register contains parameter 15 associated with a EHSM primitive command from 481 * host processor core 1. 482 */ 483 union ody_ehsm_biu_core1_cmd_param15 { 484 uint32_t u; 485 struct ody_ehsm_biu_core1_cmd_param15_s { 486 uint32_t core1_cmd_param15 : 32; 487 } s; 488 /* struct ody_ehsm_biu_core1_cmd_param15_s cn; */ 489 }; 490 typedef union ody_ehsm_biu_core1_cmd_param15 ody_ehsm_biu_core1_cmd_param15_t; 491 492 #define ODY_EHSM_BIU_CORE1_CMD_PARAM15 ODY_EHSM_BIU_CORE1_CMD_PARAM15_FUNC() 493 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM15_FUNC(void) __attribute__ ((pure, always_inline)); 494 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM15_FUNC(void) 495 { 496 return 0x80b00000003cll; 497 } 498 499 #define typedef_ODY_EHSM_BIU_CORE1_CMD_PARAM15 ody_ehsm_biu_core1_cmd_param15_t 500 #define bustype_ODY_EHSM_BIU_CORE1_CMD_PARAM15 CSR_TYPE_NCB32b 501 #define basename_ODY_EHSM_BIU_CORE1_CMD_PARAM15 "EHSM_BIU_CORE1_CMD_PARAM15" 502 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_PARAM15 0x0 /* PF_BAR0 */ 503 #define busnum_ODY_EHSM_BIU_CORE1_CMD_PARAM15 0 504 #define arguments_ODY_EHSM_BIU_CORE1_CMD_PARAM15 -1, -1, -1, -1 505 506 /** 507 * Register (NCB32b) ehsm_biu_core1_cmd_param2 508 * 509 * EHSM Biu Core1 Cmd Param2 Register 510 * This register contains parameter 2 associated with a EHSM primitive command from 511 * host processor core 1. 512 */ 513 union ody_ehsm_biu_core1_cmd_param2 { 514 uint32_t u; 515 struct ody_ehsm_biu_core1_cmd_param2_s { 516 uint32_t core1_cmd_param2 : 32; 517 } s; 518 /* struct ody_ehsm_biu_core1_cmd_param2_s cn; */ 519 }; 520 typedef union ody_ehsm_biu_core1_cmd_param2 ody_ehsm_biu_core1_cmd_param2_t; 521 522 #define ODY_EHSM_BIU_CORE1_CMD_PARAM2 ODY_EHSM_BIU_CORE1_CMD_PARAM2_FUNC() 523 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM2_FUNC(void) __attribute__ ((pure, always_inline)); 524 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM2_FUNC(void) 525 { 526 return 0x80b000000008ll; 527 } 528 529 #define typedef_ODY_EHSM_BIU_CORE1_CMD_PARAM2 ody_ehsm_biu_core1_cmd_param2_t 530 #define bustype_ODY_EHSM_BIU_CORE1_CMD_PARAM2 CSR_TYPE_NCB32b 531 #define basename_ODY_EHSM_BIU_CORE1_CMD_PARAM2 "EHSM_BIU_CORE1_CMD_PARAM2" 532 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_PARAM2 0x0 /* PF_BAR0 */ 533 #define busnum_ODY_EHSM_BIU_CORE1_CMD_PARAM2 0 534 #define arguments_ODY_EHSM_BIU_CORE1_CMD_PARAM2 -1, -1, -1, -1 535 536 /** 537 * Register (NCB32b) ehsm_biu_core1_cmd_param3 538 * 539 * EHSM Biu Core1 Cmd Param3 Register 540 * This register contains parameter 3 associated with a EHSM primitive command from 541 * host processor core 1. 542 */ 543 union ody_ehsm_biu_core1_cmd_param3 { 544 uint32_t u; 545 struct ody_ehsm_biu_core1_cmd_param3_s { 546 uint32_t core1_cmd_param3 : 32; 547 } s; 548 /* struct ody_ehsm_biu_core1_cmd_param3_s cn; */ 549 }; 550 typedef union ody_ehsm_biu_core1_cmd_param3 ody_ehsm_biu_core1_cmd_param3_t; 551 552 #define ODY_EHSM_BIU_CORE1_CMD_PARAM3 ODY_EHSM_BIU_CORE1_CMD_PARAM3_FUNC() 553 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM3_FUNC(void) __attribute__ ((pure, always_inline)); 554 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM3_FUNC(void) 555 { 556 return 0x80b00000000cll; 557 } 558 559 #define typedef_ODY_EHSM_BIU_CORE1_CMD_PARAM3 ody_ehsm_biu_core1_cmd_param3_t 560 #define bustype_ODY_EHSM_BIU_CORE1_CMD_PARAM3 CSR_TYPE_NCB32b 561 #define basename_ODY_EHSM_BIU_CORE1_CMD_PARAM3 "EHSM_BIU_CORE1_CMD_PARAM3" 562 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_PARAM3 0x0 /* PF_BAR0 */ 563 #define busnum_ODY_EHSM_BIU_CORE1_CMD_PARAM3 0 564 #define arguments_ODY_EHSM_BIU_CORE1_CMD_PARAM3 -1, -1, -1, -1 565 566 /** 567 * Register (NCB32b) ehsm_biu_core1_cmd_param4 568 * 569 * EHSM Biu Core1 Cmd Param4 Register 570 * This register contains parameter 4 associated with a EHSM primitive command from 571 * host processor core 1. 572 */ 573 union ody_ehsm_biu_core1_cmd_param4 { 574 uint32_t u; 575 struct ody_ehsm_biu_core1_cmd_param4_s { 576 uint32_t core1_cmd_param4 : 32; 577 } s; 578 /* struct ody_ehsm_biu_core1_cmd_param4_s cn; */ 579 }; 580 typedef union ody_ehsm_biu_core1_cmd_param4 ody_ehsm_biu_core1_cmd_param4_t; 581 582 #define ODY_EHSM_BIU_CORE1_CMD_PARAM4 ODY_EHSM_BIU_CORE1_CMD_PARAM4_FUNC() 583 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM4_FUNC(void) __attribute__ ((pure, always_inline)); 584 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM4_FUNC(void) 585 { 586 return 0x80b000000010ll; 587 } 588 589 #define typedef_ODY_EHSM_BIU_CORE1_CMD_PARAM4 ody_ehsm_biu_core1_cmd_param4_t 590 #define bustype_ODY_EHSM_BIU_CORE1_CMD_PARAM4 CSR_TYPE_NCB32b 591 #define basename_ODY_EHSM_BIU_CORE1_CMD_PARAM4 "EHSM_BIU_CORE1_CMD_PARAM4" 592 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_PARAM4 0x0 /* PF_BAR0 */ 593 #define busnum_ODY_EHSM_BIU_CORE1_CMD_PARAM4 0 594 #define arguments_ODY_EHSM_BIU_CORE1_CMD_PARAM4 -1, -1, -1, -1 595 596 /** 597 * Register (NCB32b) ehsm_biu_core1_cmd_param5 598 * 599 * EHSM Biu Core1 Cmd Param5 Register 600 * This register contains parameter 5 associated with a EHSM primitive command from 601 * host processor core 1. 602 */ 603 union ody_ehsm_biu_core1_cmd_param5 { 604 uint32_t u; 605 struct ody_ehsm_biu_core1_cmd_param5_s { 606 uint32_t core1_cmd_param5 : 32; 607 } s; 608 /* struct ody_ehsm_biu_core1_cmd_param5_s cn; */ 609 }; 610 typedef union ody_ehsm_biu_core1_cmd_param5 ody_ehsm_biu_core1_cmd_param5_t; 611 612 #define ODY_EHSM_BIU_CORE1_CMD_PARAM5 ODY_EHSM_BIU_CORE1_CMD_PARAM5_FUNC() 613 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM5_FUNC(void) __attribute__ ((pure, always_inline)); 614 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM5_FUNC(void) 615 { 616 return 0x80b000000014ll; 617 } 618 619 #define typedef_ODY_EHSM_BIU_CORE1_CMD_PARAM5 ody_ehsm_biu_core1_cmd_param5_t 620 #define bustype_ODY_EHSM_BIU_CORE1_CMD_PARAM5 CSR_TYPE_NCB32b 621 #define basename_ODY_EHSM_BIU_CORE1_CMD_PARAM5 "EHSM_BIU_CORE1_CMD_PARAM5" 622 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_PARAM5 0x0 /* PF_BAR0 */ 623 #define busnum_ODY_EHSM_BIU_CORE1_CMD_PARAM5 0 624 #define arguments_ODY_EHSM_BIU_CORE1_CMD_PARAM5 -1, -1, -1, -1 625 626 /** 627 * Register (NCB32b) ehsm_biu_core1_cmd_param6 628 * 629 * EHSM Biu Core1 Cmd Param6 Register 630 * This register contains parameter 6 associated with a EHSM primitive command from 631 * host processor core 1. 632 */ 633 union ody_ehsm_biu_core1_cmd_param6 { 634 uint32_t u; 635 struct ody_ehsm_biu_core1_cmd_param6_s { 636 uint32_t core1_cmd_param6 : 32; 637 } s; 638 /* struct ody_ehsm_biu_core1_cmd_param6_s cn; */ 639 }; 640 typedef union ody_ehsm_biu_core1_cmd_param6 ody_ehsm_biu_core1_cmd_param6_t; 641 642 #define ODY_EHSM_BIU_CORE1_CMD_PARAM6 ODY_EHSM_BIU_CORE1_CMD_PARAM6_FUNC() 643 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM6_FUNC(void) __attribute__ ((pure, always_inline)); 644 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM6_FUNC(void) 645 { 646 return 0x80b000000018ll; 647 } 648 649 #define typedef_ODY_EHSM_BIU_CORE1_CMD_PARAM6 ody_ehsm_biu_core1_cmd_param6_t 650 #define bustype_ODY_EHSM_BIU_CORE1_CMD_PARAM6 CSR_TYPE_NCB32b 651 #define basename_ODY_EHSM_BIU_CORE1_CMD_PARAM6 "EHSM_BIU_CORE1_CMD_PARAM6" 652 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_PARAM6 0x0 /* PF_BAR0 */ 653 #define busnum_ODY_EHSM_BIU_CORE1_CMD_PARAM6 0 654 #define arguments_ODY_EHSM_BIU_CORE1_CMD_PARAM6 -1, -1, -1, -1 655 656 /** 657 * Register (NCB32b) ehsm_biu_core1_cmd_param7 658 * 659 * EHSM Biu Core1 Cmd Param7 Register 660 * This register contains parameter 7 associated with a EHSM primitive command from 661 * host processor core 1. 662 */ 663 union ody_ehsm_biu_core1_cmd_param7 { 664 uint32_t u; 665 struct ody_ehsm_biu_core1_cmd_param7_s { 666 uint32_t core1_cmd_param7 : 32; 667 } s; 668 /* struct ody_ehsm_biu_core1_cmd_param7_s cn; */ 669 }; 670 typedef union ody_ehsm_biu_core1_cmd_param7 ody_ehsm_biu_core1_cmd_param7_t; 671 672 #define ODY_EHSM_BIU_CORE1_CMD_PARAM7 ODY_EHSM_BIU_CORE1_CMD_PARAM7_FUNC() 673 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM7_FUNC(void) __attribute__ ((pure, always_inline)); 674 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM7_FUNC(void) 675 { 676 return 0x80b00000001cll; 677 } 678 679 #define typedef_ODY_EHSM_BIU_CORE1_CMD_PARAM7 ody_ehsm_biu_core1_cmd_param7_t 680 #define bustype_ODY_EHSM_BIU_CORE1_CMD_PARAM7 CSR_TYPE_NCB32b 681 #define basename_ODY_EHSM_BIU_CORE1_CMD_PARAM7 "EHSM_BIU_CORE1_CMD_PARAM7" 682 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_PARAM7 0x0 /* PF_BAR0 */ 683 #define busnum_ODY_EHSM_BIU_CORE1_CMD_PARAM7 0 684 #define arguments_ODY_EHSM_BIU_CORE1_CMD_PARAM7 -1, -1, -1, -1 685 686 /** 687 * Register (NCB32b) ehsm_biu_core1_cmd_param8 688 * 689 * EHSM Biu Core1 Cmd Param8 Register 690 * This register contains parameter 8 associated with a EHSM primitive command from 691 * host processor core 1. 692 */ 693 union ody_ehsm_biu_core1_cmd_param8 { 694 uint32_t u; 695 struct ody_ehsm_biu_core1_cmd_param8_s { 696 uint32_t core1_cmd_param8 : 32; 697 } s; 698 /* struct ody_ehsm_biu_core1_cmd_param8_s cn; */ 699 }; 700 typedef union ody_ehsm_biu_core1_cmd_param8 ody_ehsm_biu_core1_cmd_param8_t; 701 702 #define ODY_EHSM_BIU_CORE1_CMD_PARAM8 ODY_EHSM_BIU_CORE1_CMD_PARAM8_FUNC() 703 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM8_FUNC(void) __attribute__ ((pure, always_inline)); 704 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM8_FUNC(void) 705 { 706 return 0x80b000000020ll; 707 } 708 709 #define typedef_ODY_EHSM_BIU_CORE1_CMD_PARAM8 ody_ehsm_biu_core1_cmd_param8_t 710 #define bustype_ODY_EHSM_BIU_CORE1_CMD_PARAM8 CSR_TYPE_NCB32b 711 #define basename_ODY_EHSM_BIU_CORE1_CMD_PARAM8 "EHSM_BIU_CORE1_CMD_PARAM8" 712 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_PARAM8 0x0 /* PF_BAR0 */ 713 #define busnum_ODY_EHSM_BIU_CORE1_CMD_PARAM8 0 714 #define arguments_ODY_EHSM_BIU_CORE1_CMD_PARAM8 -1, -1, -1, -1 715 716 /** 717 * Register (NCB32b) ehsm_biu_core1_cmd_param9 718 * 719 * EHSM Biu Core1 Cmd Param9 Register 720 * This register contains parameter 9 associated with a EHSM primitive command from 721 * host processor core 1. 722 */ 723 union ody_ehsm_biu_core1_cmd_param9 { 724 uint32_t u; 725 struct ody_ehsm_biu_core1_cmd_param9_s { 726 uint32_t core1_cmd_param9 : 32; 727 } s; 728 /* struct ody_ehsm_biu_core1_cmd_param9_s cn; */ 729 }; 730 typedef union ody_ehsm_biu_core1_cmd_param9 ody_ehsm_biu_core1_cmd_param9_t; 731 732 #define ODY_EHSM_BIU_CORE1_CMD_PARAM9 ODY_EHSM_BIU_CORE1_CMD_PARAM9_FUNC() 733 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM9_FUNC(void) __attribute__ ((pure, always_inline)); 734 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_PARAM9_FUNC(void) 735 { 736 return 0x80b000000024ll; 737 } 738 739 #define typedef_ODY_EHSM_BIU_CORE1_CMD_PARAM9 ody_ehsm_biu_core1_cmd_param9_t 740 #define bustype_ODY_EHSM_BIU_CORE1_CMD_PARAM9 CSR_TYPE_NCB32b 741 #define basename_ODY_EHSM_BIU_CORE1_CMD_PARAM9 "EHSM_BIU_CORE1_CMD_PARAM9" 742 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_PARAM9 0x0 /* PF_BAR0 */ 743 #define busnum_ODY_EHSM_BIU_CORE1_CMD_PARAM9 0 744 #define arguments_ODY_EHSM_BIU_CORE1_CMD_PARAM9 -1, -1, -1, -1 745 746 /** 747 * Register (NCB32b) ehsm_biu_core1_cmd_ret_status 748 * 749 * EHSM Biu Core1 Cmd Ret Status Register 750 * This register contains return status associated with a EHSM primitive command from 751 * host processor core 1. 752 * If it is 0, it indicates command execution success. If it is non 0, it indicates 753 * command execution failure and the value is the error code. 754 */ 755 union ody_ehsm_biu_core1_cmd_ret_status { 756 uint32_t u; 757 struct ody_ehsm_biu_core1_cmd_ret_status_s { 758 uint32_t core1_cmd_ret_status : 32; 759 } s; 760 /* struct ody_ehsm_biu_core1_cmd_ret_status_s cn; */ 761 }; 762 typedef union ody_ehsm_biu_core1_cmd_ret_status ody_ehsm_biu_core1_cmd_ret_status_t; 763 764 #define ODY_EHSM_BIU_CORE1_CMD_RET_STATUS ODY_EHSM_BIU_CORE1_CMD_RET_STATUS_FUNC() 765 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_RET_STATUS_FUNC(void) __attribute__ ((pure, always_inline)); 766 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_RET_STATUS_FUNC(void) 767 { 768 return 0x80b000000080ll; 769 } 770 771 #define typedef_ODY_EHSM_BIU_CORE1_CMD_RET_STATUS ody_ehsm_biu_core1_cmd_ret_status_t 772 #define bustype_ODY_EHSM_BIU_CORE1_CMD_RET_STATUS CSR_TYPE_NCB32b 773 #define basename_ODY_EHSM_BIU_CORE1_CMD_RET_STATUS "EHSM_BIU_CORE1_CMD_RET_STATUS" 774 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_RET_STATUS 0x0 /* PF_BAR0 */ 775 #define busnum_ODY_EHSM_BIU_CORE1_CMD_RET_STATUS 0 776 #define arguments_ODY_EHSM_BIU_CORE1_CMD_RET_STATUS -1, -1, -1, -1 777 778 /** 779 * Register (NCB32b) ehsm_biu_core1_cmd_status0 780 * 781 * EHSM Biu Core1 Cmd Status0 Register 782 * This register contains status 0 associated with a EHSM primitive command from host 783 * processor core 1. 784 */ 785 union ody_ehsm_biu_core1_cmd_status0 { 786 uint32_t u; 787 struct ody_ehsm_biu_core1_cmd_status0_s { 788 uint32_t core1_cmd_status0 : 32; 789 } s; 790 /* struct ody_ehsm_biu_core1_cmd_status0_s cn; */ 791 }; 792 typedef union ody_ehsm_biu_core1_cmd_status0 ody_ehsm_biu_core1_cmd_status0_t; 793 794 #define ODY_EHSM_BIU_CORE1_CMD_STATUS0 ODY_EHSM_BIU_CORE1_CMD_STATUS0_FUNC() 795 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS0_FUNC(void) __attribute__ ((pure, always_inline)); 796 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS0_FUNC(void) 797 { 798 return 0x80b000000084ll; 799 } 800 801 #define typedef_ODY_EHSM_BIU_CORE1_CMD_STATUS0 ody_ehsm_biu_core1_cmd_status0_t 802 #define bustype_ODY_EHSM_BIU_CORE1_CMD_STATUS0 CSR_TYPE_NCB32b 803 #define basename_ODY_EHSM_BIU_CORE1_CMD_STATUS0 "EHSM_BIU_CORE1_CMD_STATUS0" 804 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_STATUS0 0x0 /* PF_BAR0 */ 805 #define busnum_ODY_EHSM_BIU_CORE1_CMD_STATUS0 0 806 #define arguments_ODY_EHSM_BIU_CORE1_CMD_STATUS0 -1, -1, -1, -1 807 808 /** 809 * Register (NCB32b) ehsm_biu_core1_cmd_status1 810 * 811 * EHSM Biu Core1 Cmd Status1 Register 812 * This register contains status 1 associated with a EHSM primitive command from host 813 * processor core 1. 814 */ 815 union ody_ehsm_biu_core1_cmd_status1 { 816 uint32_t u; 817 struct ody_ehsm_biu_core1_cmd_status1_s { 818 uint32_t core1_cmd_status1 : 32; 819 } s; 820 /* struct ody_ehsm_biu_core1_cmd_status1_s cn; */ 821 }; 822 typedef union ody_ehsm_biu_core1_cmd_status1 ody_ehsm_biu_core1_cmd_status1_t; 823 824 #define ODY_EHSM_BIU_CORE1_CMD_STATUS1 ODY_EHSM_BIU_CORE1_CMD_STATUS1_FUNC() 825 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS1_FUNC(void) __attribute__ ((pure, always_inline)); 826 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS1_FUNC(void) 827 { 828 return 0x80b000000088ll; 829 } 830 831 #define typedef_ODY_EHSM_BIU_CORE1_CMD_STATUS1 ody_ehsm_biu_core1_cmd_status1_t 832 #define bustype_ODY_EHSM_BIU_CORE1_CMD_STATUS1 CSR_TYPE_NCB32b 833 #define basename_ODY_EHSM_BIU_CORE1_CMD_STATUS1 "EHSM_BIU_CORE1_CMD_STATUS1" 834 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_STATUS1 0x0 /* PF_BAR0 */ 835 #define busnum_ODY_EHSM_BIU_CORE1_CMD_STATUS1 0 836 #define arguments_ODY_EHSM_BIU_CORE1_CMD_STATUS1 -1, -1, -1, -1 837 838 /** 839 * Register (NCB32b) ehsm_biu_core1_cmd_status10 840 * 841 * EHSM Biu Core1 Cmd Status10 Register 842 * This register contains status 10 associated with a EHSM primitive command from host 843 * processor core 1. 844 */ 845 union ody_ehsm_biu_core1_cmd_status10 { 846 uint32_t u; 847 struct ody_ehsm_biu_core1_cmd_status10_s { 848 uint32_t core1_cmd_status10 : 32; 849 } s; 850 /* struct ody_ehsm_biu_core1_cmd_status10_s cn; */ 851 }; 852 typedef union ody_ehsm_biu_core1_cmd_status10 ody_ehsm_biu_core1_cmd_status10_t; 853 854 #define ODY_EHSM_BIU_CORE1_CMD_STATUS10 ODY_EHSM_BIU_CORE1_CMD_STATUS10_FUNC() 855 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS10_FUNC(void) __attribute__ ((pure, always_inline)); 856 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS10_FUNC(void) 857 { 858 return 0x80b0000000acll; 859 } 860 861 #define typedef_ODY_EHSM_BIU_CORE1_CMD_STATUS10 ody_ehsm_biu_core1_cmd_status10_t 862 #define bustype_ODY_EHSM_BIU_CORE1_CMD_STATUS10 CSR_TYPE_NCB32b 863 #define basename_ODY_EHSM_BIU_CORE1_CMD_STATUS10 "EHSM_BIU_CORE1_CMD_STATUS10" 864 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_STATUS10 0x0 /* PF_BAR0 */ 865 #define busnum_ODY_EHSM_BIU_CORE1_CMD_STATUS10 0 866 #define arguments_ODY_EHSM_BIU_CORE1_CMD_STATUS10 -1, -1, -1, -1 867 868 /** 869 * Register (NCB32b) ehsm_biu_core1_cmd_status11 870 * 871 * EHSM Biu Core1 Cmd Status11 Register 872 * This register contains status 11 associated with a EHSM primitive command from host 873 * processor core 1. 874 */ 875 union ody_ehsm_biu_core1_cmd_status11 { 876 uint32_t u; 877 struct ody_ehsm_biu_core1_cmd_status11_s { 878 uint32_t core1_cmd_status11 : 32; 879 } s; 880 /* struct ody_ehsm_biu_core1_cmd_status11_s cn; */ 881 }; 882 typedef union ody_ehsm_biu_core1_cmd_status11 ody_ehsm_biu_core1_cmd_status11_t; 883 884 #define ODY_EHSM_BIU_CORE1_CMD_STATUS11 ODY_EHSM_BIU_CORE1_CMD_STATUS11_FUNC() 885 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS11_FUNC(void) __attribute__ ((pure, always_inline)); 886 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS11_FUNC(void) 887 { 888 return 0x80b0000000b0ll; 889 } 890 891 #define typedef_ODY_EHSM_BIU_CORE1_CMD_STATUS11 ody_ehsm_biu_core1_cmd_status11_t 892 #define bustype_ODY_EHSM_BIU_CORE1_CMD_STATUS11 CSR_TYPE_NCB32b 893 #define basename_ODY_EHSM_BIU_CORE1_CMD_STATUS11 "EHSM_BIU_CORE1_CMD_STATUS11" 894 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_STATUS11 0x0 /* PF_BAR0 */ 895 #define busnum_ODY_EHSM_BIU_CORE1_CMD_STATUS11 0 896 #define arguments_ODY_EHSM_BIU_CORE1_CMD_STATUS11 -1, -1, -1, -1 897 898 /** 899 * Register (NCB32b) ehsm_biu_core1_cmd_status12 900 * 901 * EHSM Biu Core1 Cmd Status12 Register 902 * This register contains status 12 associated with a EHSM primitive command from host 903 * processor core 1. 904 */ 905 union ody_ehsm_biu_core1_cmd_status12 { 906 uint32_t u; 907 struct ody_ehsm_biu_core1_cmd_status12_s { 908 uint32_t core1_cmd_status12 : 32; 909 } s; 910 /* struct ody_ehsm_biu_core1_cmd_status12_s cn; */ 911 }; 912 typedef union ody_ehsm_biu_core1_cmd_status12 ody_ehsm_biu_core1_cmd_status12_t; 913 914 #define ODY_EHSM_BIU_CORE1_CMD_STATUS12 ODY_EHSM_BIU_CORE1_CMD_STATUS12_FUNC() 915 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS12_FUNC(void) __attribute__ ((pure, always_inline)); 916 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS12_FUNC(void) 917 { 918 return 0x80b0000000b4ll; 919 } 920 921 #define typedef_ODY_EHSM_BIU_CORE1_CMD_STATUS12 ody_ehsm_biu_core1_cmd_status12_t 922 #define bustype_ODY_EHSM_BIU_CORE1_CMD_STATUS12 CSR_TYPE_NCB32b 923 #define basename_ODY_EHSM_BIU_CORE1_CMD_STATUS12 "EHSM_BIU_CORE1_CMD_STATUS12" 924 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_STATUS12 0x0 /* PF_BAR0 */ 925 #define busnum_ODY_EHSM_BIU_CORE1_CMD_STATUS12 0 926 #define arguments_ODY_EHSM_BIU_CORE1_CMD_STATUS12 -1, -1, -1, -1 927 928 /** 929 * Register (NCB32b) ehsm_biu_core1_cmd_status13 930 * 931 * EHSM Biu Core1 Cmd Status13 Register 932 * This register contains status 13 associated with a EHSM primitive command from host 933 * processor core 1. 934 */ 935 union ody_ehsm_biu_core1_cmd_status13 { 936 uint32_t u; 937 struct ody_ehsm_biu_core1_cmd_status13_s { 938 uint32_t core1_cmd_status13 : 32; 939 } s; 940 /* struct ody_ehsm_biu_core1_cmd_status13_s cn; */ 941 }; 942 typedef union ody_ehsm_biu_core1_cmd_status13 ody_ehsm_biu_core1_cmd_status13_t; 943 944 #define ODY_EHSM_BIU_CORE1_CMD_STATUS13 ODY_EHSM_BIU_CORE1_CMD_STATUS13_FUNC() 945 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS13_FUNC(void) __attribute__ ((pure, always_inline)); 946 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS13_FUNC(void) 947 { 948 return 0x80b0000000b8ll; 949 } 950 951 #define typedef_ODY_EHSM_BIU_CORE1_CMD_STATUS13 ody_ehsm_biu_core1_cmd_status13_t 952 #define bustype_ODY_EHSM_BIU_CORE1_CMD_STATUS13 CSR_TYPE_NCB32b 953 #define basename_ODY_EHSM_BIU_CORE1_CMD_STATUS13 "EHSM_BIU_CORE1_CMD_STATUS13" 954 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_STATUS13 0x0 /* PF_BAR0 */ 955 #define busnum_ODY_EHSM_BIU_CORE1_CMD_STATUS13 0 956 #define arguments_ODY_EHSM_BIU_CORE1_CMD_STATUS13 -1, -1, -1, -1 957 958 /** 959 * Register (NCB32b) ehsm_biu_core1_cmd_status14 960 * 961 * EHSM Biu Core1 Cmd Status14 Register 962 * This register contains status 14 associated with a EHSM primitive command from host 963 * processor core 1. 964 */ 965 union ody_ehsm_biu_core1_cmd_status14 { 966 uint32_t u; 967 struct ody_ehsm_biu_core1_cmd_status14_s { 968 uint32_t core1_cmd_status14 : 32; 969 } s; 970 /* struct ody_ehsm_biu_core1_cmd_status14_s cn; */ 971 }; 972 typedef union ody_ehsm_biu_core1_cmd_status14 ody_ehsm_biu_core1_cmd_status14_t; 973 974 #define ODY_EHSM_BIU_CORE1_CMD_STATUS14 ODY_EHSM_BIU_CORE1_CMD_STATUS14_FUNC() 975 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS14_FUNC(void) __attribute__ ((pure, always_inline)); 976 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS14_FUNC(void) 977 { 978 return 0x80b0000000bcll; 979 } 980 981 #define typedef_ODY_EHSM_BIU_CORE1_CMD_STATUS14 ody_ehsm_biu_core1_cmd_status14_t 982 #define bustype_ODY_EHSM_BIU_CORE1_CMD_STATUS14 CSR_TYPE_NCB32b 983 #define basename_ODY_EHSM_BIU_CORE1_CMD_STATUS14 "EHSM_BIU_CORE1_CMD_STATUS14" 984 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_STATUS14 0x0 /* PF_BAR0 */ 985 #define busnum_ODY_EHSM_BIU_CORE1_CMD_STATUS14 0 986 #define arguments_ODY_EHSM_BIU_CORE1_CMD_STATUS14 -1, -1, -1, -1 987 988 /** 989 * Register (NCB32b) ehsm_biu_core1_cmd_status15 990 * 991 * EHSM Biu Core1 Cmd Status15 Register 992 * This register contains status 15 associated with a EHSM primitive command from host 993 * processor core 1. 994 */ 995 union ody_ehsm_biu_core1_cmd_status15 { 996 uint32_t u; 997 struct ody_ehsm_biu_core1_cmd_status15_s { 998 uint32_t core1_cmd_status15 : 32; 999 } s; 1000 /* struct ody_ehsm_biu_core1_cmd_status15_s cn; */ 1001 }; 1002 typedef union ody_ehsm_biu_core1_cmd_status15 ody_ehsm_biu_core1_cmd_status15_t; 1003 1004 #define ODY_EHSM_BIU_CORE1_CMD_STATUS15 ODY_EHSM_BIU_CORE1_CMD_STATUS15_FUNC() 1005 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS15_FUNC(void) __attribute__ ((pure, always_inline)); 1006 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS15_FUNC(void) 1007 { 1008 return 0x80b0000000c0ll; 1009 } 1010 1011 #define typedef_ODY_EHSM_BIU_CORE1_CMD_STATUS15 ody_ehsm_biu_core1_cmd_status15_t 1012 #define bustype_ODY_EHSM_BIU_CORE1_CMD_STATUS15 CSR_TYPE_NCB32b 1013 #define basename_ODY_EHSM_BIU_CORE1_CMD_STATUS15 "EHSM_BIU_CORE1_CMD_STATUS15" 1014 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_STATUS15 0x0 /* PF_BAR0 */ 1015 #define busnum_ODY_EHSM_BIU_CORE1_CMD_STATUS15 0 1016 #define arguments_ODY_EHSM_BIU_CORE1_CMD_STATUS15 -1, -1, -1, -1 1017 1018 /** 1019 * Register (NCB32b) ehsm_biu_core1_cmd_status2 1020 * 1021 * EHSM Biu Core1 Cmd Status2 Register 1022 * This register contains status 2 associated with a EHSM primitive command from host 1023 * processor core 1. 1024 */ 1025 union ody_ehsm_biu_core1_cmd_status2 { 1026 uint32_t u; 1027 struct ody_ehsm_biu_core1_cmd_status2_s { 1028 uint32_t core1_cmd_status2 : 32; 1029 } s; 1030 /* struct ody_ehsm_biu_core1_cmd_status2_s cn; */ 1031 }; 1032 typedef union ody_ehsm_biu_core1_cmd_status2 ody_ehsm_biu_core1_cmd_status2_t; 1033 1034 #define ODY_EHSM_BIU_CORE1_CMD_STATUS2 ODY_EHSM_BIU_CORE1_CMD_STATUS2_FUNC() 1035 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS2_FUNC(void) __attribute__ ((pure, always_inline)); 1036 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS2_FUNC(void) 1037 { 1038 return 0x80b00000008cll; 1039 } 1040 1041 #define typedef_ODY_EHSM_BIU_CORE1_CMD_STATUS2 ody_ehsm_biu_core1_cmd_status2_t 1042 #define bustype_ODY_EHSM_BIU_CORE1_CMD_STATUS2 CSR_TYPE_NCB32b 1043 #define basename_ODY_EHSM_BIU_CORE1_CMD_STATUS2 "EHSM_BIU_CORE1_CMD_STATUS2" 1044 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_STATUS2 0x0 /* PF_BAR0 */ 1045 #define busnum_ODY_EHSM_BIU_CORE1_CMD_STATUS2 0 1046 #define arguments_ODY_EHSM_BIU_CORE1_CMD_STATUS2 -1, -1, -1, -1 1047 1048 /** 1049 * Register (NCB32b) ehsm_biu_core1_cmd_status3 1050 * 1051 * EHSM Biu Core1 Cmd Status3 Register 1052 * This register contains status 3 associated with a EHSM primitive command from host 1053 * processor core 1. 1054 */ 1055 union ody_ehsm_biu_core1_cmd_status3 { 1056 uint32_t u; 1057 struct ody_ehsm_biu_core1_cmd_status3_s { 1058 uint32_t core1_cmd_status3 : 32; 1059 } s; 1060 /* struct ody_ehsm_biu_core1_cmd_status3_s cn; */ 1061 }; 1062 typedef union ody_ehsm_biu_core1_cmd_status3 ody_ehsm_biu_core1_cmd_status3_t; 1063 1064 #define ODY_EHSM_BIU_CORE1_CMD_STATUS3 ODY_EHSM_BIU_CORE1_CMD_STATUS3_FUNC() 1065 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS3_FUNC(void) __attribute__ ((pure, always_inline)); 1066 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS3_FUNC(void) 1067 { 1068 return 0x80b000000090ll; 1069 } 1070 1071 #define typedef_ODY_EHSM_BIU_CORE1_CMD_STATUS3 ody_ehsm_biu_core1_cmd_status3_t 1072 #define bustype_ODY_EHSM_BIU_CORE1_CMD_STATUS3 CSR_TYPE_NCB32b 1073 #define basename_ODY_EHSM_BIU_CORE1_CMD_STATUS3 "EHSM_BIU_CORE1_CMD_STATUS3" 1074 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_STATUS3 0x0 /* PF_BAR0 */ 1075 #define busnum_ODY_EHSM_BIU_CORE1_CMD_STATUS3 0 1076 #define arguments_ODY_EHSM_BIU_CORE1_CMD_STATUS3 -1, -1, -1, -1 1077 1078 /** 1079 * Register (NCB32b) ehsm_biu_core1_cmd_status4 1080 * 1081 * EHSM Biu Core1 Cmd Status4 Register 1082 * This register contains status 4 associated with a EHSM primitive command from host 1083 * processor core 1. 1084 */ 1085 union ody_ehsm_biu_core1_cmd_status4 { 1086 uint32_t u; 1087 struct ody_ehsm_biu_core1_cmd_status4_s { 1088 uint32_t core1_cmd_status4 : 32; 1089 } s; 1090 /* struct ody_ehsm_biu_core1_cmd_status4_s cn; */ 1091 }; 1092 typedef union ody_ehsm_biu_core1_cmd_status4 ody_ehsm_biu_core1_cmd_status4_t; 1093 1094 #define ODY_EHSM_BIU_CORE1_CMD_STATUS4 ODY_EHSM_BIU_CORE1_CMD_STATUS4_FUNC() 1095 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS4_FUNC(void) __attribute__ ((pure, always_inline)); 1096 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS4_FUNC(void) 1097 { 1098 return 0x80b000000094ll; 1099 } 1100 1101 #define typedef_ODY_EHSM_BIU_CORE1_CMD_STATUS4 ody_ehsm_biu_core1_cmd_status4_t 1102 #define bustype_ODY_EHSM_BIU_CORE1_CMD_STATUS4 CSR_TYPE_NCB32b 1103 #define basename_ODY_EHSM_BIU_CORE1_CMD_STATUS4 "EHSM_BIU_CORE1_CMD_STATUS4" 1104 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_STATUS4 0x0 /* PF_BAR0 */ 1105 #define busnum_ODY_EHSM_BIU_CORE1_CMD_STATUS4 0 1106 #define arguments_ODY_EHSM_BIU_CORE1_CMD_STATUS4 -1, -1, -1, -1 1107 1108 /** 1109 * Register (NCB32b) ehsm_biu_core1_cmd_status5 1110 * 1111 * EHSM Biu Core1 Cmd Status5 Register 1112 * This register contains status 5 associated with a EHSM primitive command from host 1113 * processor core 1. 1114 */ 1115 union ody_ehsm_biu_core1_cmd_status5 { 1116 uint32_t u; 1117 struct ody_ehsm_biu_core1_cmd_status5_s { 1118 uint32_t core1_cmd_status5 : 32; 1119 } s; 1120 /* struct ody_ehsm_biu_core1_cmd_status5_s cn; */ 1121 }; 1122 typedef union ody_ehsm_biu_core1_cmd_status5 ody_ehsm_biu_core1_cmd_status5_t; 1123 1124 #define ODY_EHSM_BIU_CORE1_CMD_STATUS5 ODY_EHSM_BIU_CORE1_CMD_STATUS5_FUNC() 1125 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS5_FUNC(void) __attribute__ ((pure, always_inline)); 1126 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS5_FUNC(void) 1127 { 1128 return 0x80b000000098ll; 1129 } 1130 1131 #define typedef_ODY_EHSM_BIU_CORE1_CMD_STATUS5 ody_ehsm_biu_core1_cmd_status5_t 1132 #define bustype_ODY_EHSM_BIU_CORE1_CMD_STATUS5 CSR_TYPE_NCB32b 1133 #define basename_ODY_EHSM_BIU_CORE1_CMD_STATUS5 "EHSM_BIU_CORE1_CMD_STATUS5" 1134 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_STATUS5 0x0 /* PF_BAR0 */ 1135 #define busnum_ODY_EHSM_BIU_CORE1_CMD_STATUS5 0 1136 #define arguments_ODY_EHSM_BIU_CORE1_CMD_STATUS5 -1, -1, -1, -1 1137 1138 /** 1139 * Register (NCB32b) ehsm_biu_core1_cmd_status6 1140 * 1141 * EHSM Biu Core1 Cmd Status6 Register 1142 * This register contains status 6 associated with a EHSM primitive command from host 1143 * processor core 1. 1144 */ 1145 union ody_ehsm_biu_core1_cmd_status6 { 1146 uint32_t u; 1147 struct ody_ehsm_biu_core1_cmd_status6_s { 1148 uint32_t core1_cmd_status6 : 32; 1149 } s; 1150 /* struct ody_ehsm_biu_core1_cmd_status6_s cn; */ 1151 }; 1152 typedef union ody_ehsm_biu_core1_cmd_status6 ody_ehsm_biu_core1_cmd_status6_t; 1153 1154 #define ODY_EHSM_BIU_CORE1_CMD_STATUS6 ODY_EHSM_BIU_CORE1_CMD_STATUS6_FUNC() 1155 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS6_FUNC(void) __attribute__ ((pure, always_inline)); 1156 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS6_FUNC(void) 1157 { 1158 return 0x80b00000009cll; 1159 } 1160 1161 #define typedef_ODY_EHSM_BIU_CORE1_CMD_STATUS6 ody_ehsm_biu_core1_cmd_status6_t 1162 #define bustype_ODY_EHSM_BIU_CORE1_CMD_STATUS6 CSR_TYPE_NCB32b 1163 #define basename_ODY_EHSM_BIU_CORE1_CMD_STATUS6 "EHSM_BIU_CORE1_CMD_STATUS6" 1164 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_STATUS6 0x0 /* PF_BAR0 */ 1165 #define busnum_ODY_EHSM_BIU_CORE1_CMD_STATUS6 0 1166 #define arguments_ODY_EHSM_BIU_CORE1_CMD_STATUS6 -1, -1, -1, -1 1167 1168 /** 1169 * Register (NCB32b) ehsm_biu_core1_cmd_status7 1170 * 1171 * EHSM Biu Core1 Cmd Status7 Register 1172 * This register contains status 7 associated with a EHSM primitive command from host 1173 * processor core 1. 1174 */ 1175 union ody_ehsm_biu_core1_cmd_status7 { 1176 uint32_t u; 1177 struct ody_ehsm_biu_core1_cmd_status7_s { 1178 uint32_t core1_cmd_status7 : 32; 1179 } s; 1180 /* struct ody_ehsm_biu_core1_cmd_status7_s cn; */ 1181 }; 1182 typedef union ody_ehsm_biu_core1_cmd_status7 ody_ehsm_biu_core1_cmd_status7_t; 1183 1184 #define ODY_EHSM_BIU_CORE1_CMD_STATUS7 ODY_EHSM_BIU_CORE1_CMD_STATUS7_FUNC() 1185 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS7_FUNC(void) __attribute__ ((pure, always_inline)); 1186 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS7_FUNC(void) 1187 { 1188 return 0x80b0000000a0ll; 1189 } 1190 1191 #define typedef_ODY_EHSM_BIU_CORE1_CMD_STATUS7 ody_ehsm_biu_core1_cmd_status7_t 1192 #define bustype_ODY_EHSM_BIU_CORE1_CMD_STATUS7 CSR_TYPE_NCB32b 1193 #define basename_ODY_EHSM_BIU_CORE1_CMD_STATUS7 "EHSM_BIU_CORE1_CMD_STATUS7" 1194 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_STATUS7 0x0 /* PF_BAR0 */ 1195 #define busnum_ODY_EHSM_BIU_CORE1_CMD_STATUS7 0 1196 #define arguments_ODY_EHSM_BIU_CORE1_CMD_STATUS7 -1, -1, -1, -1 1197 1198 /** 1199 * Register (NCB32b) ehsm_biu_core1_cmd_status8 1200 * 1201 * EHSM Biu Core1 Cmd Status8 Register 1202 * This register contains status 8 associated with a EHSM primitive command from host 1203 * processor core 1. 1204 */ 1205 union ody_ehsm_biu_core1_cmd_status8 { 1206 uint32_t u; 1207 struct ody_ehsm_biu_core1_cmd_status8_s { 1208 uint32_t core1_cmd_status8 : 32; 1209 } s; 1210 /* struct ody_ehsm_biu_core1_cmd_status8_s cn; */ 1211 }; 1212 typedef union ody_ehsm_biu_core1_cmd_status8 ody_ehsm_biu_core1_cmd_status8_t; 1213 1214 #define ODY_EHSM_BIU_CORE1_CMD_STATUS8 ODY_EHSM_BIU_CORE1_CMD_STATUS8_FUNC() 1215 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS8_FUNC(void) __attribute__ ((pure, always_inline)); 1216 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS8_FUNC(void) 1217 { 1218 return 0x80b0000000a4ll; 1219 } 1220 1221 #define typedef_ODY_EHSM_BIU_CORE1_CMD_STATUS8 ody_ehsm_biu_core1_cmd_status8_t 1222 #define bustype_ODY_EHSM_BIU_CORE1_CMD_STATUS8 CSR_TYPE_NCB32b 1223 #define basename_ODY_EHSM_BIU_CORE1_CMD_STATUS8 "EHSM_BIU_CORE1_CMD_STATUS8" 1224 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_STATUS8 0x0 /* PF_BAR0 */ 1225 #define busnum_ODY_EHSM_BIU_CORE1_CMD_STATUS8 0 1226 #define arguments_ODY_EHSM_BIU_CORE1_CMD_STATUS8 -1, -1, -1, -1 1227 1228 /** 1229 * Register (NCB32b) ehsm_biu_core1_cmd_status9 1230 * 1231 * EHSM Biu Core1 Cmd Status9 Register 1232 * This register contains status 9 associated with a EHSM primitive command from host 1233 * processor core 1. 1234 */ 1235 union ody_ehsm_biu_core1_cmd_status9 { 1236 uint32_t u; 1237 struct ody_ehsm_biu_core1_cmd_status9_s { 1238 uint32_t core1_cmd_status9 : 32; 1239 } s; 1240 /* struct ody_ehsm_biu_core1_cmd_status9_s cn; */ 1241 }; 1242 typedef union ody_ehsm_biu_core1_cmd_status9 ody_ehsm_biu_core1_cmd_status9_t; 1243 1244 #define ODY_EHSM_BIU_CORE1_CMD_STATUS9 ODY_EHSM_BIU_CORE1_CMD_STATUS9_FUNC() 1245 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS9_FUNC(void) __attribute__ ((pure, always_inline)); 1246 static inline uint64_t ODY_EHSM_BIU_CORE1_CMD_STATUS9_FUNC(void) 1247 { 1248 return 0x80b0000000a8ll; 1249 } 1250 1251 #define typedef_ODY_EHSM_BIU_CORE1_CMD_STATUS9 ody_ehsm_biu_core1_cmd_status9_t 1252 #define bustype_ODY_EHSM_BIU_CORE1_CMD_STATUS9 CSR_TYPE_NCB32b 1253 #define basename_ODY_EHSM_BIU_CORE1_CMD_STATUS9 "EHSM_BIU_CORE1_CMD_STATUS9" 1254 #define device_bar_ODY_EHSM_BIU_CORE1_CMD_STATUS9 0x0 /* PF_BAR0 */ 1255 #define busnum_ODY_EHSM_BIU_CORE1_CMD_STATUS9 0 1256 #define arguments_ODY_EHSM_BIU_CORE1_CMD_STATUS9 -1, -1, -1, -1 1257 1258 /** 1259 * Register (NCB32b) ehsm_biu_core1_hst_interrupt_mask 1260 * 1261 * EHSM Biu Core1 Hst Interrupt Mask Register 1262 * This is host interrupt masking register for host processor core 1 1263 */ 1264 union ody_ehsm_biu_core1_hst_interrupt_mask { 1265 uint32_t u; 1266 struct ody_ehsm_biu_core1_hst_interrupt_mask_s { 1267 uint32_t core1_hst_interrupt_mask : 32; 1268 } s; 1269 /* struct ody_ehsm_biu_core1_hst_interrupt_mask_s cn; */ 1270 }; 1271 typedef union ody_ehsm_biu_core1_hst_interrupt_mask ody_ehsm_biu_core1_hst_interrupt_mask_t; 1272 1273 #define ODY_EHSM_BIU_CORE1_HST_INTERRUPT_MASK ODY_EHSM_BIU_CORE1_HST_INTERRUPT_MASK_FUNC() 1274 static inline uint64_t ODY_EHSM_BIU_CORE1_HST_INTERRUPT_MASK_FUNC(void) __attribute__ ((pure, always_inline)); 1275 static inline uint64_t ODY_EHSM_BIU_CORE1_HST_INTERRUPT_MASK_FUNC(void) 1276 { 1277 return 0x80b0000000ccll; 1278 } 1279 1280 #define typedef_ODY_EHSM_BIU_CORE1_HST_INTERRUPT_MASK ody_ehsm_biu_core1_hst_interrupt_mask_t 1281 #define bustype_ODY_EHSM_BIU_CORE1_HST_INTERRUPT_MASK CSR_TYPE_NCB32b 1282 #define basename_ODY_EHSM_BIU_CORE1_HST_INTERRUPT_MASK "EHSM_BIU_CORE1_HST_INTERRUPT_MASK" 1283 #define device_bar_ODY_EHSM_BIU_CORE1_HST_INTERRUPT_MASK 0x0 /* PF_BAR0 */ 1284 #define busnum_ODY_EHSM_BIU_CORE1_HST_INTERRUPT_MASK 0 1285 #define arguments_ODY_EHSM_BIU_CORE1_HST_INTERRUPT_MASK -1, -1, -1, -1 1286 1287 /** 1288 * Register (NCB32b) ehsm_biu_core1_hst_interrupt_rst 1289 * 1290 * EHSM Biu Core1 Hst Interrupt Rst Register 1291 * This is host interrupt register for host processor core 1 1292 */ 1293 union ody_ehsm_biu_core1_hst_interrupt_rst { 1294 uint32_t u; 1295 struct ody_ehsm_biu_core1_hst_interrupt_rst_s { 1296 uint32_t irom_exe_int : 1; 1297 uint32_t ehsm_mem_fail : 1; 1298 uint32_t sysrdyp_timeout : 1; 1299 uint32_t reserved_3_15 : 13; 1300 uint32_t hst_addr_range : 1; 1301 uint32_t cmd_buffer_full_access : 1; 1302 uint32_t reserved_18_31 : 14; 1303 } s; 1304 /* struct ody_ehsm_biu_core1_hst_interrupt_rst_s cn; */ 1305 }; 1306 typedef union ody_ehsm_biu_core1_hst_interrupt_rst ody_ehsm_biu_core1_hst_interrupt_rst_t; 1307 1308 #define ODY_EHSM_BIU_CORE1_HST_INTERRUPT_RST ODY_EHSM_BIU_CORE1_HST_INTERRUPT_RST_FUNC() 1309 static inline uint64_t ODY_EHSM_BIU_CORE1_HST_INTERRUPT_RST_FUNC(void) __attribute__ ((pure, always_inline)); 1310 static inline uint64_t ODY_EHSM_BIU_CORE1_HST_INTERRUPT_RST_FUNC(void) 1311 { 1312 return 0x80b0000000c8ll; 1313 } 1314 1315 #define typedef_ODY_EHSM_BIU_CORE1_HST_INTERRUPT_RST ody_ehsm_biu_core1_hst_interrupt_rst_t 1316 #define bustype_ODY_EHSM_BIU_CORE1_HST_INTERRUPT_RST CSR_TYPE_NCB32b 1317 #define basename_ODY_EHSM_BIU_CORE1_HST_INTERRUPT_RST "EHSM_BIU_CORE1_HST_INTERRUPT_RST" 1318 #define device_bar_ODY_EHSM_BIU_CORE1_HST_INTERRUPT_RST 0x0 /* PF_BAR0 */ 1319 #define busnum_ODY_EHSM_BIU_CORE1_HST_INTERRUPT_RST 0 1320 #define arguments_ODY_EHSM_BIU_CORE1_HST_INTERRUPT_RST -1, -1, -1, -1 1321 1322 /** 1323 * Register (NCB32b) ehsm_biu_core2_cmd 1324 * 1325 * EHSM Biu Core2 Cmd Register 1326 */ 1327 union ody_ehsm_biu_core2_cmd { 1328 uint32_t u; 1329 struct ody_ehsm_biu_core2_cmd_s { 1330 uint32_t cmd : 16; 1331 uint32_t reserved_16_31 : 16; 1332 } s; 1333 /* struct ody_ehsm_biu_core2_cmd_s cn; */ 1334 }; 1335 typedef union ody_ehsm_biu_core2_cmd ody_ehsm_biu_core2_cmd_t; 1336 1337 #define ODY_EHSM_BIU_CORE2_CMD ODY_EHSM_BIU_CORE2_CMD_FUNC() 1338 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_FUNC(void) __attribute__ ((pure, always_inline)); 1339 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_FUNC(void) 1340 { 1341 return 0x80b000000180ll; 1342 } 1343 1344 #define typedef_ODY_EHSM_BIU_CORE2_CMD ody_ehsm_biu_core2_cmd_t 1345 #define bustype_ODY_EHSM_BIU_CORE2_CMD CSR_TYPE_NCB32b 1346 #define basename_ODY_EHSM_BIU_CORE2_CMD "EHSM_BIU_CORE2_CMD" 1347 #define device_bar_ODY_EHSM_BIU_CORE2_CMD 0x0 /* PF_BAR0 */ 1348 #define busnum_ODY_EHSM_BIU_CORE2_CMD 0 1349 #define arguments_ODY_EHSM_BIU_CORE2_CMD -1, -1, -1, -1 1350 1351 /** 1352 * Register (NCB32b) ehsm_biu_core2_cmd_param0 1353 * 1354 * EHSM Biu Core2 Cmd Param0 Register 1355 * This register contains parameter 0 associated with a EHSM primitive command from 1356 * host processor core 2. There are a total of 16 spaces for primitive command 1357 * parameters. When the host processor core 2 wants to send a primitive command to 1358 * EHSM, it must first write all the associated parameters (if any). Once all the 1359 * parameters associated with a primitive command have been written, the host processor 1360 * core 2 can write the associated primitive command to the CORE2_CMD register. Host 1361 * does not need to write the unused parameters. 1362 */ 1363 union ody_ehsm_biu_core2_cmd_param0 { 1364 uint32_t u; 1365 struct ody_ehsm_biu_core2_cmd_param0_s { 1366 uint32_t core2_cmd_param0 : 32; 1367 } s; 1368 /* struct ody_ehsm_biu_core2_cmd_param0_s cn; */ 1369 }; 1370 typedef union ody_ehsm_biu_core2_cmd_param0 ody_ehsm_biu_core2_cmd_param0_t; 1371 1372 #define ODY_EHSM_BIU_CORE2_CMD_PARAM0 ODY_EHSM_BIU_CORE2_CMD_PARAM0_FUNC() 1373 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM0_FUNC(void) __attribute__ ((pure, always_inline)); 1374 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM0_FUNC(void) 1375 { 1376 return 0x80b000000140ll; 1377 } 1378 1379 #define typedef_ODY_EHSM_BIU_CORE2_CMD_PARAM0 ody_ehsm_biu_core2_cmd_param0_t 1380 #define bustype_ODY_EHSM_BIU_CORE2_CMD_PARAM0 CSR_TYPE_NCB32b 1381 #define basename_ODY_EHSM_BIU_CORE2_CMD_PARAM0 "EHSM_BIU_CORE2_CMD_PARAM0" 1382 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_PARAM0 0x0 /* PF_BAR0 */ 1383 #define busnum_ODY_EHSM_BIU_CORE2_CMD_PARAM0 0 1384 #define arguments_ODY_EHSM_BIU_CORE2_CMD_PARAM0 -1, -1, -1, -1 1385 1386 /** 1387 * Register (NCB32b) ehsm_biu_core2_cmd_param1 1388 * 1389 * EHSM Biu Core2 Cmd Param1 Register 1390 * This register contains parameter 1 associated with a EHSM primitive command from 1391 * host processor core 2. 1392 */ 1393 union ody_ehsm_biu_core2_cmd_param1 { 1394 uint32_t u; 1395 struct ody_ehsm_biu_core2_cmd_param1_s { 1396 uint32_t core2_cmd_param1 : 32; 1397 } s; 1398 /* struct ody_ehsm_biu_core2_cmd_param1_s cn; */ 1399 }; 1400 typedef union ody_ehsm_biu_core2_cmd_param1 ody_ehsm_biu_core2_cmd_param1_t; 1401 1402 #define ODY_EHSM_BIU_CORE2_CMD_PARAM1 ODY_EHSM_BIU_CORE2_CMD_PARAM1_FUNC() 1403 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM1_FUNC(void) __attribute__ ((pure, always_inline)); 1404 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM1_FUNC(void) 1405 { 1406 return 0x80b000000144ll; 1407 } 1408 1409 #define typedef_ODY_EHSM_BIU_CORE2_CMD_PARAM1 ody_ehsm_biu_core2_cmd_param1_t 1410 #define bustype_ODY_EHSM_BIU_CORE2_CMD_PARAM1 CSR_TYPE_NCB32b 1411 #define basename_ODY_EHSM_BIU_CORE2_CMD_PARAM1 "EHSM_BIU_CORE2_CMD_PARAM1" 1412 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_PARAM1 0x0 /* PF_BAR0 */ 1413 #define busnum_ODY_EHSM_BIU_CORE2_CMD_PARAM1 0 1414 #define arguments_ODY_EHSM_BIU_CORE2_CMD_PARAM1 -1, -1, -1, -1 1415 1416 /** 1417 * Register (NCB32b) ehsm_biu_core2_cmd_param10 1418 * 1419 * EHSM Biu Core2 Cmd Param10 Register 1420 * This register contains parameter 10 associated with a EHSM primitive command from 1421 * host processor core 2. 1422 */ 1423 union ody_ehsm_biu_core2_cmd_param10 { 1424 uint32_t u; 1425 struct ody_ehsm_biu_core2_cmd_param10_s { 1426 uint32_t core2_cmd_param10 : 32; 1427 } s; 1428 /* struct ody_ehsm_biu_core2_cmd_param10_s cn; */ 1429 }; 1430 typedef union ody_ehsm_biu_core2_cmd_param10 ody_ehsm_biu_core2_cmd_param10_t; 1431 1432 #define ODY_EHSM_BIU_CORE2_CMD_PARAM10 ODY_EHSM_BIU_CORE2_CMD_PARAM10_FUNC() 1433 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM10_FUNC(void) __attribute__ ((pure, always_inline)); 1434 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM10_FUNC(void) 1435 { 1436 return 0x80b000000168ll; 1437 } 1438 1439 #define typedef_ODY_EHSM_BIU_CORE2_CMD_PARAM10 ody_ehsm_biu_core2_cmd_param10_t 1440 #define bustype_ODY_EHSM_BIU_CORE2_CMD_PARAM10 CSR_TYPE_NCB32b 1441 #define basename_ODY_EHSM_BIU_CORE2_CMD_PARAM10 "EHSM_BIU_CORE2_CMD_PARAM10" 1442 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_PARAM10 0x0 /* PF_BAR0 */ 1443 #define busnum_ODY_EHSM_BIU_CORE2_CMD_PARAM10 0 1444 #define arguments_ODY_EHSM_BIU_CORE2_CMD_PARAM10 -1, -1, -1, -1 1445 1446 /** 1447 * Register (NCB32b) ehsm_biu_core2_cmd_param11 1448 * 1449 * EHSM Biu Core2 Cmd Param11 Register 1450 * This register contains parameter 11 associated with a EHSM primitive command from 1451 * host processor core 2. 1452 */ 1453 union ody_ehsm_biu_core2_cmd_param11 { 1454 uint32_t u; 1455 struct ody_ehsm_biu_core2_cmd_param11_s { 1456 uint32_t core2_cmd_param11 : 32; 1457 } s; 1458 /* struct ody_ehsm_biu_core2_cmd_param11_s cn; */ 1459 }; 1460 typedef union ody_ehsm_biu_core2_cmd_param11 ody_ehsm_biu_core2_cmd_param11_t; 1461 1462 #define ODY_EHSM_BIU_CORE2_CMD_PARAM11 ODY_EHSM_BIU_CORE2_CMD_PARAM11_FUNC() 1463 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM11_FUNC(void) __attribute__ ((pure, always_inline)); 1464 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM11_FUNC(void) 1465 { 1466 return 0x80b00000016cll; 1467 } 1468 1469 #define typedef_ODY_EHSM_BIU_CORE2_CMD_PARAM11 ody_ehsm_biu_core2_cmd_param11_t 1470 #define bustype_ODY_EHSM_BIU_CORE2_CMD_PARAM11 CSR_TYPE_NCB32b 1471 #define basename_ODY_EHSM_BIU_CORE2_CMD_PARAM11 "EHSM_BIU_CORE2_CMD_PARAM11" 1472 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_PARAM11 0x0 /* PF_BAR0 */ 1473 #define busnum_ODY_EHSM_BIU_CORE2_CMD_PARAM11 0 1474 #define arguments_ODY_EHSM_BIU_CORE2_CMD_PARAM11 -1, -1, -1, -1 1475 1476 /** 1477 * Register (NCB32b) ehsm_biu_core2_cmd_param12 1478 * 1479 * EHSM Biu Core2 Cmd Param12 Register 1480 * This register contains parameter 12 associated with a EHSM primitive command from 1481 * host processor core 2. 1482 */ 1483 union ody_ehsm_biu_core2_cmd_param12 { 1484 uint32_t u; 1485 struct ody_ehsm_biu_core2_cmd_param12_s { 1486 uint32_t core2_cmd_param12 : 32; 1487 } s; 1488 /* struct ody_ehsm_biu_core2_cmd_param12_s cn; */ 1489 }; 1490 typedef union ody_ehsm_biu_core2_cmd_param12 ody_ehsm_biu_core2_cmd_param12_t; 1491 1492 #define ODY_EHSM_BIU_CORE2_CMD_PARAM12 ODY_EHSM_BIU_CORE2_CMD_PARAM12_FUNC() 1493 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM12_FUNC(void) __attribute__ ((pure, always_inline)); 1494 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM12_FUNC(void) 1495 { 1496 return 0x80b000000170ll; 1497 } 1498 1499 #define typedef_ODY_EHSM_BIU_CORE2_CMD_PARAM12 ody_ehsm_biu_core2_cmd_param12_t 1500 #define bustype_ODY_EHSM_BIU_CORE2_CMD_PARAM12 CSR_TYPE_NCB32b 1501 #define basename_ODY_EHSM_BIU_CORE2_CMD_PARAM12 "EHSM_BIU_CORE2_CMD_PARAM12" 1502 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_PARAM12 0x0 /* PF_BAR0 */ 1503 #define busnum_ODY_EHSM_BIU_CORE2_CMD_PARAM12 0 1504 #define arguments_ODY_EHSM_BIU_CORE2_CMD_PARAM12 -1, -1, -1, -1 1505 1506 /** 1507 * Register (NCB32b) ehsm_biu_core2_cmd_param13 1508 * 1509 * EHSM Biu Core2 Cmd Param13 Register 1510 * This register contains parameter 13 associated with a EHSM primitive command from 1511 * host processor core 2. 1512 */ 1513 union ody_ehsm_biu_core2_cmd_param13 { 1514 uint32_t u; 1515 struct ody_ehsm_biu_core2_cmd_param13_s { 1516 uint32_t core2_cmd_param13 : 32; 1517 } s; 1518 /* struct ody_ehsm_biu_core2_cmd_param13_s cn; */ 1519 }; 1520 typedef union ody_ehsm_biu_core2_cmd_param13 ody_ehsm_biu_core2_cmd_param13_t; 1521 1522 #define ODY_EHSM_BIU_CORE2_CMD_PARAM13 ODY_EHSM_BIU_CORE2_CMD_PARAM13_FUNC() 1523 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM13_FUNC(void) __attribute__ ((pure, always_inline)); 1524 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM13_FUNC(void) 1525 { 1526 return 0x80b000000174ll; 1527 } 1528 1529 #define typedef_ODY_EHSM_BIU_CORE2_CMD_PARAM13 ody_ehsm_biu_core2_cmd_param13_t 1530 #define bustype_ODY_EHSM_BIU_CORE2_CMD_PARAM13 CSR_TYPE_NCB32b 1531 #define basename_ODY_EHSM_BIU_CORE2_CMD_PARAM13 "EHSM_BIU_CORE2_CMD_PARAM13" 1532 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_PARAM13 0x0 /* PF_BAR0 */ 1533 #define busnum_ODY_EHSM_BIU_CORE2_CMD_PARAM13 0 1534 #define arguments_ODY_EHSM_BIU_CORE2_CMD_PARAM13 -1, -1, -1, -1 1535 1536 /** 1537 * Register (NCB32b) ehsm_biu_core2_cmd_param14 1538 * 1539 * EHSM Biu Core2 Cmd Param14 Register 1540 * This register contains parameter 14 associated with a EHSM primitive command from 1541 * host processor core 2. 1542 */ 1543 union ody_ehsm_biu_core2_cmd_param14 { 1544 uint32_t u; 1545 struct ody_ehsm_biu_core2_cmd_param14_s { 1546 uint32_t core2_cmd_param14 : 32; 1547 } s; 1548 /* struct ody_ehsm_biu_core2_cmd_param14_s cn; */ 1549 }; 1550 typedef union ody_ehsm_biu_core2_cmd_param14 ody_ehsm_biu_core2_cmd_param14_t; 1551 1552 #define ODY_EHSM_BIU_CORE2_CMD_PARAM14 ODY_EHSM_BIU_CORE2_CMD_PARAM14_FUNC() 1553 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM14_FUNC(void) __attribute__ ((pure, always_inline)); 1554 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM14_FUNC(void) 1555 { 1556 return 0x80b000000178ll; 1557 } 1558 1559 #define typedef_ODY_EHSM_BIU_CORE2_CMD_PARAM14 ody_ehsm_biu_core2_cmd_param14_t 1560 #define bustype_ODY_EHSM_BIU_CORE2_CMD_PARAM14 CSR_TYPE_NCB32b 1561 #define basename_ODY_EHSM_BIU_CORE2_CMD_PARAM14 "EHSM_BIU_CORE2_CMD_PARAM14" 1562 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_PARAM14 0x0 /* PF_BAR0 */ 1563 #define busnum_ODY_EHSM_BIU_CORE2_CMD_PARAM14 0 1564 #define arguments_ODY_EHSM_BIU_CORE2_CMD_PARAM14 -1, -1, -1, -1 1565 1566 /** 1567 * Register (NCB32b) ehsm_biu_core2_cmd_param15 1568 * 1569 * EHSM Biu Core2 Cmd Param15 Register 1570 * This register contains parameter 15 associated with a EHSM primitive command from 1571 * host processor core 2. 1572 */ 1573 union ody_ehsm_biu_core2_cmd_param15 { 1574 uint32_t u; 1575 struct ody_ehsm_biu_core2_cmd_param15_s { 1576 uint32_t core2_cmd_param15 : 32; 1577 } s; 1578 /* struct ody_ehsm_biu_core2_cmd_param15_s cn; */ 1579 }; 1580 typedef union ody_ehsm_biu_core2_cmd_param15 ody_ehsm_biu_core2_cmd_param15_t; 1581 1582 #define ODY_EHSM_BIU_CORE2_CMD_PARAM15 ODY_EHSM_BIU_CORE2_CMD_PARAM15_FUNC() 1583 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM15_FUNC(void) __attribute__ ((pure, always_inline)); 1584 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM15_FUNC(void) 1585 { 1586 return 0x80b00000017cll; 1587 } 1588 1589 #define typedef_ODY_EHSM_BIU_CORE2_CMD_PARAM15 ody_ehsm_biu_core2_cmd_param15_t 1590 #define bustype_ODY_EHSM_BIU_CORE2_CMD_PARAM15 CSR_TYPE_NCB32b 1591 #define basename_ODY_EHSM_BIU_CORE2_CMD_PARAM15 "EHSM_BIU_CORE2_CMD_PARAM15" 1592 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_PARAM15 0x0 /* PF_BAR0 */ 1593 #define busnum_ODY_EHSM_BIU_CORE2_CMD_PARAM15 0 1594 #define arguments_ODY_EHSM_BIU_CORE2_CMD_PARAM15 -1, -1, -1, -1 1595 1596 /** 1597 * Register (NCB32b) ehsm_biu_core2_cmd_param2 1598 * 1599 * EHSM Biu Core2 Cmd Param2 Register 1600 * This register contains parameter 2 associated with a EHSM primitive command from 1601 * host processor core 2. 1602 */ 1603 union ody_ehsm_biu_core2_cmd_param2 { 1604 uint32_t u; 1605 struct ody_ehsm_biu_core2_cmd_param2_s { 1606 uint32_t core2_cmd_param2 : 32; 1607 } s; 1608 /* struct ody_ehsm_biu_core2_cmd_param2_s cn; */ 1609 }; 1610 typedef union ody_ehsm_biu_core2_cmd_param2 ody_ehsm_biu_core2_cmd_param2_t; 1611 1612 #define ODY_EHSM_BIU_CORE2_CMD_PARAM2 ODY_EHSM_BIU_CORE2_CMD_PARAM2_FUNC() 1613 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM2_FUNC(void) __attribute__ ((pure, always_inline)); 1614 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM2_FUNC(void) 1615 { 1616 return 0x80b000000148ll; 1617 } 1618 1619 #define typedef_ODY_EHSM_BIU_CORE2_CMD_PARAM2 ody_ehsm_biu_core2_cmd_param2_t 1620 #define bustype_ODY_EHSM_BIU_CORE2_CMD_PARAM2 CSR_TYPE_NCB32b 1621 #define basename_ODY_EHSM_BIU_CORE2_CMD_PARAM2 "EHSM_BIU_CORE2_CMD_PARAM2" 1622 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_PARAM2 0x0 /* PF_BAR0 */ 1623 #define busnum_ODY_EHSM_BIU_CORE2_CMD_PARAM2 0 1624 #define arguments_ODY_EHSM_BIU_CORE2_CMD_PARAM2 -1, -1, -1, -1 1625 1626 /** 1627 * Register (NCB32b) ehsm_biu_core2_cmd_param3 1628 * 1629 * EHSM Biu Core2 Cmd Param3 Register 1630 * This register contains parameter 3 associated with a EHSM primitive command from 1631 * host processor core 2. 1632 */ 1633 union ody_ehsm_biu_core2_cmd_param3 { 1634 uint32_t u; 1635 struct ody_ehsm_biu_core2_cmd_param3_s { 1636 uint32_t core2_cmd_param3 : 32; 1637 } s; 1638 /* struct ody_ehsm_biu_core2_cmd_param3_s cn; */ 1639 }; 1640 typedef union ody_ehsm_biu_core2_cmd_param3 ody_ehsm_biu_core2_cmd_param3_t; 1641 1642 #define ODY_EHSM_BIU_CORE2_CMD_PARAM3 ODY_EHSM_BIU_CORE2_CMD_PARAM3_FUNC() 1643 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM3_FUNC(void) __attribute__ ((pure, always_inline)); 1644 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM3_FUNC(void) 1645 { 1646 return 0x80b00000014cll; 1647 } 1648 1649 #define typedef_ODY_EHSM_BIU_CORE2_CMD_PARAM3 ody_ehsm_biu_core2_cmd_param3_t 1650 #define bustype_ODY_EHSM_BIU_CORE2_CMD_PARAM3 CSR_TYPE_NCB32b 1651 #define basename_ODY_EHSM_BIU_CORE2_CMD_PARAM3 "EHSM_BIU_CORE2_CMD_PARAM3" 1652 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_PARAM3 0x0 /* PF_BAR0 */ 1653 #define busnum_ODY_EHSM_BIU_CORE2_CMD_PARAM3 0 1654 #define arguments_ODY_EHSM_BIU_CORE2_CMD_PARAM3 -1, -1, -1, -1 1655 1656 /** 1657 * Register (NCB32b) ehsm_biu_core2_cmd_param4 1658 * 1659 * EHSM Biu Core2 Cmd Param4 Register 1660 * This register contains parameter 4 associated with a EHSM primitive command from 1661 * host processor core 2. 1662 */ 1663 union ody_ehsm_biu_core2_cmd_param4 { 1664 uint32_t u; 1665 struct ody_ehsm_biu_core2_cmd_param4_s { 1666 uint32_t core2_cmd_param4 : 32; 1667 } s; 1668 /* struct ody_ehsm_biu_core2_cmd_param4_s cn; */ 1669 }; 1670 typedef union ody_ehsm_biu_core2_cmd_param4 ody_ehsm_biu_core2_cmd_param4_t; 1671 1672 #define ODY_EHSM_BIU_CORE2_CMD_PARAM4 ODY_EHSM_BIU_CORE2_CMD_PARAM4_FUNC() 1673 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM4_FUNC(void) __attribute__ ((pure, always_inline)); 1674 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM4_FUNC(void) 1675 { 1676 return 0x80b000000150ll; 1677 } 1678 1679 #define typedef_ODY_EHSM_BIU_CORE2_CMD_PARAM4 ody_ehsm_biu_core2_cmd_param4_t 1680 #define bustype_ODY_EHSM_BIU_CORE2_CMD_PARAM4 CSR_TYPE_NCB32b 1681 #define basename_ODY_EHSM_BIU_CORE2_CMD_PARAM4 "EHSM_BIU_CORE2_CMD_PARAM4" 1682 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_PARAM4 0x0 /* PF_BAR0 */ 1683 #define busnum_ODY_EHSM_BIU_CORE2_CMD_PARAM4 0 1684 #define arguments_ODY_EHSM_BIU_CORE2_CMD_PARAM4 -1, -1, -1, -1 1685 1686 /** 1687 * Register (NCB32b) ehsm_biu_core2_cmd_param5 1688 * 1689 * EHSM Biu Core2 Cmd Param5 Register 1690 * This register contains parameter 5 associated with a EHSM primitive command from 1691 * host processor core 2. 1692 */ 1693 union ody_ehsm_biu_core2_cmd_param5 { 1694 uint32_t u; 1695 struct ody_ehsm_biu_core2_cmd_param5_s { 1696 uint32_t core2_cmd_param5 : 32; 1697 } s; 1698 /* struct ody_ehsm_biu_core2_cmd_param5_s cn; */ 1699 }; 1700 typedef union ody_ehsm_biu_core2_cmd_param5 ody_ehsm_biu_core2_cmd_param5_t; 1701 1702 #define ODY_EHSM_BIU_CORE2_CMD_PARAM5 ODY_EHSM_BIU_CORE2_CMD_PARAM5_FUNC() 1703 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM5_FUNC(void) __attribute__ ((pure, always_inline)); 1704 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM5_FUNC(void) 1705 { 1706 return 0x80b000000154ll; 1707 } 1708 1709 #define typedef_ODY_EHSM_BIU_CORE2_CMD_PARAM5 ody_ehsm_biu_core2_cmd_param5_t 1710 #define bustype_ODY_EHSM_BIU_CORE2_CMD_PARAM5 CSR_TYPE_NCB32b 1711 #define basename_ODY_EHSM_BIU_CORE2_CMD_PARAM5 "EHSM_BIU_CORE2_CMD_PARAM5" 1712 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_PARAM5 0x0 /* PF_BAR0 */ 1713 #define busnum_ODY_EHSM_BIU_CORE2_CMD_PARAM5 0 1714 #define arguments_ODY_EHSM_BIU_CORE2_CMD_PARAM5 -1, -1, -1, -1 1715 1716 /** 1717 * Register (NCB32b) ehsm_biu_core2_cmd_param6 1718 * 1719 * EHSM Biu Core2 Cmd Param6 Register 1720 * This register contains parameter 6 associated with a EHSM primitive command from 1721 * host processor core 2. 1722 */ 1723 union ody_ehsm_biu_core2_cmd_param6 { 1724 uint32_t u; 1725 struct ody_ehsm_biu_core2_cmd_param6_s { 1726 uint32_t core2_cmd_param6 : 32; 1727 } s; 1728 /* struct ody_ehsm_biu_core2_cmd_param6_s cn; */ 1729 }; 1730 typedef union ody_ehsm_biu_core2_cmd_param6 ody_ehsm_biu_core2_cmd_param6_t; 1731 1732 #define ODY_EHSM_BIU_CORE2_CMD_PARAM6 ODY_EHSM_BIU_CORE2_CMD_PARAM6_FUNC() 1733 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM6_FUNC(void) __attribute__ ((pure, always_inline)); 1734 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM6_FUNC(void) 1735 { 1736 return 0x80b000000158ll; 1737 } 1738 1739 #define typedef_ODY_EHSM_BIU_CORE2_CMD_PARAM6 ody_ehsm_biu_core2_cmd_param6_t 1740 #define bustype_ODY_EHSM_BIU_CORE2_CMD_PARAM6 CSR_TYPE_NCB32b 1741 #define basename_ODY_EHSM_BIU_CORE2_CMD_PARAM6 "EHSM_BIU_CORE2_CMD_PARAM6" 1742 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_PARAM6 0x0 /* PF_BAR0 */ 1743 #define busnum_ODY_EHSM_BIU_CORE2_CMD_PARAM6 0 1744 #define arguments_ODY_EHSM_BIU_CORE2_CMD_PARAM6 -1, -1, -1, -1 1745 1746 /** 1747 * Register (NCB32b) ehsm_biu_core2_cmd_param7 1748 * 1749 * EHSM Biu Core2 Cmd Param7 Register 1750 * This register contains parameter 7 associated with a EHSM primitive command from 1751 * host processor core 2. 1752 */ 1753 union ody_ehsm_biu_core2_cmd_param7 { 1754 uint32_t u; 1755 struct ody_ehsm_biu_core2_cmd_param7_s { 1756 uint32_t core2_cmd_param7 : 32; 1757 } s; 1758 /* struct ody_ehsm_biu_core2_cmd_param7_s cn; */ 1759 }; 1760 typedef union ody_ehsm_biu_core2_cmd_param7 ody_ehsm_biu_core2_cmd_param7_t; 1761 1762 #define ODY_EHSM_BIU_CORE2_CMD_PARAM7 ODY_EHSM_BIU_CORE2_CMD_PARAM7_FUNC() 1763 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM7_FUNC(void) __attribute__ ((pure, always_inline)); 1764 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM7_FUNC(void) 1765 { 1766 return 0x80b00000015cll; 1767 } 1768 1769 #define typedef_ODY_EHSM_BIU_CORE2_CMD_PARAM7 ody_ehsm_biu_core2_cmd_param7_t 1770 #define bustype_ODY_EHSM_BIU_CORE2_CMD_PARAM7 CSR_TYPE_NCB32b 1771 #define basename_ODY_EHSM_BIU_CORE2_CMD_PARAM7 "EHSM_BIU_CORE2_CMD_PARAM7" 1772 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_PARAM7 0x0 /* PF_BAR0 */ 1773 #define busnum_ODY_EHSM_BIU_CORE2_CMD_PARAM7 0 1774 #define arguments_ODY_EHSM_BIU_CORE2_CMD_PARAM7 -1, -1, -1, -1 1775 1776 /** 1777 * Register (NCB32b) ehsm_biu_core2_cmd_param8 1778 * 1779 * EHSM Biu Core2 Cmd Param8 Register 1780 * This register contains parameter 8 associated with a EHSM primitive command from 1781 * host processor core 2. 1782 */ 1783 union ody_ehsm_biu_core2_cmd_param8 { 1784 uint32_t u; 1785 struct ody_ehsm_biu_core2_cmd_param8_s { 1786 uint32_t core2_cmd_param8 : 32; 1787 } s; 1788 /* struct ody_ehsm_biu_core2_cmd_param8_s cn; */ 1789 }; 1790 typedef union ody_ehsm_biu_core2_cmd_param8 ody_ehsm_biu_core2_cmd_param8_t; 1791 1792 #define ODY_EHSM_BIU_CORE2_CMD_PARAM8 ODY_EHSM_BIU_CORE2_CMD_PARAM8_FUNC() 1793 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM8_FUNC(void) __attribute__ ((pure, always_inline)); 1794 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM8_FUNC(void) 1795 { 1796 return 0x80b000000160ll; 1797 } 1798 1799 #define typedef_ODY_EHSM_BIU_CORE2_CMD_PARAM8 ody_ehsm_biu_core2_cmd_param8_t 1800 #define bustype_ODY_EHSM_BIU_CORE2_CMD_PARAM8 CSR_TYPE_NCB32b 1801 #define basename_ODY_EHSM_BIU_CORE2_CMD_PARAM8 "EHSM_BIU_CORE2_CMD_PARAM8" 1802 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_PARAM8 0x0 /* PF_BAR0 */ 1803 #define busnum_ODY_EHSM_BIU_CORE2_CMD_PARAM8 0 1804 #define arguments_ODY_EHSM_BIU_CORE2_CMD_PARAM8 -1, -1, -1, -1 1805 1806 /** 1807 * Register (NCB32b) ehsm_biu_core2_cmd_param9 1808 * 1809 * EHSM Biu Core2 Cmd Param9 Register 1810 * This register contains parameter 9 associated with a EHSM primitive command from 1811 * host processor core 2. 1812 */ 1813 union ody_ehsm_biu_core2_cmd_param9 { 1814 uint32_t u; 1815 struct ody_ehsm_biu_core2_cmd_param9_s { 1816 uint32_t core2_cmd_param9 : 32; 1817 } s; 1818 /* struct ody_ehsm_biu_core2_cmd_param9_s cn; */ 1819 }; 1820 typedef union ody_ehsm_biu_core2_cmd_param9 ody_ehsm_biu_core2_cmd_param9_t; 1821 1822 #define ODY_EHSM_BIU_CORE2_CMD_PARAM9 ODY_EHSM_BIU_CORE2_CMD_PARAM9_FUNC() 1823 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM9_FUNC(void) __attribute__ ((pure, always_inline)); 1824 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_PARAM9_FUNC(void) 1825 { 1826 return 0x80b000000164ll; 1827 } 1828 1829 #define typedef_ODY_EHSM_BIU_CORE2_CMD_PARAM9 ody_ehsm_biu_core2_cmd_param9_t 1830 #define bustype_ODY_EHSM_BIU_CORE2_CMD_PARAM9 CSR_TYPE_NCB32b 1831 #define basename_ODY_EHSM_BIU_CORE2_CMD_PARAM9 "EHSM_BIU_CORE2_CMD_PARAM9" 1832 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_PARAM9 0x0 /* PF_BAR0 */ 1833 #define busnum_ODY_EHSM_BIU_CORE2_CMD_PARAM9 0 1834 #define arguments_ODY_EHSM_BIU_CORE2_CMD_PARAM9 -1, -1, -1, -1 1835 1836 /** 1837 * Register (NCB32b) ehsm_biu_core2_cmd_ret_status 1838 * 1839 * EHSM Biu Core2 Cmd Ret Status Register 1840 * This register contains return status associated with a EHSM primitive command from 1841 * host processor core 2. 1842 * If it is 0, it indicates command execution success. If it is non 0, it indicates 1843 * command execution failure and the value is the error code. 1844 */ 1845 union ody_ehsm_biu_core2_cmd_ret_status { 1846 uint32_t u; 1847 struct ody_ehsm_biu_core2_cmd_ret_status_s { 1848 uint32_t core2_cmd_ret_status : 32; 1849 } s; 1850 /* struct ody_ehsm_biu_core2_cmd_ret_status_s cn; */ 1851 }; 1852 typedef union ody_ehsm_biu_core2_cmd_ret_status ody_ehsm_biu_core2_cmd_ret_status_t; 1853 1854 #define ODY_EHSM_BIU_CORE2_CMD_RET_STATUS ODY_EHSM_BIU_CORE2_CMD_RET_STATUS_FUNC() 1855 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_RET_STATUS_FUNC(void) __attribute__ ((pure, always_inline)); 1856 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_RET_STATUS_FUNC(void) 1857 { 1858 return 0x80b0000001a0ll; 1859 } 1860 1861 #define typedef_ODY_EHSM_BIU_CORE2_CMD_RET_STATUS ody_ehsm_biu_core2_cmd_ret_status_t 1862 #define bustype_ODY_EHSM_BIU_CORE2_CMD_RET_STATUS CSR_TYPE_NCB32b 1863 #define basename_ODY_EHSM_BIU_CORE2_CMD_RET_STATUS "EHSM_BIU_CORE2_CMD_RET_STATUS" 1864 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_RET_STATUS 0x0 /* PF_BAR0 */ 1865 #define busnum_ODY_EHSM_BIU_CORE2_CMD_RET_STATUS 0 1866 #define arguments_ODY_EHSM_BIU_CORE2_CMD_RET_STATUS -1, -1, -1, -1 1867 1868 /** 1869 * Register (NCB32b) ehsm_biu_core2_cmd_status0 1870 * 1871 * EHSM Biu Core2 Cmd Status0 Register 1872 * This register contains status 0 associated with a EHSM primitive command from host 1873 * processor core 2. 1874 */ 1875 union ody_ehsm_biu_core2_cmd_status0 { 1876 uint32_t u; 1877 struct ody_ehsm_biu_core2_cmd_status0_s { 1878 uint32_t core2_cmd_status0 : 32; 1879 } s; 1880 /* struct ody_ehsm_biu_core2_cmd_status0_s cn; */ 1881 }; 1882 typedef union ody_ehsm_biu_core2_cmd_status0 ody_ehsm_biu_core2_cmd_status0_t; 1883 1884 #define ODY_EHSM_BIU_CORE2_CMD_STATUS0 ODY_EHSM_BIU_CORE2_CMD_STATUS0_FUNC() 1885 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS0_FUNC(void) __attribute__ ((pure, always_inline)); 1886 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS0_FUNC(void) 1887 { 1888 return 0x80b0000001a4ll; 1889 } 1890 1891 #define typedef_ODY_EHSM_BIU_CORE2_CMD_STATUS0 ody_ehsm_biu_core2_cmd_status0_t 1892 #define bustype_ODY_EHSM_BIU_CORE2_CMD_STATUS0 CSR_TYPE_NCB32b 1893 #define basename_ODY_EHSM_BIU_CORE2_CMD_STATUS0 "EHSM_BIU_CORE2_CMD_STATUS0" 1894 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_STATUS0 0x0 /* PF_BAR0 */ 1895 #define busnum_ODY_EHSM_BIU_CORE2_CMD_STATUS0 0 1896 #define arguments_ODY_EHSM_BIU_CORE2_CMD_STATUS0 -1, -1, -1, -1 1897 1898 /** 1899 * Register (NCB32b) ehsm_biu_core2_cmd_status1 1900 * 1901 * EHSM Biu Core2 Cmd Status1 Register 1902 * This register contains status 1 associated with a EHSM primitive command from host 1903 * processor core 2. 1904 */ 1905 union ody_ehsm_biu_core2_cmd_status1 { 1906 uint32_t u; 1907 struct ody_ehsm_biu_core2_cmd_status1_s { 1908 uint32_t core2_cmd_status1 : 32; 1909 } s; 1910 /* struct ody_ehsm_biu_core2_cmd_status1_s cn; */ 1911 }; 1912 typedef union ody_ehsm_biu_core2_cmd_status1 ody_ehsm_biu_core2_cmd_status1_t; 1913 1914 #define ODY_EHSM_BIU_CORE2_CMD_STATUS1 ODY_EHSM_BIU_CORE2_CMD_STATUS1_FUNC() 1915 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS1_FUNC(void) __attribute__ ((pure, always_inline)); 1916 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS1_FUNC(void) 1917 { 1918 return 0x80b0000001a8ll; 1919 } 1920 1921 #define typedef_ODY_EHSM_BIU_CORE2_CMD_STATUS1 ody_ehsm_biu_core2_cmd_status1_t 1922 #define bustype_ODY_EHSM_BIU_CORE2_CMD_STATUS1 CSR_TYPE_NCB32b 1923 #define basename_ODY_EHSM_BIU_CORE2_CMD_STATUS1 "EHSM_BIU_CORE2_CMD_STATUS1" 1924 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_STATUS1 0x0 /* PF_BAR0 */ 1925 #define busnum_ODY_EHSM_BIU_CORE2_CMD_STATUS1 0 1926 #define arguments_ODY_EHSM_BIU_CORE2_CMD_STATUS1 -1, -1, -1, -1 1927 1928 /** 1929 * Register (NCB32b) ehsm_biu_core2_cmd_status10 1930 * 1931 * EHSM Biu Core2 Cmd Status10 Register 1932 * This register contains status 10 associated with a EHSM primitive command from host 1933 * processor core 2. 1934 */ 1935 union ody_ehsm_biu_core2_cmd_status10 { 1936 uint32_t u; 1937 struct ody_ehsm_biu_core2_cmd_status10_s { 1938 uint32_t core2_cmd_status10 : 32; 1939 } s; 1940 /* struct ody_ehsm_biu_core2_cmd_status10_s cn; */ 1941 }; 1942 typedef union ody_ehsm_biu_core2_cmd_status10 ody_ehsm_biu_core2_cmd_status10_t; 1943 1944 #define ODY_EHSM_BIU_CORE2_CMD_STATUS10 ODY_EHSM_BIU_CORE2_CMD_STATUS10_FUNC() 1945 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS10_FUNC(void) __attribute__ ((pure, always_inline)); 1946 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS10_FUNC(void) 1947 { 1948 return 0x80b0000001ccll; 1949 } 1950 1951 #define typedef_ODY_EHSM_BIU_CORE2_CMD_STATUS10 ody_ehsm_biu_core2_cmd_status10_t 1952 #define bustype_ODY_EHSM_BIU_CORE2_CMD_STATUS10 CSR_TYPE_NCB32b 1953 #define basename_ODY_EHSM_BIU_CORE2_CMD_STATUS10 "EHSM_BIU_CORE2_CMD_STATUS10" 1954 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_STATUS10 0x0 /* PF_BAR0 */ 1955 #define busnum_ODY_EHSM_BIU_CORE2_CMD_STATUS10 0 1956 #define arguments_ODY_EHSM_BIU_CORE2_CMD_STATUS10 -1, -1, -1, -1 1957 1958 /** 1959 * Register (NCB32b) ehsm_biu_core2_cmd_status11 1960 * 1961 * EHSM Biu Core2 Cmd Status11 Register 1962 * This register contains status 11 associated with a EHSM primitive command from host 1963 * processor core 2. 1964 */ 1965 union ody_ehsm_biu_core2_cmd_status11 { 1966 uint32_t u; 1967 struct ody_ehsm_biu_core2_cmd_status11_s { 1968 uint32_t core2_cmd_status11 : 32; 1969 } s; 1970 /* struct ody_ehsm_biu_core2_cmd_status11_s cn; */ 1971 }; 1972 typedef union ody_ehsm_biu_core2_cmd_status11 ody_ehsm_biu_core2_cmd_status11_t; 1973 1974 #define ODY_EHSM_BIU_CORE2_CMD_STATUS11 ODY_EHSM_BIU_CORE2_CMD_STATUS11_FUNC() 1975 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS11_FUNC(void) __attribute__ ((pure, always_inline)); 1976 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS11_FUNC(void) 1977 { 1978 return 0x80b0000001d0ll; 1979 } 1980 1981 #define typedef_ODY_EHSM_BIU_CORE2_CMD_STATUS11 ody_ehsm_biu_core2_cmd_status11_t 1982 #define bustype_ODY_EHSM_BIU_CORE2_CMD_STATUS11 CSR_TYPE_NCB32b 1983 #define basename_ODY_EHSM_BIU_CORE2_CMD_STATUS11 "EHSM_BIU_CORE2_CMD_STATUS11" 1984 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_STATUS11 0x0 /* PF_BAR0 */ 1985 #define busnum_ODY_EHSM_BIU_CORE2_CMD_STATUS11 0 1986 #define arguments_ODY_EHSM_BIU_CORE2_CMD_STATUS11 -1, -1, -1, -1 1987 1988 /** 1989 * Register (NCB32b) ehsm_biu_core2_cmd_status12 1990 * 1991 * EHSM Biu Core2 Cmd Status12 Register 1992 * This register contains status 12 associated with a EHSM primitive command from host 1993 * processor core 2. 1994 */ 1995 union ody_ehsm_biu_core2_cmd_status12 { 1996 uint32_t u; 1997 struct ody_ehsm_biu_core2_cmd_status12_s { 1998 uint32_t core2_cmd_status12 : 32; 1999 } s; 2000 /* struct ody_ehsm_biu_core2_cmd_status12_s cn; */ 2001 }; 2002 typedef union ody_ehsm_biu_core2_cmd_status12 ody_ehsm_biu_core2_cmd_status12_t; 2003 2004 #define ODY_EHSM_BIU_CORE2_CMD_STATUS12 ODY_EHSM_BIU_CORE2_CMD_STATUS12_FUNC() 2005 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS12_FUNC(void) __attribute__ ((pure, always_inline)); 2006 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS12_FUNC(void) 2007 { 2008 return 0x80b0000001d4ll; 2009 } 2010 2011 #define typedef_ODY_EHSM_BIU_CORE2_CMD_STATUS12 ody_ehsm_biu_core2_cmd_status12_t 2012 #define bustype_ODY_EHSM_BIU_CORE2_CMD_STATUS12 CSR_TYPE_NCB32b 2013 #define basename_ODY_EHSM_BIU_CORE2_CMD_STATUS12 "EHSM_BIU_CORE2_CMD_STATUS12" 2014 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_STATUS12 0x0 /* PF_BAR0 */ 2015 #define busnum_ODY_EHSM_BIU_CORE2_CMD_STATUS12 0 2016 #define arguments_ODY_EHSM_BIU_CORE2_CMD_STATUS12 -1, -1, -1, -1 2017 2018 /** 2019 * Register (NCB32b) ehsm_biu_core2_cmd_status13 2020 * 2021 * EHSM Biu Core2 Cmd Status13 Register 2022 * This register contains status 13 associated with a EHSM primitive command from host 2023 * processor core 2. 2024 */ 2025 union ody_ehsm_biu_core2_cmd_status13 { 2026 uint32_t u; 2027 struct ody_ehsm_biu_core2_cmd_status13_s { 2028 uint32_t core2_cmd_status13 : 32; 2029 } s; 2030 /* struct ody_ehsm_biu_core2_cmd_status13_s cn; */ 2031 }; 2032 typedef union ody_ehsm_biu_core2_cmd_status13 ody_ehsm_biu_core2_cmd_status13_t; 2033 2034 #define ODY_EHSM_BIU_CORE2_CMD_STATUS13 ODY_EHSM_BIU_CORE2_CMD_STATUS13_FUNC() 2035 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS13_FUNC(void) __attribute__ ((pure, always_inline)); 2036 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS13_FUNC(void) 2037 { 2038 return 0x80b0000001d8ll; 2039 } 2040 2041 #define typedef_ODY_EHSM_BIU_CORE2_CMD_STATUS13 ody_ehsm_biu_core2_cmd_status13_t 2042 #define bustype_ODY_EHSM_BIU_CORE2_CMD_STATUS13 CSR_TYPE_NCB32b 2043 #define basename_ODY_EHSM_BIU_CORE2_CMD_STATUS13 "EHSM_BIU_CORE2_CMD_STATUS13" 2044 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_STATUS13 0x0 /* PF_BAR0 */ 2045 #define busnum_ODY_EHSM_BIU_CORE2_CMD_STATUS13 0 2046 #define arguments_ODY_EHSM_BIU_CORE2_CMD_STATUS13 -1, -1, -1, -1 2047 2048 /** 2049 * Register (NCB32b) ehsm_biu_core2_cmd_status14 2050 * 2051 * EHSM Biu Core2 Cmd Status14 Register 2052 * This register contains status 14 associated with a EHSM primitive command from host 2053 * processor core 2. 2054 */ 2055 union ody_ehsm_biu_core2_cmd_status14 { 2056 uint32_t u; 2057 struct ody_ehsm_biu_core2_cmd_status14_s { 2058 uint32_t core2_cmd_status14 : 32; 2059 } s; 2060 /* struct ody_ehsm_biu_core2_cmd_status14_s cn; */ 2061 }; 2062 typedef union ody_ehsm_biu_core2_cmd_status14 ody_ehsm_biu_core2_cmd_status14_t; 2063 2064 #define ODY_EHSM_BIU_CORE2_CMD_STATUS14 ODY_EHSM_BIU_CORE2_CMD_STATUS14_FUNC() 2065 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS14_FUNC(void) __attribute__ ((pure, always_inline)); 2066 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS14_FUNC(void) 2067 { 2068 return 0x80b0000001dcll; 2069 } 2070 2071 #define typedef_ODY_EHSM_BIU_CORE2_CMD_STATUS14 ody_ehsm_biu_core2_cmd_status14_t 2072 #define bustype_ODY_EHSM_BIU_CORE2_CMD_STATUS14 CSR_TYPE_NCB32b 2073 #define basename_ODY_EHSM_BIU_CORE2_CMD_STATUS14 "EHSM_BIU_CORE2_CMD_STATUS14" 2074 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_STATUS14 0x0 /* PF_BAR0 */ 2075 #define busnum_ODY_EHSM_BIU_CORE2_CMD_STATUS14 0 2076 #define arguments_ODY_EHSM_BIU_CORE2_CMD_STATUS14 -1, -1, -1, -1 2077 2078 /** 2079 * Register (NCB32b) ehsm_biu_core2_cmd_status15 2080 * 2081 * EHSM Biu Core2 Cmd Status15 Register 2082 * This register contains status 15 associated with a EHSM primitive command from host 2083 * processor core 2. 2084 */ 2085 union ody_ehsm_biu_core2_cmd_status15 { 2086 uint32_t u; 2087 struct ody_ehsm_biu_core2_cmd_status15_s { 2088 uint32_t core2_cmd_status15 : 32; 2089 } s; 2090 /* struct ody_ehsm_biu_core2_cmd_status15_s cn; */ 2091 }; 2092 typedef union ody_ehsm_biu_core2_cmd_status15 ody_ehsm_biu_core2_cmd_status15_t; 2093 2094 #define ODY_EHSM_BIU_CORE2_CMD_STATUS15 ODY_EHSM_BIU_CORE2_CMD_STATUS15_FUNC() 2095 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS15_FUNC(void) __attribute__ ((pure, always_inline)); 2096 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS15_FUNC(void) 2097 { 2098 return 0x80b0000001e0ll; 2099 } 2100 2101 #define typedef_ODY_EHSM_BIU_CORE2_CMD_STATUS15 ody_ehsm_biu_core2_cmd_status15_t 2102 #define bustype_ODY_EHSM_BIU_CORE2_CMD_STATUS15 CSR_TYPE_NCB32b 2103 #define basename_ODY_EHSM_BIU_CORE2_CMD_STATUS15 "EHSM_BIU_CORE2_CMD_STATUS15" 2104 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_STATUS15 0x0 /* PF_BAR0 */ 2105 #define busnum_ODY_EHSM_BIU_CORE2_CMD_STATUS15 0 2106 #define arguments_ODY_EHSM_BIU_CORE2_CMD_STATUS15 -1, -1, -1, -1 2107 2108 /** 2109 * Register (NCB32b) ehsm_biu_core2_cmd_status2 2110 * 2111 * EHSM Biu Core2 Cmd Status2 Register 2112 * This register contains status 2 associated with a EHSM primitive command from host 2113 * processor core 2. 2114 */ 2115 union ody_ehsm_biu_core2_cmd_status2 { 2116 uint32_t u; 2117 struct ody_ehsm_biu_core2_cmd_status2_s { 2118 uint32_t core2_cmd_status2 : 32; 2119 } s; 2120 /* struct ody_ehsm_biu_core2_cmd_status2_s cn; */ 2121 }; 2122 typedef union ody_ehsm_biu_core2_cmd_status2 ody_ehsm_biu_core2_cmd_status2_t; 2123 2124 #define ODY_EHSM_BIU_CORE2_CMD_STATUS2 ODY_EHSM_BIU_CORE2_CMD_STATUS2_FUNC() 2125 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS2_FUNC(void) __attribute__ ((pure, always_inline)); 2126 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS2_FUNC(void) 2127 { 2128 return 0x80b0000001acll; 2129 } 2130 2131 #define typedef_ODY_EHSM_BIU_CORE2_CMD_STATUS2 ody_ehsm_biu_core2_cmd_status2_t 2132 #define bustype_ODY_EHSM_BIU_CORE2_CMD_STATUS2 CSR_TYPE_NCB32b 2133 #define basename_ODY_EHSM_BIU_CORE2_CMD_STATUS2 "EHSM_BIU_CORE2_CMD_STATUS2" 2134 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_STATUS2 0x0 /* PF_BAR0 */ 2135 #define busnum_ODY_EHSM_BIU_CORE2_CMD_STATUS2 0 2136 #define arguments_ODY_EHSM_BIU_CORE2_CMD_STATUS2 -1, -1, -1, -1 2137 2138 /** 2139 * Register (NCB32b) ehsm_biu_core2_cmd_status3 2140 * 2141 * EHSM Biu Core2 Cmd Status3 Register 2142 * This register contains status 3 associated with a EHSM primitive command from host 2143 * processor core 2. 2144 */ 2145 union ody_ehsm_biu_core2_cmd_status3 { 2146 uint32_t u; 2147 struct ody_ehsm_biu_core2_cmd_status3_s { 2148 uint32_t core2_cmd_status3 : 32; 2149 } s; 2150 /* struct ody_ehsm_biu_core2_cmd_status3_s cn; */ 2151 }; 2152 typedef union ody_ehsm_biu_core2_cmd_status3 ody_ehsm_biu_core2_cmd_status3_t; 2153 2154 #define ODY_EHSM_BIU_CORE2_CMD_STATUS3 ODY_EHSM_BIU_CORE2_CMD_STATUS3_FUNC() 2155 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS3_FUNC(void) __attribute__ ((pure, always_inline)); 2156 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS3_FUNC(void) 2157 { 2158 return 0x80b0000001b0ll; 2159 } 2160 2161 #define typedef_ODY_EHSM_BIU_CORE2_CMD_STATUS3 ody_ehsm_biu_core2_cmd_status3_t 2162 #define bustype_ODY_EHSM_BIU_CORE2_CMD_STATUS3 CSR_TYPE_NCB32b 2163 #define basename_ODY_EHSM_BIU_CORE2_CMD_STATUS3 "EHSM_BIU_CORE2_CMD_STATUS3" 2164 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_STATUS3 0x0 /* PF_BAR0 */ 2165 #define busnum_ODY_EHSM_BIU_CORE2_CMD_STATUS3 0 2166 #define arguments_ODY_EHSM_BIU_CORE2_CMD_STATUS3 -1, -1, -1, -1 2167 2168 /** 2169 * Register (NCB32b) ehsm_biu_core2_cmd_status4 2170 * 2171 * EHSM Biu Core2 Cmd Status4 Register 2172 * This register contains status 4 associated with a EHSM primitive command from host 2173 * processor core 2. 2174 */ 2175 union ody_ehsm_biu_core2_cmd_status4 { 2176 uint32_t u; 2177 struct ody_ehsm_biu_core2_cmd_status4_s { 2178 uint32_t core2_cmd_status4 : 32; 2179 } s; 2180 /* struct ody_ehsm_biu_core2_cmd_status4_s cn; */ 2181 }; 2182 typedef union ody_ehsm_biu_core2_cmd_status4 ody_ehsm_biu_core2_cmd_status4_t; 2183 2184 #define ODY_EHSM_BIU_CORE2_CMD_STATUS4 ODY_EHSM_BIU_CORE2_CMD_STATUS4_FUNC() 2185 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS4_FUNC(void) __attribute__ ((pure, always_inline)); 2186 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS4_FUNC(void) 2187 { 2188 return 0x80b0000001b4ll; 2189 } 2190 2191 #define typedef_ODY_EHSM_BIU_CORE2_CMD_STATUS4 ody_ehsm_biu_core2_cmd_status4_t 2192 #define bustype_ODY_EHSM_BIU_CORE2_CMD_STATUS4 CSR_TYPE_NCB32b 2193 #define basename_ODY_EHSM_BIU_CORE2_CMD_STATUS4 "EHSM_BIU_CORE2_CMD_STATUS4" 2194 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_STATUS4 0x0 /* PF_BAR0 */ 2195 #define busnum_ODY_EHSM_BIU_CORE2_CMD_STATUS4 0 2196 #define arguments_ODY_EHSM_BIU_CORE2_CMD_STATUS4 -1, -1, -1, -1 2197 2198 /** 2199 * Register (NCB32b) ehsm_biu_core2_cmd_status5 2200 * 2201 * EHSM Biu Core2 Cmd Status5 Register 2202 * This register contains status 5 associated with a EHSM primitive command from host 2203 * processor core 2. 2204 */ 2205 union ody_ehsm_biu_core2_cmd_status5 { 2206 uint32_t u; 2207 struct ody_ehsm_biu_core2_cmd_status5_s { 2208 uint32_t core2_cmd_status5 : 32; 2209 } s; 2210 /* struct ody_ehsm_biu_core2_cmd_status5_s cn; */ 2211 }; 2212 typedef union ody_ehsm_biu_core2_cmd_status5 ody_ehsm_biu_core2_cmd_status5_t; 2213 2214 #define ODY_EHSM_BIU_CORE2_CMD_STATUS5 ODY_EHSM_BIU_CORE2_CMD_STATUS5_FUNC() 2215 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS5_FUNC(void) __attribute__ ((pure, always_inline)); 2216 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS5_FUNC(void) 2217 { 2218 return 0x80b0000001b8ll; 2219 } 2220 2221 #define typedef_ODY_EHSM_BIU_CORE2_CMD_STATUS5 ody_ehsm_biu_core2_cmd_status5_t 2222 #define bustype_ODY_EHSM_BIU_CORE2_CMD_STATUS5 CSR_TYPE_NCB32b 2223 #define basename_ODY_EHSM_BIU_CORE2_CMD_STATUS5 "EHSM_BIU_CORE2_CMD_STATUS5" 2224 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_STATUS5 0x0 /* PF_BAR0 */ 2225 #define busnum_ODY_EHSM_BIU_CORE2_CMD_STATUS5 0 2226 #define arguments_ODY_EHSM_BIU_CORE2_CMD_STATUS5 -1, -1, -1, -1 2227 2228 /** 2229 * Register (NCB32b) ehsm_biu_core2_cmd_status6 2230 * 2231 * EHSM Biu Core2 Cmd Status6 Register 2232 * This register contains status 6 associated with a EHSM primitive command from host 2233 * processor core 2. 2234 */ 2235 union ody_ehsm_biu_core2_cmd_status6 { 2236 uint32_t u; 2237 struct ody_ehsm_biu_core2_cmd_status6_s { 2238 uint32_t core2_cmd_status6 : 32; 2239 } s; 2240 /* struct ody_ehsm_biu_core2_cmd_status6_s cn; */ 2241 }; 2242 typedef union ody_ehsm_biu_core2_cmd_status6 ody_ehsm_biu_core2_cmd_status6_t; 2243 2244 #define ODY_EHSM_BIU_CORE2_CMD_STATUS6 ODY_EHSM_BIU_CORE2_CMD_STATUS6_FUNC() 2245 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS6_FUNC(void) __attribute__ ((pure, always_inline)); 2246 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS6_FUNC(void) 2247 { 2248 return 0x80b0000001bcll; 2249 } 2250 2251 #define typedef_ODY_EHSM_BIU_CORE2_CMD_STATUS6 ody_ehsm_biu_core2_cmd_status6_t 2252 #define bustype_ODY_EHSM_BIU_CORE2_CMD_STATUS6 CSR_TYPE_NCB32b 2253 #define basename_ODY_EHSM_BIU_CORE2_CMD_STATUS6 "EHSM_BIU_CORE2_CMD_STATUS6" 2254 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_STATUS6 0x0 /* PF_BAR0 */ 2255 #define busnum_ODY_EHSM_BIU_CORE2_CMD_STATUS6 0 2256 #define arguments_ODY_EHSM_BIU_CORE2_CMD_STATUS6 -1, -1, -1, -1 2257 2258 /** 2259 * Register (NCB32b) ehsm_biu_core2_cmd_status7 2260 * 2261 * EHSM Biu Core2 Cmd Status7 Register 2262 * This register contains status 7 associated with a EHSM primitive command from host 2263 * processor core 2. 2264 */ 2265 union ody_ehsm_biu_core2_cmd_status7 { 2266 uint32_t u; 2267 struct ody_ehsm_biu_core2_cmd_status7_s { 2268 uint32_t core2_cmd_status7 : 32; 2269 } s; 2270 /* struct ody_ehsm_biu_core2_cmd_status7_s cn; */ 2271 }; 2272 typedef union ody_ehsm_biu_core2_cmd_status7 ody_ehsm_biu_core2_cmd_status7_t; 2273 2274 #define ODY_EHSM_BIU_CORE2_CMD_STATUS7 ODY_EHSM_BIU_CORE2_CMD_STATUS7_FUNC() 2275 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS7_FUNC(void) __attribute__ ((pure, always_inline)); 2276 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS7_FUNC(void) 2277 { 2278 return 0x80b0000001c0ll; 2279 } 2280 2281 #define typedef_ODY_EHSM_BIU_CORE2_CMD_STATUS7 ody_ehsm_biu_core2_cmd_status7_t 2282 #define bustype_ODY_EHSM_BIU_CORE2_CMD_STATUS7 CSR_TYPE_NCB32b 2283 #define basename_ODY_EHSM_BIU_CORE2_CMD_STATUS7 "EHSM_BIU_CORE2_CMD_STATUS7" 2284 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_STATUS7 0x0 /* PF_BAR0 */ 2285 #define busnum_ODY_EHSM_BIU_CORE2_CMD_STATUS7 0 2286 #define arguments_ODY_EHSM_BIU_CORE2_CMD_STATUS7 -1, -1, -1, -1 2287 2288 /** 2289 * Register (NCB32b) ehsm_biu_core2_cmd_status8 2290 * 2291 * EHSM Biu Core2 Cmd Status8 Register 2292 * This register contains status 8 associated with a EHSM primitive command from host 2293 * processor core 2. 2294 */ 2295 union ody_ehsm_biu_core2_cmd_status8 { 2296 uint32_t u; 2297 struct ody_ehsm_biu_core2_cmd_status8_s { 2298 uint32_t core2_cmd_status8 : 32; 2299 } s; 2300 /* struct ody_ehsm_biu_core2_cmd_status8_s cn; */ 2301 }; 2302 typedef union ody_ehsm_biu_core2_cmd_status8 ody_ehsm_biu_core2_cmd_status8_t; 2303 2304 #define ODY_EHSM_BIU_CORE2_CMD_STATUS8 ODY_EHSM_BIU_CORE2_CMD_STATUS8_FUNC() 2305 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS8_FUNC(void) __attribute__ ((pure, always_inline)); 2306 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS8_FUNC(void) 2307 { 2308 return 0x80b0000001c4ll; 2309 } 2310 2311 #define typedef_ODY_EHSM_BIU_CORE2_CMD_STATUS8 ody_ehsm_biu_core2_cmd_status8_t 2312 #define bustype_ODY_EHSM_BIU_CORE2_CMD_STATUS8 CSR_TYPE_NCB32b 2313 #define basename_ODY_EHSM_BIU_CORE2_CMD_STATUS8 "EHSM_BIU_CORE2_CMD_STATUS8" 2314 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_STATUS8 0x0 /* PF_BAR0 */ 2315 #define busnum_ODY_EHSM_BIU_CORE2_CMD_STATUS8 0 2316 #define arguments_ODY_EHSM_BIU_CORE2_CMD_STATUS8 -1, -1, -1, -1 2317 2318 /** 2319 * Register (NCB32b) ehsm_biu_core2_cmd_status9 2320 * 2321 * EHSM Biu Core2 Cmd Status9 Register 2322 * This register contains status 9 associated with a EHSM primitive command from host 2323 * processor core 2. 2324 */ 2325 union ody_ehsm_biu_core2_cmd_status9 { 2326 uint32_t u; 2327 struct ody_ehsm_biu_core2_cmd_status9_s { 2328 uint32_t core2_cmd_status9 : 32; 2329 } s; 2330 /* struct ody_ehsm_biu_core2_cmd_status9_s cn; */ 2331 }; 2332 typedef union ody_ehsm_biu_core2_cmd_status9 ody_ehsm_biu_core2_cmd_status9_t; 2333 2334 #define ODY_EHSM_BIU_CORE2_CMD_STATUS9 ODY_EHSM_BIU_CORE2_CMD_STATUS9_FUNC() 2335 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS9_FUNC(void) __attribute__ ((pure, always_inline)); 2336 static inline uint64_t ODY_EHSM_BIU_CORE2_CMD_STATUS9_FUNC(void) 2337 { 2338 return 0x80b0000001c8ll; 2339 } 2340 2341 #define typedef_ODY_EHSM_BIU_CORE2_CMD_STATUS9 ody_ehsm_biu_core2_cmd_status9_t 2342 #define bustype_ODY_EHSM_BIU_CORE2_CMD_STATUS9 CSR_TYPE_NCB32b 2343 #define basename_ODY_EHSM_BIU_CORE2_CMD_STATUS9 "EHSM_BIU_CORE2_CMD_STATUS9" 2344 #define device_bar_ODY_EHSM_BIU_CORE2_CMD_STATUS9 0x0 /* PF_BAR0 */ 2345 #define busnum_ODY_EHSM_BIU_CORE2_CMD_STATUS9 0 2346 #define arguments_ODY_EHSM_BIU_CORE2_CMD_STATUS9 -1, -1, -1, -1 2347 2348 /** 2349 * Register (NCB32b) ehsm_biu_core2_hst_interrupt_mask 2350 * 2351 * EHSM Biu Core2 Hst Interrupt Mask Register 2352 * This is host interrupt masking register for host processor core 2 2353 */ 2354 union ody_ehsm_biu_core2_hst_interrupt_mask { 2355 uint32_t u; 2356 struct ody_ehsm_biu_core2_hst_interrupt_mask_s { 2357 uint32_t core2_hst_interrupt_mask : 32; 2358 } s; 2359 /* struct ody_ehsm_biu_core2_hst_interrupt_mask_s cn; */ 2360 }; 2361 typedef union ody_ehsm_biu_core2_hst_interrupt_mask ody_ehsm_biu_core2_hst_interrupt_mask_t; 2362 2363 #define ODY_EHSM_BIU_CORE2_HST_INTERRUPT_MASK ODY_EHSM_BIU_CORE2_HST_INTERRUPT_MASK_FUNC() 2364 static inline uint64_t ODY_EHSM_BIU_CORE2_HST_INTERRUPT_MASK_FUNC(void) __attribute__ ((pure, always_inline)); 2365 static inline uint64_t ODY_EHSM_BIU_CORE2_HST_INTERRUPT_MASK_FUNC(void) 2366 { 2367 return 0x80b0000001e8ll; 2368 } 2369 2370 #define typedef_ODY_EHSM_BIU_CORE2_HST_INTERRUPT_MASK ody_ehsm_biu_core2_hst_interrupt_mask_t 2371 #define bustype_ODY_EHSM_BIU_CORE2_HST_INTERRUPT_MASK CSR_TYPE_NCB32b 2372 #define basename_ODY_EHSM_BIU_CORE2_HST_INTERRUPT_MASK "EHSM_BIU_CORE2_HST_INTERRUPT_MASK" 2373 #define device_bar_ODY_EHSM_BIU_CORE2_HST_INTERRUPT_MASK 0x0 /* PF_BAR0 */ 2374 #define busnum_ODY_EHSM_BIU_CORE2_HST_INTERRUPT_MASK 0 2375 #define arguments_ODY_EHSM_BIU_CORE2_HST_INTERRUPT_MASK -1, -1, -1, -1 2376 2377 /** 2378 * Register (NCB32b) ehsm_biu_core2_hst_interrupt_rst 2379 * 2380 * EHSM Biu Core2 Hst Interrupt Rst Register 2381 * This is host interrupt register for host processor core 2 2382 */ 2383 union ody_ehsm_biu_core2_hst_interrupt_rst { 2384 uint32_t u; 2385 struct ody_ehsm_biu_core2_hst_interrupt_rst_s { 2386 uint32_t irom_exe_int : 1; 2387 uint32_t ehsm_mem_fail : 1; 2388 uint32_t sysrdyp_timeout : 1; 2389 uint32_t reserved_3_15 : 13; 2390 uint32_t hst_addr_range : 1; 2391 uint32_t cmd_buffer_full_access : 1; 2392 uint32_t reserved_18_31 : 14; 2393 } s; 2394 /* struct ody_ehsm_biu_core2_hst_interrupt_rst_s cn; */ 2395 }; 2396 typedef union ody_ehsm_biu_core2_hst_interrupt_rst ody_ehsm_biu_core2_hst_interrupt_rst_t; 2397 2398 #define ODY_EHSM_BIU_CORE2_HST_INTERRUPT_RST ODY_EHSM_BIU_CORE2_HST_INTERRUPT_RST_FUNC() 2399 static inline uint64_t ODY_EHSM_BIU_CORE2_HST_INTERRUPT_RST_FUNC(void) __attribute__ ((pure, always_inline)); 2400 static inline uint64_t ODY_EHSM_BIU_CORE2_HST_INTERRUPT_RST_FUNC(void) 2401 { 2402 return 0x80b0000001e4ll; 2403 } 2404 2405 #define typedef_ODY_EHSM_BIU_CORE2_HST_INTERRUPT_RST ody_ehsm_biu_core2_hst_interrupt_rst_t 2406 #define bustype_ODY_EHSM_BIU_CORE2_HST_INTERRUPT_RST CSR_TYPE_NCB32b 2407 #define basename_ODY_EHSM_BIU_CORE2_HST_INTERRUPT_RST "EHSM_BIU_CORE2_HST_INTERRUPT_RST" 2408 #define device_bar_ODY_EHSM_BIU_CORE2_HST_INTERRUPT_RST 0x0 /* PF_BAR0 */ 2409 #define busnum_ODY_EHSM_BIU_CORE2_HST_INTERRUPT_RST 0 2410 #define arguments_ODY_EHSM_BIU_CORE2_HST_INTERRUPT_RST -1, -1, -1, -1 2411 2412 /** 2413 * Register (NCB32b) ehsm_biu_ehsm_id 2414 * 2415 * EHSM Biu Ehsm Id Register 2416 * This is EHSM ID. Each project is assigned with a unique EHSM ID. 2417 */ 2418 union ody_ehsm_biu_ehsm_id { 2419 uint32_t u; 2420 struct ody_ehsm_biu_ehsm_id_s { 2421 uint32_t ehsm_id : 32; 2422 } s; 2423 /* struct ody_ehsm_biu_ehsm_id_s cn; */ 2424 }; 2425 typedef union ody_ehsm_biu_ehsm_id ody_ehsm_biu_ehsm_id_t; 2426 2427 #define ODY_EHSM_BIU_EHSM_ID ODY_EHSM_BIU_EHSM_ID_FUNC() 2428 static inline uint64_t ODY_EHSM_BIU_EHSM_ID_FUNC(void) __attribute__ ((pure, always_inline)); 2429 static inline uint64_t ODY_EHSM_BIU_EHSM_ID_FUNC(void) 2430 { 2431 return 0x80b0000000d8ll; 2432 } 2433 2434 #define typedef_ODY_EHSM_BIU_EHSM_ID ody_ehsm_biu_ehsm_id_t 2435 #define bustype_ODY_EHSM_BIU_EHSM_ID CSR_TYPE_NCB32b 2436 #define basename_ODY_EHSM_BIU_EHSM_ID "EHSM_BIU_EHSM_ID" 2437 #define device_bar_ODY_EHSM_BIU_EHSM_ID 0x0 /* PF_BAR0 */ 2438 #define busnum_ODY_EHSM_BIU_EHSM_ID 0 2439 #define arguments_ODY_EHSM_BIU_EHSM_ID -1, -1, -1, -1 2440 2441 /** 2442 * Register (NCB32b) ehsm_biu_ehsm_rev 2443 * 2444 * EHSM Biu Ehsm Rev Register 2445 * This is EHSM revision. 2446 */ 2447 union ody_ehsm_biu_ehsm_rev { 2448 uint32_t u; 2449 struct ody_ehsm_biu_ehsm_rev_s { 2450 uint32_t ehsm_rev : 32; 2451 } s; 2452 /* struct ody_ehsm_biu_ehsm_rev_s cn; */ 2453 }; 2454 typedef union ody_ehsm_biu_ehsm_rev ody_ehsm_biu_ehsm_rev_t; 2455 2456 #define ODY_EHSM_BIU_EHSM_REV ODY_EHSM_BIU_EHSM_REV_FUNC() 2457 static inline uint64_t ODY_EHSM_BIU_EHSM_REV_FUNC(void) __attribute__ ((pure, always_inline)); 2458 static inline uint64_t ODY_EHSM_BIU_EHSM_REV_FUNC(void) 2459 { 2460 return 0x80b0000000dcll; 2461 } 2462 2463 #define typedef_ODY_EHSM_BIU_EHSM_REV ody_ehsm_biu_ehsm_rev_t 2464 #define bustype_ODY_EHSM_BIU_EHSM_REV CSR_TYPE_NCB32b 2465 #define basename_ODY_EHSM_BIU_EHSM_REV "EHSM_BIU_EHSM_REV" 2466 #define device_bar_ODY_EHSM_BIU_EHSM_REV 0x0 /* PF_BAR0 */ 2467 #define busnum_ODY_EHSM_BIU_EHSM_REV 0 2468 #define arguments_ODY_EHSM_BIU_EHSM_REV -1, -1, -1, -1 2469 2470 /** 2471 * Register (NCB32b) ehsm_biu_fw_security_version 2472 * 2473 * EHSM Biu Fw Security Version Register 2474 * This is for EHSM-78 2475 */ 2476 union ody_ehsm_biu_fw_security_version { 2477 uint32_t u; 2478 struct ody_ehsm_biu_fw_security_version_s { 2479 uint32_t loader_fw_security_version : 4; 2480 uint32_t main_fw_security_version : 6; 2481 uint32_t kak_id_valid : 1; 2482 uint32_t kak_id : 2; 2483 uint32_t reserved_13_31 : 19; 2484 } s; 2485 /* struct ody_ehsm_biu_fw_security_version_s cn; */ 2486 }; 2487 typedef union ody_ehsm_biu_fw_security_version ody_ehsm_biu_fw_security_version_t; 2488 2489 #define ODY_EHSM_BIU_FW_SECURITY_VERSION ODY_EHSM_BIU_FW_SECURITY_VERSION_FUNC() 2490 static inline uint64_t ODY_EHSM_BIU_FW_SECURITY_VERSION_FUNC(void) __attribute__ ((pure, always_inline)); 2491 static inline uint64_t ODY_EHSM_BIU_FW_SECURITY_VERSION_FUNC(void) 2492 { 2493 return 0x80b000000124ll; 2494 } 2495 2496 #define typedef_ODY_EHSM_BIU_FW_SECURITY_VERSION ody_ehsm_biu_fw_security_version_t 2497 #define bustype_ODY_EHSM_BIU_FW_SECURITY_VERSION CSR_TYPE_NCB32b 2498 #define basename_ODY_EHSM_BIU_FW_SECURITY_VERSION "EHSM_BIU_FW_SECURITY_VERSION" 2499 #define device_bar_ODY_EHSM_BIU_FW_SECURITY_VERSION 0x0 /* PF_BAR0 */ 2500 #define busnum_ODY_EHSM_BIU_FW_SECURITY_VERSION 0 2501 #define arguments_ODY_EHSM_BIU_FW_SECURITY_VERSION -1, -1, -1, -1 2502 2503 /** 2504 * Register (NCB32b) ehsm_biu_hst_except_addr 2505 * 2506 * EHSM Biu Hst Except Addr Register 2507 * This is the address that triggers HST_ADDR_RANGE in CORE1_HST_INTERRUPT_RST and 2508 * CORE2_HST_INTERRUPT_RST. 2509 */ 2510 union ody_ehsm_biu_hst_except_addr { 2511 uint32_t u; 2512 struct ody_ehsm_biu_hst_except_addr_s { 2513 uint32_t hst_except_addr : 32; 2514 } s; 2515 /* struct ody_ehsm_biu_hst_except_addr_s cn; */ 2516 }; 2517 typedef union ody_ehsm_biu_hst_except_addr ody_ehsm_biu_hst_except_addr_t; 2518 2519 #define ODY_EHSM_BIU_HST_EXCEPT_ADDR ODY_EHSM_BIU_HST_EXCEPT_ADDR_FUNC() 2520 static inline uint64_t ODY_EHSM_BIU_HST_EXCEPT_ADDR_FUNC(void) __attribute__ ((pure, always_inline)); 2521 static inline uint64_t ODY_EHSM_BIU_HST_EXCEPT_ADDR_FUNC(void) 2522 { 2523 return 0x80b0000000d0ll; 2524 } 2525 2526 #define typedef_ODY_EHSM_BIU_HST_EXCEPT_ADDR ody_ehsm_biu_hst_except_addr_t 2527 #define bustype_ODY_EHSM_BIU_HST_EXCEPT_ADDR CSR_TYPE_NCB32b 2528 #define basename_ODY_EHSM_BIU_HST_EXCEPT_ADDR "EHSM_BIU_HST_EXCEPT_ADDR" 2529 #define device_bar_ODY_EHSM_BIU_HST_EXCEPT_ADDR 0x0 /* PF_BAR0 */ 2530 #define busnum_ODY_EHSM_BIU_HST_EXCEPT_ADDR 0 2531 #define arguments_ODY_EHSM_BIU_HST_EXCEPT_ADDR -1, -1, -1, -1 2532 2533 /** 2534 * Register (NCB32b) ehsm_biu_hst_trust 2535 * 2536 * EHSM Biu Hst Trust Register 2537 */ 2538 union ody_ehsm_biu_hst_trust { 2539 uint32_t u; 2540 struct ody_ehsm_biu_hst_trust_s { 2541 uint32_t hst_trust : 32; 2542 } s; 2543 /* struct ody_ehsm_biu_hst_trust_s cn; */ 2544 }; 2545 typedef union ody_ehsm_biu_hst_trust ody_ehsm_biu_hst_trust_t; 2546 2547 #define ODY_EHSM_BIU_HST_TRUST ODY_EHSM_BIU_HST_TRUST_FUNC() 2548 static inline uint64_t ODY_EHSM_BIU_HST_TRUST_FUNC(void) __attribute__ ((pure, always_inline)); 2549 static inline uint64_t ODY_EHSM_BIU_HST_TRUST_FUNC(void) 2550 { 2551 return 0x80b0000000d4ll; 2552 } 2553 2554 #define typedef_ODY_EHSM_BIU_HST_TRUST ody_ehsm_biu_hst_trust_t 2555 #define bustype_ODY_EHSM_BIU_HST_TRUST CSR_TYPE_NCB32b 2556 #define basename_ODY_EHSM_BIU_HST_TRUST "EHSM_BIU_HST_TRUST" 2557 #define device_bar_ODY_EHSM_BIU_HST_TRUST 0x0 /* PF_BAR0 */ 2558 #define busnum_ODY_EHSM_BIU_HST_TRUST 0 2559 #define arguments_ODY_EHSM_BIU_HST_TRUST -1, -1, -1, -1 2560 2561 /** 2562 * Register (NCB32b) ehsm_biu_key_revoc_status 2563 * 2564 * EHSM Biu Key Revoc Status Register 2565 * This is for EHSM-78 2566 */ 2567 union ody_ehsm_biu_key_revoc_status { 2568 uint32_t u; 2569 struct ody_ehsm_biu_key_revoc_status_s { 2570 uint32_t key_manifest_version_control : 16; 2571 uint32_t key_revocation_control : 3; 2572 uint32_t reserved_19_31 : 13; 2573 } s; 2574 /* struct ody_ehsm_biu_key_revoc_status_s cn; */ 2575 }; 2576 typedef union ody_ehsm_biu_key_revoc_status ody_ehsm_biu_key_revoc_status_t; 2577 2578 #define ODY_EHSM_BIU_KEY_REVOC_STATUS ODY_EHSM_BIU_KEY_REVOC_STATUS_FUNC() 2579 static inline uint64_t ODY_EHSM_BIU_KEY_REVOC_STATUS_FUNC(void) __attribute__ ((pure, always_inline)); 2580 static inline uint64_t ODY_EHSM_BIU_KEY_REVOC_STATUS_FUNC(void) 2581 { 2582 return 0x80b000000120ll; 2583 } 2584 2585 #define typedef_ODY_EHSM_BIU_KEY_REVOC_STATUS ody_ehsm_biu_key_revoc_status_t 2586 #define bustype_ODY_EHSM_BIU_KEY_REVOC_STATUS CSR_TYPE_NCB32b 2587 #define basename_ODY_EHSM_BIU_KEY_REVOC_STATUS "EHSM_BIU_KEY_REVOC_STATUS" 2588 #define device_bar_ODY_EHSM_BIU_KEY_REVOC_STATUS 0x0 /* PF_BAR0 */ 2589 #define busnum_ODY_EHSM_BIU_KEY_REVOC_STATUS 0 2590 #define arguments_ODY_EHSM_BIU_KEY_REVOC_STATUS -1, -1, -1, -1 2591 2592 /** 2593 * Register (NCB32b) ehsm_biu_lcs_debug_port_status 2594 * 2595 * EHSM Biu Lcs Debug Port Status Register 2596 * This is for EHSM-78 2597 */ 2598 union ody_ehsm_biu_lcs_debug_port_status { 2599 uint32_t u; 2600 struct ody_ehsm_biu_lcs_debug_port_status_s { 2601 uint32_t life_cycle_state : 4; 2602 uint32_t permnt_disable_ehsm_debug : 1; 2603 uint32_t permnt_disable_jtag_debug : 1; 2604 uint32_t permnt_disable_mcp_jtag : 1; 2605 uint32_t permnt_disable_ap_dbgen : 1; 2606 uint32_t permnt_disable_ap_niden : 1; 2607 uint32_t permnt_disable_ap_spiden : 1; 2608 uint32_t permnt_disable_ap_spniden : 1; 2609 uint32_t permnt_disable_ap_spare0 : 1; 2610 uint32_t permnt_disable_ap_spare1 : 1; 2611 uint32_t final_disable_ehsm_debug : 1; 2612 uint32_t final_disable_jtag_debug : 1; 2613 uint32_t final_disable_mcp_debug : 1; 2614 uint32_t final_disable_ap_dbgen_debug : 1; 2615 uint32_t final_disable_ap_niden_debug : 1; 2616 uint32_t final_disable_ap_spiden_debug : 1; 2617 uint32_t final_disable_ap_spniden_debug : 1; 2618 uint32_t final_disable_spare0_debug : 1; 2619 uint32_t final_disable_spare1_debug : 1; 2620 uint32_t remaining_enable_disable_spare0 : 4; 2621 uint32_t remaining_enable_disable_spare1 : 4; 2622 uint32_t reserved_30_31 : 2; 2623 } s; 2624 /* struct ody_ehsm_biu_lcs_debug_port_status_s cn; */ 2625 }; 2626 typedef union ody_ehsm_biu_lcs_debug_port_status ody_ehsm_biu_lcs_debug_port_status_t; 2627 2628 #define ODY_EHSM_BIU_LCS_DEBUG_PORT_STATUS ODY_EHSM_BIU_LCS_DEBUG_PORT_STATUS_FUNC() 2629 static inline uint64_t ODY_EHSM_BIU_LCS_DEBUG_PORT_STATUS_FUNC(void) __attribute__ ((pure, always_inline)); 2630 static inline uint64_t ODY_EHSM_BIU_LCS_DEBUG_PORT_STATUS_FUNC(void) 2631 { 2632 return 0x80b000000114ll; 2633 } 2634 2635 #define typedef_ODY_EHSM_BIU_LCS_DEBUG_PORT_STATUS ody_ehsm_biu_lcs_debug_port_status_t 2636 #define bustype_ODY_EHSM_BIU_LCS_DEBUG_PORT_STATUS CSR_TYPE_NCB32b 2637 #define basename_ODY_EHSM_BIU_LCS_DEBUG_PORT_STATUS "EHSM_BIU_LCS_DEBUG_PORT_STATUS" 2638 #define device_bar_ODY_EHSM_BIU_LCS_DEBUG_PORT_STATUS 0x0 /* PF_BAR0 */ 2639 #define busnum_ODY_EHSM_BIU_LCS_DEBUG_PORT_STATUS 0 2640 #define arguments_ODY_EHSM_BIU_LCS_DEBUG_PORT_STATUS -1, -1, -1, -1 2641 2642 /** 2643 * Register (NCB32b) ehsm_biu_remaining_config_status 2644 * 2645 * EHSM Biu Remaining Config Status Register 2646 * This is for EHSM-78 2647 */ 2648 union ody_ehsm_biu_remaining_config_status { 2649 uint32_t u; 2650 struct ody_ehsm_biu_remaining_config_status_s { 2651 uint32_t remain_enable_disable_ehsm_debug : 4; 2652 uint32_t remain_enable_disable_debug_jtag : 4; 2653 uint32_t remain_enable_disable_mcp_jtag : 4; 2654 uint32_t remain_enable_disable_ap_dbgen : 4; 2655 uint32_t remain_enable_disable_ap_niden : 4; 2656 uint32_t remain_enable_disable_ap_spiden : 4; 2657 uint32_t remain_enable_disable_ap_spniden : 4; 2658 uint32_t reserved_28_31 : 4; 2659 } s; 2660 /* struct ody_ehsm_biu_remaining_config_status_s cn; */ 2661 }; 2662 typedef union ody_ehsm_biu_remaining_config_status ody_ehsm_biu_remaining_config_status_t; 2663 2664 #define ODY_EHSM_BIU_REMAINING_CONFIG_STATUS ODY_EHSM_BIU_REMAINING_CONFIG_STATUS_FUNC() 2665 static inline uint64_t ODY_EHSM_BIU_REMAINING_CONFIG_STATUS_FUNC(void) __attribute__ ((pure, always_inline)); 2666 static inline uint64_t ODY_EHSM_BIU_REMAINING_CONFIG_STATUS_FUNC(void) 2667 { 2668 return 0x80b00000012cll; 2669 } 2670 2671 #define typedef_ODY_EHSM_BIU_REMAINING_CONFIG_STATUS ody_ehsm_biu_remaining_config_status_t 2672 #define bustype_ODY_EHSM_BIU_REMAINING_CONFIG_STATUS CSR_TYPE_NCB32b 2673 #define basename_ODY_EHSM_BIU_REMAINING_CONFIG_STATUS "EHSM_BIU_REMAINING_CONFIG_STATUS" 2674 #define device_bar_ODY_EHSM_BIU_REMAINING_CONFIG_STATUS 0x0 /* PF_BAR0 */ 2675 #define busnum_ODY_EHSM_BIU_REMAINING_CONFIG_STATUS 0 2676 #define arguments_ODY_EHSM_BIU_REMAINING_CONFIG_STATUS -1, -1, -1, -1 2677 2678 /** 2679 * Register (NCB32b) ehsm_biu_root_of_trust_status 2680 * 2681 * EHSM Biu Root Of Trust Status Register 2682 * This is for EHSM-78 2683 */ 2684 union ody_ehsm_biu_root_of_trust_status { 2685 uint32_t u; 2686 struct ody_ehsm_biu_root_of_trust_status_s { 2687 uint32_t disable_ecp : 1; 2688 uint32_t fips_mode : 1; 2689 uint32_t l0_fw_aes_key_read_disable : 1; 2690 uint32_t uds_read_disable : 1; 2691 uint32_t rkek_read_disable : 1; 2692 uint32_t rkek_lock : 1; 2693 uint32_t uuid_lock : 1; 2694 uint32_t enable_puf : 1; 2695 uint32_t disable_ehsm_self_test : 1; 2696 uint32_t disable_ehsm_crypto : 1; 2697 uint32_t auth_cmd_mode : 1; 2698 uint32_t kak0_binding_digest_provisioned : 1; 2699 uint32_t kak1_binding_digest_provisioned : 1; 2700 uint32_t kak2_binding_digest_provisioned : 1; 2701 uint32_t kak3_binding_digest_provisioned : 1; 2702 uint32_t l0_fw_aes_key0_provisioned : 1; 2703 uint32_t l0_fw_aes_key1_provisioned : 1; 2704 uint32_t l0_fw_aes_key2_provisioned : 1; 2705 uint32_t l0_fw_aes_key3_provisioned : 1; 2706 uint32_t uds_provisioned : 1; 2707 uint32_t rkek_provisioned : 1; 2708 uint32_t reserved_21_23 : 3; 2709 uint32_t ehsm_panic_state : 1; 2710 uint32_t ebg_start_up_health_test_fail : 1; 2711 uint32_t ebg_start_up_health_test_done : 1; 2712 uint32_t ebg_continuous_health_test_fail : 1; 2713 uint32_t reserved_28_31 : 4; 2714 } s; 2715 /* struct ody_ehsm_biu_root_of_trust_status_s cn; */ 2716 }; 2717 typedef union ody_ehsm_biu_root_of_trust_status ody_ehsm_biu_root_of_trust_status_t; 2718 2719 #define ODY_EHSM_BIU_ROOT_OF_TRUST_STATUS ODY_EHSM_BIU_ROOT_OF_TRUST_STATUS_FUNC() 2720 static inline uint64_t ODY_EHSM_BIU_ROOT_OF_TRUST_STATUS_FUNC(void) __attribute__ ((pure, always_inline)); 2721 static inline uint64_t ODY_EHSM_BIU_ROOT_OF_TRUST_STATUS_FUNC(void) 2722 { 2723 return 0x80b00000011cll; 2724 } 2725 2726 #define typedef_ODY_EHSM_BIU_ROOT_OF_TRUST_STATUS ody_ehsm_biu_root_of_trust_status_t 2727 #define bustype_ODY_EHSM_BIU_ROOT_OF_TRUST_STATUS CSR_TYPE_NCB32b 2728 #define basename_ODY_EHSM_BIU_ROOT_OF_TRUST_STATUS "EHSM_BIU_ROOT_OF_TRUST_STATUS" 2729 #define device_bar_ODY_EHSM_BIU_ROOT_OF_TRUST_STATUS 0x0 /* PF_BAR0 */ 2730 #define busnum_ODY_EHSM_BIU_ROOT_OF_TRUST_STATUS 0 2731 #define arguments_ODY_EHSM_BIU_ROOT_OF_TRUST_STATUS -1, -1, -1, -1 2732 2733 /** 2734 * Register (NCB32b) ehsm_biu_shadow_reg_status 2735 * 2736 * EHSM Biu Shadow Reg Status Register 2737 */ 2738 union ody_ehsm_biu_shadow_reg_status { 2739 uint32_t u; 2740 struct ody_ehsm_biu_shadow_reg_status_s { 2741 uint32_t lcs_phase1_valid : 1; 2742 uint32_t lcs_all_valid : 1; 2743 uint32_t cm3_sleeping : 1; 2744 uint32_t cm3_sleepdeep : 1; 2745 uint32_t cm3_sram_sd : 1; 2746 uint32_t vdd_gate : 1; 2747 uint32_t clk_gate : 1; 2748 uint32_t cm3_rom_fail : 1; 2749 uint32_t cm3_ram_fail : 1; 2750 uint32_t spad_mem_fail : 1; 2751 uint32_t reserved_10 : 1; 2752 uint32_t dormant_enable : 1; 2753 uint32_t dormant_activation_status : 1; 2754 uint32_t puf_key_aging_test_done : 1; 2755 uint32_t puf_key_aging_test_error : 1; 2756 uint32_t puf_key_aging_test_unavailable : 1; 2757 uint32_t puf_sysrdyp_timeout : 1; 2758 uint32_t puf_sysrdyp_fall : 1; 2759 uint32_t otp_sysrdyp_timeout : 1; 2760 uint32_t otp_sysrdyp_fall : 1; 2761 uint32_t reserved_20_31 : 12; 2762 } s; 2763 /* struct ody_ehsm_biu_shadow_reg_status_s cn; */ 2764 }; 2765 typedef union ody_ehsm_biu_shadow_reg_status ody_ehsm_biu_shadow_reg_status_t; 2766 2767 #define ODY_EHSM_BIU_SHADOW_REG_STATUS ODY_EHSM_BIU_SHADOW_REG_STATUS_FUNC() 2768 static inline uint64_t ODY_EHSM_BIU_SHADOW_REG_STATUS_FUNC(void) __attribute__ ((pure, always_inline)); 2769 static inline uint64_t ODY_EHSM_BIU_SHADOW_REG_STATUS_FUNC(void) 2770 { 2771 return 0x80b000000100ll; 2772 } 2773 2774 #define typedef_ODY_EHSM_BIU_SHADOW_REG_STATUS ody_ehsm_biu_shadow_reg_status_t 2775 #define bustype_ODY_EHSM_BIU_SHADOW_REG_STATUS CSR_TYPE_NCB32b 2776 #define basename_ODY_EHSM_BIU_SHADOW_REG_STATUS "EHSM_BIU_SHADOW_REG_STATUS" 2777 #define device_bar_ODY_EHSM_BIU_SHADOW_REG_STATUS 0x0 /* PF_BAR0 */ 2778 #define busnum_ODY_EHSM_BIU_SHADOW_REG_STATUS 0 2779 #define arguments_ODY_EHSM_BIU_SHADOW_REG_STATUS -1, -1, -1, -1 2780 2781 /** 2782 * Register (NCB32b) ehsm_biu_uuid_0 2783 * 2784 * EHSM Biu Uuid 0 Register 2785 * This register saves bit 31~0 of UUID. 2786 * This is for EHSM-32. 2787 */ 2788 union ody_ehsm_biu_uuid_0 { 2789 uint32_t u; 2790 struct ody_ehsm_biu_uuid_0_s { 2791 uint32_t uuid_0 : 32; 2792 } s; 2793 /* struct ody_ehsm_biu_uuid_0_s cn; */ 2794 }; 2795 typedef union ody_ehsm_biu_uuid_0 ody_ehsm_biu_uuid_0_t; 2796 2797 #define ODY_EHSM_BIU_UUID_0 ODY_EHSM_BIU_UUID_0_FUNC() 2798 static inline uint64_t ODY_EHSM_BIU_UUID_0_FUNC(void) __attribute__ ((pure, always_inline)); 2799 static inline uint64_t ODY_EHSM_BIU_UUID_0_FUNC(void) 2800 { 2801 return 0x80b000000104ll; 2802 } 2803 2804 #define typedef_ODY_EHSM_BIU_UUID_0 ody_ehsm_biu_uuid_0_t 2805 #define bustype_ODY_EHSM_BIU_UUID_0 CSR_TYPE_NCB32b 2806 #define basename_ODY_EHSM_BIU_UUID_0 "EHSM_BIU_UUID_0" 2807 #define device_bar_ODY_EHSM_BIU_UUID_0 0x0 /* PF_BAR0 */ 2808 #define busnum_ODY_EHSM_BIU_UUID_0 0 2809 #define arguments_ODY_EHSM_BIU_UUID_0 -1, -1, -1, -1 2810 2811 /** 2812 * Register (NCB32b) ehsm_biu_uuid_1 2813 * 2814 * EHSM Biu Uuid 1 Register 2815 * This register saves bit 63~32 of UUID. 2816 * This is for EHSM-32. 2817 */ 2818 union ody_ehsm_biu_uuid_1 { 2819 uint32_t u; 2820 struct ody_ehsm_biu_uuid_1_s { 2821 uint32_t uuid_1 : 32; 2822 } s; 2823 /* struct ody_ehsm_biu_uuid_1_s cn; */ 2824 }; 2825 typedef union ody_ehsm_biu_uuid_1 ody_ehsm_biu_uuid_1_t; 2826 2827 #define ODY_EHSM_BIU_UUID_1 ODY_EHSM_BIU_UUID_1_FUNC() 2828 static inline uint64_t ODY_EHSM_BIU_UUID_1_FUNC(void) __attribute__ ((pure, always_inline)); 2829 static inline uint64_t ODY_EHSM_BIU_UUID_1_FUNC(void) 2830 { 2831 return 0x80b000000108ll; 2832 } 2833 2834 #define typedef_ODY_EHSM_BIU_UUID_1 ody_ehsm_biu_uuid_1_t 2835 #define bustype_ODY_EHSM_BIU_UUID_1 CSR_TYPE_NCB32b 2836 #define basename_ODY_EHSM_BIU_UUID_1 "EHSM_BIU_UUID_1" 2837 #define device_bar_ODY_EHSM_BIU_UUID_1 0x0 /* PF_BAR0 */ 2838 #define busnum_ODY_EHSM_BIU_UUID_1 0 2839 #define arguments_ODY_EHSM_BIU_UUID_1 -1, -1, -1, -1 2840 2841 /** 2842 * Register (NCB32b) ehsm_biu_uuid_2 2843 * 2844 * EHSM Biu Uuid 2 Register 2845 * This register saves bit 95~64 of UUID. 2846 * This is for EHSM-32. 2847 */ 2848 union ody_ehsm_biu_uuid_2 { 2849 uint32_t u; 2850 struct ody_ehsm_biu_uuid_2_s { 2851 uint32_t uuid_2 : 32; 2852 } s; 2853 /* struct ody_ehsm_biu_uuid_2_s cn; */ 2854 }; 2855 typedef union ody_ehsm_biu_uuid_2 ody_ehsm_biu_uuid_2_t; 2856 2857 #define ODY_EHSM_BIU_UUID_2 ODY_EHSM_BIU_UUID_2_FUNC() 2858 static inline uint64_t ODY_EHSM_BIU_UUID_2_FUNC(void) __attribute__ ((pure, always_inline)); 2859 static inline uint64_t ODY_EHSM_BIU_UUID_2_FUNC(void) 2860 { 2861 return 0x80b00000010cll; 2862 } 2863 2864 #define typedef_ODY_EHSM_BIU_UUID_2 ody_ehsm_biu_uuid_2_t 2865 #define bustype_ODY_EHSM_BIU_UUID_2 CSR_TYPE_NCB32b 2866 #define basename_ODY_EHSM_BIU_UUID_2 "EHSM_BIU_UUID_2" 2867 #define device_bar_ODY_EHSM_BIU_UUID_2 0x0 /* PF_BAR0 */ 2868 #define busnum_ODY_EHSM_BIU_UUID_2 0 2869 #define arguments_ODY_EHSM_BIU_UUID_2 -1, -1, -1, -1 2870 2871 /** 2872 * Register (NCB32b) ehsm_biu_uuid_status 2873 * 2874 * EHSM Biu Uuid Status Register 2875 * This register saves the status of UUID. 2876 * This is for EHSM-32 2877 */ 2878 union ody_ehsm_biu_uuid_status { 2879 uint32_t u; 2880 struct ody_ehsm_biu_uuid_status_s { 2881 uint32_t correction_done : 1; 2882 uint32_t uncorrectable_error : 1; 2883 uint32_t no_correction : 1; 2884 uint32_t reserved_3_31 : 29; 2885 } s; 2886 /* struct ody_ehsm_biu_uuid_status_s cn; */ 2887 }; 2888 typedef union ody_ehsm_biu_uuid_status ody_ehsm_biu_uuid_status_t; 2889 2890 #define ODY_EHSM_BIU_UUID_STATUS ODY_EHSM_BIU_UUID_STATUS_FUNC() 2891 static inline uint64_t ODY_EHSM_BIU_UUID_STATUS_FUNC(void) __attribute__ ((pure, always_inline)); 2892 static inline uint64_t ODY_EHSM_BIU_UUID_STATUS_FUNC(void) 2893 { 2894 return 0x80b0000000fcll; 2895 } 2896 2897 #define typedef_ODY_EHSM_BIU_UUID_STATUS ody_ehsm_biu_uuid_status_t 2898 #define bustype_ODY_EHSM_BIU_UUID_STATUS CSR_TYPE_NCB32b 2899 #define basename_ODY_EHSM_BIU_UUID_STATUS "EHSM_BIU_UUID_STATUS" 2900 #define device_bar_ODY_EHSM_BIU_UUID_STATUS 0x0 /* PF_BAR0 */ 2901 #define busnum_ODY_EHSM_BIU_UUID_STATUS 0 2902 #define arguments_ODY_EHSM_BIU_UUID_STATUS -1, -1, -1, -1 2903 2904 /** 2905 * Register (NCB32b) ehsm_side_sensor_status 2906 * 2907 * EHSM CPC Side Sensor Status Register 2908 */ 2909 union ody_ehsm_side_sensor_status { 2910 uint32_t u; 2911 struct ody_ehsm_side_sensor_status_s { 2912 uint32_t sensors : 6; 2913 uint32_t reserved_6_7 : 2; 2914 uint32_t sensors_pre_qualifier : 6; 2915 uint32_t reserved_14_15 : 2; 2916 uint32_t sensors_enable_fuse : 7; 2917 uint32_t reserved_23 : 1; 2918 uint32_t sticky_status : 4; 2919 uint32_t reserved_28_31 : 4; 2920 } s; 2921 /* struct ody_ehsm_side_sensor_status_s cn; */ 2922 }; 2923 typedef union ody_ehsm_side_sensor_status ody_ehsm_side_sensor_status_t; 2924 2925 #define ODY_EHSM_SIDE_SENSOR_STATUS ODY_EHSM_SIDE_SENSOR_STATUS_FUNC() 2926 static inline uint64_t ODY_EHSM_SIDE_SENSOR_STATUS_FUNC(void) __attribute__ ((pure, always_inline)); 2927 static inline uint64_t ODY_EHSM_SIDE_SENSOR_STATUS_FUNC(void) 2928 { 2929 return 0x80b000004028ll; 2930 } 2931 2932 #define typedef_ODY_EHSM_SIDE_SENSOR_STATUS ody_ehsm_side_sensor_status_t 2933 #define bustype_ODY_EHSM_SIDE_SENSOR_STATUS CSR_TYPE_NCB32b 2934 #define basename_ODY_EHSM_SIDE_SENSOR_STATUS "EHSM_SIDE_SENSOR_STATUS" 2935 #define device_bar_ODY_EHSM_SIDE_SENSOR_STATUS 0x0 /* PF_BAR0 */ 2936 #define busnum_ODY_EHSM_SIDE_SENSOR_STATUS 0 2937 #define arguments_ODY_EHSM_SIDE_SENSOR_STATUS -1, -1, -1, -1 2938 2939 /** 2940 * Register (NCB32b) ehsm_sw_sensor 2941 * 2942 * EHSM CPC Software Sensor Register 2943 */ 2944 union ody_ehsm_sw_sensor { 2945 uint32_t u; 2946 struct ody_ehsm_sw_sensor_s { 2947 uint32_t sw_sense : 1; 2948 uint32_t reserved_1_31 : 31; 2949 } s; 2950 /* struct ody_ehsm_sw_sensor_s cn; */ 2951 }; 2952 typedef union ody_ehsm_sw_sensor ody_ehsm_sw_sensor_t; 2953 2954 #define ODY_EHSM_SW_SENSOR ODY_EHSM_SW_SENSOR_FUNC() 2955 static inline uint64_t ODY_EHSM_SW_SENSOR_FUNC(void) __attribute__ ((pure, always_inline)); 2956 static inline uint64_t ODY_EHSM_SW_SENSOR_FUNC(void) 2957 { 2958 return 0x80b000004020ll; 2959 } 2960 2961 #define typedef_ODY_EHSM_SW_SENSOR ody_ehsm_sw_sensor_t 2962 #define bustype_ODY_EHSM_SW_SENSOR CSR_TYPE_NCB32b 2963 #define basename_ODY_EHSM_SW_SENSOR "EHSM_SW_SENSOR" 2964 #define device_bar_ODY_EHSM_SW_SENSOR 0x0 /* PF_BAR0 */ 2965 #define busnum_ODY_EHSM_SW_SENSOR 0 2966 #define arguments_ODY_EHSM_SW_SENSOR -1, -1, -1, -1 2967 2968 #endif /* __ODY_CSRS_EHSM_H__ */ 2969