1*d72c486bSLucian Paul-Trifu /* 2*d72c486bSLucian Paul-Trifu * Copyright (c) 2022, Arm Limited. All rights reserved. 3*d72c486bSLucian Paul-Trifu * 4*d72c486bSLucian Paul-Trifu * SPDX-License-Identifier: BSD-3-Clause 5*d72c486bSLucian Paul-Trifu */ 6*d72c486bSLucian Paul-Trifu 7*d72c486bSLucian Paul-Trifu #ifndef PLAT_DRTM_H 8*d72c486bSLucian Paul-Trifu #define PLAT_DRTM_H 9*d72c486bSLucian Paul-Trifu 10*d72c486bSLucian Paul-Trifu /* platform-specific DMA protection functions */ 11*d72c486bSLucian Paul-Trifu bool plat_has_non_host_platforms(void); 12*d72c486bSLucian Paul-Trifu bool plat_has_unmanaged_dma_peripherals(void); 13*d72c486bSLucian Paul-Trifu unsigned int plat_get_total_smmus(void); 14*d72c486bSLucian Paul-Trifu void plat_enumerate_smmus(const uintptr_t **smmus_out, 15*d72c486bSLucian Paul-Trifu size_t *smmu_count_out); 16*d72c486bSLucian Paul-Trifu 17*d72c486bSLucian Paul-Trifu #endif /* PLAT_DRTM_H */ 18