1 /* 2 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef __CSS_PM_H__ 8 #define __CSS_PM_H__ 9 10 #include <cdefs.h> 11 #include <psci.h> 12 #include <types.h> 13 14 /* System power domain at level 2, as currently implemented by CSS platforms */ 15 #define CSS_SYSTEM_PWR_DMN_LVL ARM_PWR_LVL2 16 17 /* Macros to read the CSS power domain state */ 18 #define CSS_CORE_PWR_STATE(state) (state)->pwr_domain_state[ARM_PWR_LVL0] 19 #define CSS_CLUSTER_PWR_STATE(state) (state)->pwr_domain_state[ARM_PWR_LVL1] 20 21 static inline unsigned int css_system_pwr_state(const psci_power_state_t *state) 22 { 23 #if (PLAT_MAX_PWR_LVL == CSS_SYSTEM_PWR_DMN_LVL) 24 return state->pwr_domain_state[CSS_SYSTEM_PWR_DMN_LVL]; 25 #else 26 return 0; 27 #endif 28 } 29 30 int css_pwr_domain_on(u_register_t mpidr); 31 void css_pwr_domain_on_finish(const psci_power_state_t *target_state); 32 void css_pwr_domain_off(const psci_power_state_t *target_state); 33 void css_pwr_domain_suspend(const psci_power_state_t *target_state); 34 void css_pwr_domain_suspend_finish( 35 const psci_power_state_t *target_state); 36 void __dead2 css_system_off(void); 37 void __dead2 css_system_reset(void); 38 void css_cpu_standby(plat_local_state_t cpu_state); 39 void css_get_sys_suspend_power_state(psci_power_state_t *req_state); 40 int css_node_hw_state(u_register_t mpidr, unsigned int power_level); 41 42 /* 43 * This mapping array has to be exported by the platform. Each element at 44 * a given index maps that core to an SCMI power domain. 45 */ 46 extern const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[]; 47 48 #endif /* __CSS_PM_H__ */ 49