1 /* 2 * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 #ifndef __PLAT_ARM_H__ 31 #define __PLAT_ARM_H__ 32 33 #include <bakery_lock.h> 34 #include <bl_common.h> 35 #include <cassert.h> 36 #include <cpu_data.h> 37 #include <stdint.h> 38 39 40 /* 41 * Extern declarations common to ARM standard platforms 42 */ 43 extern const mmap_region_t plat_arm_mmap[]; 44 45 #define ARM_CASSERT_MMAP \ 46 CASSERT((ARRAY_SIZE(plat_arm_mmap) + ARM_BL_REGIONS) \ 47 <= MAX_MMAP_REGIONS, \ 48 assert_max_mmap_regions); 49 50 /* 51 * Utility functions common to ARM standard platforms 52 */ 53 54 void arm_configure_mmu_el1(unsigned long total_base, 55 unsigned long total_size, 56 unsigned long ro_start, 57 unsigned long ro_limit 58 #if USE_COHERENT_MEM 59 , unsigned long coh_start, 60 unsigned long coh_limit 61 #endif 62 ); 63 void arm_configure_mmu_el3(unsigned long total_base, 64 unsigned long total_size, 65 unsigned long ro_start, 66 unsigned long ro_limit 67 #if USE_COHERENT_MEM 68 , unsigned long coh_start, 69 unsigned long coh_limit 70 #endif 71 ); 72 73 #if IMAGE_BL31 74 /* 75 * Use this macro to instantiate lock before it is used in below 76 * arm_lock_xxx() macros 77 */ 78 #define ARM_INSTANTIATE_LOCK DEFINE_BAKERY_LOCK(arm_lock); 79 80 /* 81 * These are wrapper macros to the Coherent Memory Bakery Lock API. 82 */ 83 #define arm_lock_init() bakery_lock_init(&arm_lock) 84 #define arm_lock_get() bakery_lock_get(&arm_lock) 85 #define arm_lock_release() bakery_lock_release(&arm_lock) 86 87 #else 88 89 /* 90 * Empty macros for all other BL stages other than BL3-1 91 */ 92 #define ARM_INSTANTIATE_LOCK 93 #define arm_lock_init() 94 #define arm_lock_get() 95 #define arm_lock_release() 96 97 #endif /* IMAGE_BL31 */ 98 99 #if ARM_RECOM_STATE_ID_ENC 100 /* 101 * Macros used to parse state information from State-ID if it is using the 102 * recommended encoding for State-ID. 103 */ 104 #define ARM_LOCAL_PSTATE_WIDTH 4 105 #define ARM_LOCAL_PSTATE_MASK ((1 << ARM_LOCAL_PSTATE_WIDTH) - 1) 106 107 /* Macros to construct the composite power state */ 108 109 /* Make composite power state parameter till power level 0 */ 110 #if PSCI_EXTENDED_STATE_ID 111 112 #define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ 113 (((lvl0_state) << PSTATE_ID_SHIFT) | ((type) << PSTATE_TYPE_SHIFT)) 114 #else 115 #define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ 116 (((lvl0_state) << PSTATE_ID_SHIFT) | \ 117 ((pwr_lvl) << PSTATE_PWR_LVL_SHIFT) | \ 118 ((type) << PSTATE_TYPE_SHIFT)) 119 #endif /* __PSCI_EXTENDED_STATE_ID__ */ 120 121 /* Make composite power state parameter till power level 1 */ 122 #define arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \ 123 (((lvl1_state) << ARM_LOCAL_PSTATE_WIDTH) | \ 124 arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type)) 125 126 #endif /* __ARM_RECOM_STATE_ID_ENC__ */ 127 128 129 /* CCI utility functions */ 130 void arm_cci_init(void); 131 132 /* IO storage utility functions */ 133 void arm_io_setup(void); 134 135 /* Security utility functions */ 136 void arm_tzc_setup(void); 137 138 /* PM utility functions */ 139 int arm_validate_power_state(unsigned int power_state, 140 psci_power_state_t *req_state); 141 int arm_validate_ns_entrypoint(uintptr_t entrypoint); 142 143 /* Topology utility function */ 144 int arm_check_mpidr(u_register_t mpidr); 145 146 /* BL1 utility functions */ 147 void arm_bl1_early_platform_setup(void); 148 void arm_bl1_platform_setup(void); 149 void arm_bl1_plat_arch_setup(void); 150 151 /* BL2 utility functions */ 152 void arm_bl2_early_platform_setup(meminfo_t *mem_layout); 153 void arm_bl2_platform_setup(void); 154 void arm_bl2_plat_arch_setup(void); 155 uint32_t arm_get_spsr_for_bl32_entry(void); 156 uint32_t arm_get_spsr_for_bl33_entry(void); 157 158 /* BL3-1 utility functions */ 159 void arm_bl31_early_platform_setup(bl31_params_t *from_bl2, 160 void *plat_params_from_bl2); 161 void arm_bl31_platform_setup(void); 162 void arm_bl31_plat_arch_setup(void); 163 164 /* TSP utility functions */ 165 void arm_tsp_early_platform_setup(void); 166 167 168 /* 169 * Mandatory functions required in ARM standard platforms 170 */ 171 void plat_arm_gic_init(void); 172 void plat_arm_security_setup(void); 173 void plat_arm_pwrc_setup(void); 174 175 /* 176 * Optional functions required in ARM standard platforms 177 */ 178 void plat_arm_io_setup(void); 179 int plat_arm_get_alt_image_source( 180 unsigned int image_id, 181 uintptr_t *dev_handle, 182 uintptr_t *image_spec); 183 unsigned int plat_arm_calc_core_pos(u_register_t mpidr); 184 185 186 #endif /* __PLAT_ARM_H__ */ 187