1 /* 2 * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 #ifndef __PLAT_ARM_H__ 31 #define __PLAT_ARM_H__ 32 33 #include <arm_xlat_tables.h> 34 #include <bakery_lock.h> 35 #include <cassert.h> 36 #include <cpu_data.h> 37 #include <stdint.h> 38 #include <utils_def.h> 39 40 /******************************************************************************* 41 * Forward declarations 42 ******************************************************************************/ 43 struct bl31_params; 44 struct meminfo; 45 struct image_info; 46 47 #define ARM_CASSERT_MMAP \ 48 CASSERT((ARRAY_SIZE(plat_arm_mmap) + ARM_BL_REGIONS) \ 49 <= MAX_MMAP_REGIONS, \ 50 assert_max_mmap_regions); 51 52 /* 53 * Utility functions common to ARM standard platforms 54 */ 55 void arm_setup_page_tables(uintptr_t total_base, 56 size_t total_size, 57 uintptr_t code_start, 58 uintptr_t code_limit, 59 uintptr_t rodata_start, 60 uintptr_t rodata_limit 61 #if USE_COHERENT_MEM 62 , uintptr_t coh_start, 63 uintptr_t coh_limit 64 #endif 65 ); 66 67 #if defined(IMAGE_BL31) || (defined(AARCH32) && defined(IMAGE_BL32)) 68 /* 69 * Use this macro to instantiate lock before it is used in below 70 * arm_lock_xxx() macros 71 */ 72 #define ARM_INSTANTIATE_LOCK DEFINE_BAKERY_LOCK(arm_lock); 73 74 /* 75 * These are wrapper macros to the Coherent Memory Bakery Lock API. 76 */ 77 #define arm_lock_init() bakery_lock_init(&arm_lock) 78 #define arm_lock_get() bakery_lock_get(&arm_lock) 79 #define arm_lock_release() bakery_lock_release(&arm_lock) 80 81 #else 82 83 /* 84 * Empty macros for all other BL stages other than BL31 and BL32 85 */ 86 #define ARM_INSTANTIATE_LOCK 87 #define arm_lock_init() 88 #define arm_lock_get() 89 #define arm_lock_release() 90 91 #endif /* defined(IMAGE_BL31) || (defined(AARCH32) && defined(IMAGE_BL32)) */ 92 93 #if ARM_RECOM_STATE_ID_ENC 94 /* 95 * Macros used to parse state information from State-ID if it is using the 96 * recommended encoding for State-ID. 97 */ 98 #define ARM_LOCAL_PSTATE_WIDTH 4 99 #define ARM_LOCAL_PSTATE_MASK ((1 << ARM_LOCAL_PSTATE_WIDTH) - 1) 100 101 /* Macros to construct the composite power state */ 102 103 /* Make composite power state parameter till power level 0 */ 104 #if PSCI_EXTENDED_STATE_ID 105 106 #define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ 107 (((lvl0_state) << PSTATE_ID_SHIFT) | ((type) << PSTATE_TYPE_SHIFT)) 108 #else 109 #define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ 110 (((lvl0_state) << PSTATE_ID_SHIFT) | \ 111 ((pwr_lvl) << PSTATE_PWR_LVL_SHIFT) | \ 112 ((type) << PSTATE_TYPE_SHIFT)) 113 #endif /* __PSCI_EXTENDED_STATE_ID__ */ 114 115 /* Make composite power state parameter till power level 1 */ 116 #define arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \ 117 (((lvl1_state) << ARM_LOCAL_PSTATE_WIDTH) | \ 118 arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type)) 119 120 /* Make composite power state parameter till power level 2 */ 121 #define arm_make_pwrstate_lvl2(lvl2_state, lvl1_state, lvl0_state, pwr_lvl, type) \ 122 (((lvl2_state) << (ARM_LOCAL_PSTATE_WIDTH * 2)) | \ 123 arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type)) 124 125 #endif /* __ARM_RECOM_STATE_ID_ENC__ */ 126 127 /* ARM State switch error codes */ 128 #define STATE_SW_E_PARAM (-2) 129 #define STATE_SW_E_DENIED (-3) 130 131 /* IO storage utility functions */ 132 void arm_io_setup(void); 133 134 /* Security utility functions */ 135 void arm_tzc400_setup(void); 136 struct tzc_dmc500_driver_data; 137 void arm_tzc_dmc500_setup(struct tzc_dmc500_driver_data *plat_driver_data); 138 139 /* Systimer utility function */ 140 void arm_configure_sys_timer(void); 141 142 /* PM utility functions */ 143 int arm_validate_power_state(unsigned int power_state, 144 psci_power_state_t *req_state); 145 int arm_validate_ns_entrypoint(uintptr_t entrypoint); 146 void arm_system_pwr_domain_resume(void); 147 void arm_program_trusted_mailbox(uintptr_t address); 148 149 /* Topology utility function */ 150 int arm_check_mpidr(u_register_t mpidr); 151 152 /* BL1 utility functions */ 153 void arm_bl1_early_platform_setup(void); 154 void arm_bl1_platform_setup(void); 155 void arm_bl1_plat_arch_setup(void); 156 157 /* BL2 utility functions */ 158 void arm_bl2_early_platform_setup(struct meminfo *mem_layout); 159 void arm_bl2_platform_setup(void); 160 void arm_bl2_plat_arch_setup(void); 161 uint32_t arm_get_spsr_for_bl32_entry(void); 162 uint32_t arm_get_spsr_for_bl33_entry(void); 163 int arm_bl2_handle_post_image_load(unsigned int image_id); 164 165 /* BL2U utility functions */ 166 void arm_bl2u_early_platform_setup(struct meminfo *mem_layout, 167 void *plat_info); 168 void arm_bl2u_platform_setup(void); 169 void arm_bl2u_plat_arch_setup(void); 170 171 /* BL31 utility functions */ 172 #if LOAD_IMAGE_V2 173 void arm_bl31_early_platform_setup(void *from_bl2, 174 void *plat_params_from_bl2); 175 #else 176 void arm_bl31_early_platform_setup(struct bl31_params *from_bl2, 177 void *plat_params_from_bl2); 178 #endif /* LOAD_IMAGE_V2 */ 179 void arm_bl31_platform_setup(void); 180 void arm_bl31_plat_runtime_setup(void); 181 void arm_bl31_plat_arch_setup(void); 182 183 /* TSP utility functions */ 184 void arm_tsp_early_platform_setup(void); 185 186 /* SP_MIN utility functions */ 187 void arm_sp_min_early_platform_setup(void *from_bl2, 188 void *plat_params_from_bl2); 189 190 /* FIP TOC validity check */ 191 int arm_io_is_toc_valid(void); 192 193 /* 194 * Mandatory functions required in ARM standard platforms 195 */ 196 unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr); 197 void plat_arm_gic_driver_init(void); 198 void plat_arm_gic_init(void); 199 void plat_arm_gic_cpuif_enable(void); 200 void plat_arm_gic_cpuif_disable(void); 201 void plat_arm_gic_redistif_on(void); 202 void plat_arm_gic_redistif_off(void); 203 void plat_arm_gic_pcpu_init(void); 204 void plat_arm_security_setup(void); 205 void plat_arm_pwrc_setup(void); 206 void plat_arm_interconnect_init(void); 207 void plat_arm_interconnect_enter_coherency(void); 208 void plat_arm_interconnect_exit_coherency(void); 209 210 #if ARM_PLAT_MT 211 unsigned int plat_arm_get_cpu_pe_count(u_register_t mpidr); 212 #endif 213 214 #if LOAD_IMAGE_V2 215 /* 216 * This function is called after loading SCP_BL2 image and it is used to perform 217 * any platform-specific actions required to handle the SCP firmware. 218 */ 219 int plat_arm_bl2_handle_scp_bl2(struct image_info *scp_bl2_image_info); 220 #endif 221 222 /* 223 * Optional functions required in ARM standard platforms 224 */ 225 void plat_arm_io_setup(void); 226 int plat_arm_get_alt_image_source( 227 unsigned int image_id, 228 uintptr_t *dev_handle, 229 uintptr_t *image_spec); 230 unsigned int plat_arm_calc_core_pos(u_register_t mpidr); 231 const mmap_region_t *plat_arm_get_mmap(void); 232 233 /* Allow platform to override psci_pm_ops during runtime */ 234 const plat_psci_ops_t *plat_arm_psci_override_pm_ops(plat_psci_ops_t *ops); 235 236 /* Execution state switch in ARM platforms */ 237 int arm_execution_state_switch(unsigned int smc_fid, 238 uint32_t pc_hi, 239 uint32_t pc_lo, 240 uint32_t cookie_hi, 241 uint32_t cookie_lo, 242 void *handle); 243 244 #endif /* __PLAT_ARM_H__ */ 245