xref: /rk3399_ARM-atf/include/plat/arm/common/plat_arm.h (revision 9fb8af33c40f21becde99fc15db73b1f4d82059c)
1 /*
2  * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 #ifndef __PLAT_ARM_H__
7 #define __PLAT_ARM_H__
8 
9 #include <arm_xlat_tables.h>
10 #include <bakery_lock.h>
11 #include <cassert.h>
12 #include <cpu_data.h>
13 #include <stdint.h>
14 #include <utils_def.h>
15 
16 /*******************************************************************************
17  * Forward declarations
18  ******************************************************************************/
19 struct bl31_params;
20 struct meminfo;
21 struct image_info;
22 struct bl_params;
23 
24 #define ARM_CASSERT_MMAP						\
25 	CASSERT((ARRAY_SIZE(plat_arm_mmap) + ARM_BL_REGIONS)		\
26 		<= MAX_MMAP_REGIONS,					\
27 		assert_max_mmap_regions);
28 
29 /*
30  * Utility functions common to ARM standard platforms
31  */
32 void arm_setup_page_tables(uintptr_t total_base,
33 			size_t total_size,
34 			uintptr_t code_start,
35 			uintptr_t code_limit,
36 			uintptr_t rodata_start,
37 			uintptr_t rodata_limit
38 #if USE_COHERENT_MEM
39 			, uintptr_t coh_start,
40 			uintptr_t coh_limit
41 #endif
42 );
43 
44 #if defined(IMAGE_BL31) || (defined(AARCH32) && defined(IMAGE_BL32))
45 /*
46  * Use this macro to instantiate lock before it is used in below
47  * arm_lock_xxx() macros
48  */
49 #define ARM_INSTANTIATE_LOCK	DEFINE_BAKERY_LOCK(arm_lock)
50 #define ARM_LOCK_GET_INSTANCE	(&arm_lock)
51 /*
52  * These are wrapper macros to the Coherent Memory Bakery Lock API.
53  */
54 #define arm_lock_init()		bakery_lock_init(&arm_lock)
55 #define arm_lock_get()		bakery_lock_get(&arm_lock)
56 #define arm_lock_release()	bakery_lock_release(&arm_lock)
57 
58 #else
59 
60 /*
61  * Empty macros for all other BL stages other than BL31 and BL32
62  */
63 #define ARM_INSTANTIATE_LOCK	static int arm_lock __unused
64 #define ARM_LOCK_GET_INSTANCE	0
65 #define arm_lock_init()
66 #define arm_lock_get()
67 #define arm_lock_release()
68 
69 #endif /* defined(IMAGE_BL31) || (defined(AARCH32) && defined(IMAGE_BL32)) */
70 
71 #if ARM_RECOM_STATE_ID_ENC
72 /*
73  * Macros used to parse state information from State-ID if it is using the
74  * recommended encoding for State-ID.
75  */
76 #define ARM_LOCAL_PSTATE_WIDTH		4
77 #define ARM_LOCAL_PSTATE_MASK		((1 << ARM_LOCAL_PSTATE_WIDTH) - 1)
78 
79 /* Macros to construct the composite power state */
80 
81 /* Make composite power state parameter till power level 0 */
82 #if PSCI_EXTENDED_STATE_ID
83 
84 #define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \
85 		(((lvl0_state) << PSTATE_ID_SHIFT) | ((type) << PSTATE_TYPE_SHIFT))
86 #else
87 #define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \
88 		(((lvl0_state) << PSTATE_ID_SHIFT) | \
89 		((pwr_lvl) << PSTATE_PWR_LVL_SHIFT) | \
90 		((type) << PSTATE_TYPE_SHIFT))
91 #endif /* __PSCI_EXTENDED_STATE_ID__ */
92 
93 /* Make composite power state parameter till power level 1 */
94 #define arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \
95 		(((lvl1_state) << ARM_LOCAL_PSTATE_WIDTH) | \
96 		arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type))
97 
98 /* Make composite power state parameter till power level 2 */
99 #define arm_make_pwrstate_lvl2(lvl2_state, lvl1_state, lvl0_state, pwr_lvl, type) \
100 		(((lvl2_state) << (ARM_LOCAL_PSTATE_WIDTH * 2)) | \
101 		arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type))
102 
103 #endif /* __ARM_RECOM_STATE_ID_ENC__ */
104 
105 /* ARM State switch error codes */
106 #define STATE_SW_E_PARAM		(-2)
107 #define STATE_SW_E_DENIED		(-3)
108 
109 /* IO storage utility functions */
110 void arm_io_setup(void);
111 
112 /* Security utility functions */
113 void arm_tzc400_setup(void);
114 struct tzc_dmc500_driver_data;
115 void arm_tzc_dmc500_setup(struct tzc_dmc500_driver_data *plat_driver_data);
116 
117 /* Systimer utility function */
118 void arm_configure_sys_timer(void);
119 
120 /* PM utility functions */
121 int arm_validate_power_state(unsigned int power_state,
122 			    psci_power_state_t *req_state);
123 int arm_validate_psci_entrypoint(uintptr_t entrypoint);
124 int arm_validate_ns_entrypoint(uintptr_t entrypoint);
125 void arm_system_pwr_domain_save(void);
126 void arm_system_pwr_domain_resume(void);
127 void arm_program_trusted_mailbox(uintptr_t address);
128 int arm_psci_read_mem_protect(int *val);
129 int arm_nor_psci_write_mem_protect(int val);
130 void arm_nor_psci_do_mem_protect(void);
131 int arm_psci_mem_protect_chk(uintptr_t base, u_register_t length);
132 
133 /* Topology utility function */
134 int arm_check_mpidr(u_register_t mpidr);
135 
136 /* BL1 utility functions */
137 void arm_bl1_early_platform_setup(void);
138 void arm_bl1_platform_setup(void);
139 void arm_bl1_plat_arch_setup(void);
140 
141 /* BL2 utility functions */
142 void arm_bl2_early_platform_setup(uintptr_t tb_fw_config, struct meminfo *mem_layout);
143 void arm_bl2_platform_setup(void);
144 void arm_bl2_plat_arch_setup(void);
145 uint32_t arm_get_spsr_for_bl32_entry(void);
146 uint32_t arm_get_spsr_for_bl33_entry(void);
147 int arm_bl2_handle_post_image_load(unsigned int image_id);
148 
149 /* BL2 at EL3 functions */
150 void arm_bl2_el3_early_platform_setup(void);
151 void arm_bl2_el3_plat_arch_setup(void);
152 
153 /* BL2U utility functions */
154 void arm_bl2u_early_platform_setup(struct meminfo *mem_layout,
155 				void *plat_info);
156 void arm_bl2u_platform_setup(void);
157 void arm_bl2u_plat_arch_setup(void);
158 
159 /* BL31 utility functions */
160 #if LOAD_IMAGE_V2
161 void arm_bl31_early_platform_setup(void *from_bl2, uintptr_t soc_fw_config,
162 				uintptr_t hw_config, void *plat_params_from_bl2);
163 #else
164 void arm_bl31_early_platform_setup(struct bl31_params *from_bl2, uintptr_t soc_fw_config,
165 				uintptr_t hw_config, void *plat_params_from_bl2);
166 #endif /* LOAD_IMAGE_V2 */
167 void arm_bl31_platform_setup(void);
168 void arm_bl31_plat_runtime_setup(void);
169 void arm_bl31_plat_arch_setup(void);
170 
171 /* TSP utility functions */
172 void arm_tsp_early_platform_setup(void);
173 
174 /* SP_MIN utility functions */
175 void arm_sp_min_early_platform_setup(void *from_bl2, uintptr_t tos_fw_config,
176 				uintptr_t hw_config, void *plat_params_from_bl2);
177 void arm_sp_min_plat_runtime_setup(void);
178 
179 /* FIP TOC validity check */
180 int arm_io_is_toc_valid(void);
181 
182 /* Utility functions for Dynamic Config */
183 void arm_load_tb_fw_config(void);
184 void arm_bl2_set_tb_cfg_addr(void *dtb);
185 void arm_bl2_dyn_cfg_init(void);
186 
187 /*
188  * Mandatory functions required in ARM standard platforms
189  */
190 unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr);
191 void plat_arm_gic_driver_init(void);
192 void plat_arm_gic_init(void);
193 void plat_arm_gic_cpuif_enable(void);
194 void plat_arm_gic_cpuif_disable(void);
195 void plat_arm_gic_redistif_on(void);
196 void plat_arm_gic_redistif_off(void);
197 void plat_arm_gic_pcpu_init(void);
198 void plat_arm_gic_save(void);
199 void plat_arm_gic_resume(void);
200 void plat_arm_security_setup(void);
201 void plat_arm_pwrc_setup(void);
202 void plat_arm_interconnect_init(void);
203 void plat_arm_interconnect_enter_coherency(void);
204 void plat_arm_interconnect_exit_coherency(void);
205 
206 #if ARM_PLAT_MT
207 unsigned int plat_arm_get_cpu_pe_count(u_register_t mpidr);
208 #endif
209 
210 #if LOAD_IMAGE_V2
211 /*
212  * This function is called after loading SCP_BL2 image and it is used to perform
213  * any platform-specific actions required to handle the SCP firmware.
214  */
215 int plat_arm_bl2_handle_scp_bl2(struct image_info *scp_bl2_image_info);
216 #endif
217 
218 /*
219  * Optional functions required in ARM standard platforms
220  */
221 void plat_arm_io_setup(void);
222 int plat_arm_get_alt_image_source(
223 	unsigned int image_id,
224 	uintptr_t *dev_handle,
225 	uintptr_t *image_spec);
226 unsigned int plat_arm_calc_core_pos(u_register_t mpidr);
227 const mmap_region_t *plat_arm_get_mmap(void);
228 
229 /* Allow platform to override psci_pm_ops during runtime */
230 const plat_psci_ops_t *plat_arm_psci_override_pm_ops(plat_psci_ops_t *ops);
231 
232 /* Execution state switch in ARM platforms */
233 int arm_execution_state_switch(unsigned int smc_fid,
234 		uint32_t pc_hi,
235 		uint32_t pc_lo,
236 		uint32_t cookie_hi,
237 		uint32_t cookie_lo,
238 		void *handle);
239 
240 #endif /* __PLAT_ARM_H__ */
241