1 /* 2 * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 #ifndef __PLAT_ARM_H__ 31 #define __PLAT_ARM_H__ 32 33 #include <bakery_lock.h> 34 #include <bl_common.h> 35 #include <cassert.h> 36 #include <cpu_data.h> 37 #include <stdint.h> 38 #include <xlat_tables.h> 39 40 #define ARM_CASSERT_MMAP \ 41 CASSERT((ARRAY_SIZE(plat_arm_mmap) + ARM_BL_REGIONS) \ 42 <= MAX_MMAP_REGIONS, \ 43 assert_max_mmap_regions); 44 45 /* 46 * Utility functions common to ARM standard platforms 47 */ 48 49 void arm_configure_mmu_el1(unsigned long total_base, 50 unsigned long total_size, 51 unsigned long ro_start, 52 unsigned long ro_limit 53 #if USE_COHERENT_MEM 54 , unsigned long coh_start, 55 unsigned long coh_limit 56 #endif 57 ); 58 void arm_configure_mmu_el3(unsigned long total_base, 59 unsigned long total_size, 60 unsigned long ro_start, 61 unsigned long ro_limit 62 #if USE_COHERENT_MEM 63 , unsigned long coh_start, 64 unsigned long coh_limit 65 #endif 66 ); 67 68 #if IMAGE_BL31 69 /* 70 * Use this macro to instantiate lock before it is used in below 71 * arm_lock_xxx() macros 72 */ 73 #define ARM_INSTANTIATE_LOCK DEFINE_BAKERY_LOCK(arm_lock); 74 75 /* 76 * These are wrapper macros to the Coherent Memory Bakery Lock API. 77 */ 78 #define arm_lock_init() bakery_lock_init(&arm_lock) 79 #define arm_lock_get() bakery_lock_get(&arm_lock) 80 #define arm_lock_release() bakery_lock_release(&arm_lock) 81 82 #else 83 84 /* 85 * Empty macros for all other BL stages other than BL31 86 */ 87 #define ARM_INSTANTIATE_LOCK 88 #define arm_lock_init() 89 #define arm_lock_get() 90 #define arm_lock_release() 91 92 #endif /* IMAGE_BL31 */ 93 94 #if ARM_RECOM_STATE_ID_ENC 95 /* 96 * Macros used to parse state information from State-ID if it is using the 97 * recommended encoding for State-ID. 98 */ 99 #define ARM_LOCAL_PSTATE_WIDTH 4 100 #define ARM_LOCAL_PSTATE_MASK ((1 << ARM_LOCAL_PSTATE_WIDTH) - 1) 101 102 /* Macros to construct the composite power state */ 103 104 /* Make composite power state parameter till power level 0 */ 105 #if PSCI_EXTENDED_STATE_ID 106 107 #define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ 108 (((lvl0_state) << PSTATE_ID_SHIFT) | ((type) << PSTATE_TYPE_SHIFT)) 109 #else 110 #define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ 111 (((lvl0_state) << PSTATE_ID_SHIFT) | \ 112 ((pwr_lvl) << PSTATE_PWR_LVL_SHIFT) | \ 113 ((type) << PSTATE_TYPE_SHIFT)) 114 #endif /* __PSCI_EXTENDED_STATE_ID__ */ 115 116 /* Make composite power state parameter till power level 1 */ 117 #define arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \ 118 (((lvl1_state) << ARM_LOCAL_PSTATE_WIDTH) | \ 119 arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type)) 120 121 /* Make composite power state parameter till power level 2 */ 122 #define arm_make_pwrstate_lvl2(lvl2_state, lvl1_state, lvl0_state, pwr_lvl, type) \ 123 (((lvl2_state) << (ARM_LOCAL_PSTATE_WIDTH * 2)) | \ 124 arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type)) 125 126 #endif /* __ARM_RECOM_STATE_ID_ENC__ */ 127 128 129 /* IO storage utility functions */ 130 void arm_io_setup(void); 131 132 /* Security utility functions */ 133 void arm_tzc400_setup(void); 134 struct tzc_dmc500_driver_data; 135 void arm_tzc_dmc500_setup(struct tzc_dmc500_driver_data *plat_driver_data); 136 137 /* Systimer utility function */ 138 void arm_configure_sys_timer(void); 139 140 /* PM utility functions */ 141 int arm_validate_power_state(unsigned int power_state, 142 psci_power_state_t *req_state); 143 int arm_validate_ns_entrypoint(uintptr_t entrypoint); 144 void arm_system_pwr_domain_resume(void); 145 void arm_program_trusted_mailbox(uintptr_t address); 146 147 /* Topology utility function */ 148 int arm_check_mpidr(u_register_t mpidr); 149 150 /* BL1 utility functions */ 151 void arm_bl1_early_platform_setup(void); 152 void arm_bl1_platform_setup(void); 153 void arm_bl1_plat_arch_setup(void); 154 155 /* BL2 utility functions */ 156 void arm_bl2_early_platform_setup(meminfo_t *mem_layout); 157 void arm_bl2_platform_setup(void); 158 void arm_bl2_plat_arch_setup(void); 159 uint32_t arm_get_spsr_for_bl32_entry(void); 160 uint32_t arm_get_spsr_for_bl33_entry(void); 161 162 /* BL2U utility functions */ 163 void arm_bl2u_early_platform_setup(struct meminfo *mem_layout, 164 void *plat_info); 165 void arm_bl2u_platform_setup(void); 166 void arm_bl2u_plat_arch_setup(void); 167 168 /* BL31 utility functions */ 169 void arm_bl31_early_platform_setup(bl31_params_t *from_bl2, 170 void *plat_params_from_bl2); 171 void arm_bl31_platform_setup(void); 172 void arm_bl31_plat_runtime_setup(void); 173 void arm_bl31_plat_arch_setup(void); 174 175 /* TSP utility functions */ 176 void arm_tsp_early_platform_setup(void); 177 178 /* FIP TOC validity check */ 179 int arm_io_is_toc_valid(void); 180 181 /* 182 * Mandatory functions required in ARM standard platforms 183 */ 184 unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr); 185 void plat_arm_gic_driver_init(void); 186 void plat_arm_gic_init(void); 187 void plat_arm_gic_cpuif_enable(void); 188 void plat_arm_gic_cpuif_disable(void); 189 void plat_arm_gic_pcpu_init(void); 190 void plat_arm_security_setup(void); 191 void plat_arm_pwrc_setup(void); 192 void plat_arm_interconnect_init(void); 193 void plat_arm_interconnect_enter_coherency(void); 194 void plat_arm_interconnect_exit_coherency(void); 195 196 /* 197 * Optional functions required in ARM standard platforms 198 */ 199 void plat_arm_io_setup(void); 200 int plat_arm_get_alt_image_source( 201 unsigned int image_id, 202 uintptr_t *dev_handle, 203 uintptr_t *image_spec); 204 unsigned int plat_arm_calc_core_pos(u_register_t mpidr); 205 const mmap_region_t *plat_arm_get_mmap(void); 206 207 #endif /* __PLAT_ARM_H__ */ 208