xref: /rk3399_ARM-atf/include/plat/arm/common/plat_arm.h (revision 0e14a7fbeb3014e719302c9b7f6a24c4030dfaf0)
1 /*
2  * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 #ifndef __PLAT_ARM_H__
7 #define __PLAT_ARM_H__
8 
9 #include <arm_xlat_tables.h>
10 #include <bakery_lock.h>
11 #include <cassert.h>
12 #include <cpu_data.h>
13 #include <stdint.h>
14 #include <utils_def.h>
15 
16 /*******************************************************************************
17  * Forward declarations
18  ******************************************************************************/
19 struct bl31_params;
20 struct meminfo;
21 struct image_info;
22 
23 #define ARM_CASSERT_MMAP						\
24 	CASSERT((ARRAY_SIZE(plat_arm_mmap) + ARM_BL_REGIONS)		\
25 		<= MAX_MMAP_REGIONS,					\
26 		assert_max_mmap_regions);
27 
28 /*
29  * Utility functions common to ARM standard platforms
30  */
31 void arm_setup_page_tables(uintptr_t total_base,
32 			size_t total_size,
33 			uintptr_t code_start,
34 			uintptr_t code_limit,
35 			uintptr_t rodata_start,
36 			uintptr_t rodata_limit
37 #if USE_COHERENT_MEM
38 			, uintptr_t coh_start,
39 			uintptr_t coh_limit
40 #endif
41 );
42 
43 #if defined(IMAGE_BL31) || (defined(AARCH32) && defined(IMAGE_BL32))
44 /*
45  * Use this macro to instantiate lock before it is used in below
46  * arm_lock_xxx() macros
47  */
48 #define ARM_INSTANTIATE_LOCK	DEFINE_BAKERY_LOCK(arm_lock);
49 
50 /*
51  * These are wrapper macros to the Coherent Memory Bakery Lock API.
52  */
53 #define arm_lock_init()		bakery_lock_init(&arm_lock)
54 #define arm_lock_get()		bakery_lock_get(&arm_lock)
55 #define arm_lock_release()	bakery_lock_release(&arm_lock)
56 
57 #else
58 
59 /*
60  * Empty macros for all other BL stages other than BL31 and BL32
61  */
62 #define ARM_INSTANTIATE_LOCK
63 #define arm_lock_init()
64 #define arm_lock_get()
65 #define arm_lock_release()
66 
67 #endif /* defined(IMAGE_BL31) || (defined(AARCH32) && defined(IMAGE_BL32)) */
68 
69 #if ARM_RECOM_STATE_ID_ENC
70 /*
71  * Macros used to parse state information from State-ID if it is using the
72  * recommended encoding for State-ID.
73  */
74 #define ARM_LOCAL_PSTATE_WIDTH		4
75 #define ARM_LOCAL_PSTATE_MASK		((1 << ARM_LOCAL_PSTATE_WIDTH) - 1)
76 
77 /* Macros to construct the composite power state */
78 
79 /* Make composite power state parameter till power level 0 */
80 #if PSCI_EXTENDED_STATE_ID
81 
82 #define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \
83 		(((lvl0_state) << PSTATE_ID_SHIFT) | ((type) << PSTATE_TYPE_SHIFT))
84 #else
85 #define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \
86 		(((lvl0_state) << PSTATE_ID_SHIFT) | \
87 		((pwr_lvl) << PSTATE_PWR_LVL_SHIFT) | \
88 		((type) << PSTATE_TYPE_SHIFT))
89 #endif /* __PSCI_EXTENDED_STATE_ID__ */
90 
91 /* Make composite power state parameter till power level 1 */
92 #define arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \
93 		(((lvl1_state) << ARM_LOCAL_PSTATE_WIDTH) | \
94 		arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type))
95 
96 /* Make composite power state parameter till power level 2 */
97 #define arm_make_pwrstate_lvl2(lvl2_state, lvl1_state, lvl0_state, pwr_lvl, type) \
98 		(((lvl2_state) << (ARM_LOCAL_PSTATE_WIDTH * 2)) | \
99 		arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type))
100 
101 #endif /* __ARM_RECOM_STATE_ID_ENC__ */
102 
103 /* ARM State switch error codes */
104 #define STATE_SW_E_PARAM		(-2)
105 #define STATE_SW_E_DENIED		(-3)
106 
107 /* IO storage utility functions */
108 void arm_io_setup(void);
109 
110 /* Security utility functions */
111 void arm_tzc400_setup(void);
112 struct tzc_dmc500_driver_data;
113 void arm_tzc_dmc500_setup(struct tzc_dmc500_driver_data *plat_driver_data);
114 
115 /* Systimer utility function */
116 void arm_configure_sys_timer(void);
117 
118 /* PM utility functions */
119 int arm_validate_power_state(unsigned int power_state,
120 			    psci_power_state_t *req_state);
121 int arm_validate_ns_entrypoint(uintptr_t entrypoint);
122 void arm_system_pwr_domain_resume(void);
123 void arm_program_trusted_mailbox(uintptr_t address);
124 
125 /* Topology utility function */
126 int arm_check_mpidr(u_register_t mpidr);
127 
128 /* BL1 utility functions */
129 void arm_bl1_early_platform_setup(void);
130 void arm_bl1_platform_setup(void);
131 void arm_bl1_plat_arch_setup(void);
132 
133 /* BL2 utility functions */
134 void arm_bl2_early_platform_setup(struct meminfo *mem_layout);
135 void arm_bl2_platform_setup(void);
136 void arm_bl2_plat_arch_setup(void);
137 uint32_t arm_get_spsr_for_bl32_entry(void);
138 uint32_t arm_get_spsr_for_bl33_entry(void);
139 int arm_bl2_handle_post_image_load(unsigned int image_id);
140 
141 /* BL2U utility functions */
142 void arm_bl2u_early_platform_setup(struct meminfo *mem_layout,
143 				void *plat_info);
144 void arm_bl2u_platform_setup(void);
145 void arm_bl2u_plat_arch_setup(void);
146 
147 /* BL31 utility functions */
148 #if LOAD_IMAGE_V2
149 void arm_bl31_early_platform_setup(void *from_bl2,
150 				void *plat_params_from_bl2);
151 #else
152 void arm_bl31_early_platform_setup(struct bl31_params *from_bl2,
153 				void *plat_params_from_bl2);
154 #endif /* LOAD_IMAGE_V2 */
155 void arm_bl31_platform_setup(void);
156 void arm_bl31_plat_runtime_setup(void);
157 void arm_bl31_plat_arch_setup(void);
158 
159 /* TSP utility functions */
160 void arm_tsp_early_platform_setup(void);
161 
162 /* SP_MIN utility functions */
163 void arm_sp_min_early_platform_setup(void *from_bl2,
164 		void *plat_params_from_bl2);
165 
166 /* FIP TOC validity check */
167 int arm_io_is_toc_valid(void);
168 
169 /*
170  * Mandatory functions required in ARM standard platforms
171  */
172 unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr);
173 void plat_arm_gic_driver_init(void);
174 void plat_arm_gic_init(void);
175 void plat_arm_gic_cpuif_enable(void);
176 void plat_arm_gic_cpuif_disable(void);
177 void plat_arm_gic_redistif_on(void);
178 void plat_arm_gic_redistif_off(void);
179 void plat_arm_gic_pcpu_init(void);
180 void plat_arm_security_setup(void);
181 void plat_arm_pwrc_setup(void);
182 void plat_arm_interconnect_init(void);
183 void plat_arm_interconnect_enter_coherency(void);
184 void plat_arm_interconnect_exit_coherency(void);
185 
186 #if ARM_PLAT_MT
187 unsigned int plat_arm_get_cpu_pe_count(u_register_t mpidr);
188 #endif
189 
190 #if LOAD_IMAGE_V2
191 /*
192  * This function is called after loading SCP_BL2 image and it is used to perform
193  * any platform-specific actions required to handle the SCP firmware.
194  */
195 int plat_arm_bl2_handle_scp_bl2(struct image_info *scp_bl2_image_info);
196 #endif
197 
198 /*
199  * Optional functions required in ARM standard platforms
200  */
201 void plat_arm_io_setup(void);
202 int plat_arm_get_alt_image_source(
203 	unsigned int image_id,
204 	uintptr_t *dev_handle,
205 	uintptr_t *image_spec);
206 unsigned int plat_arm_calc_core_pos(u_register_t mpidr);
207 const mmap_region_t *plat_arm_get_mmap(void);
208 
209 /* Allow platform to override psci_pm_ops during runtime */
210 const plat_psci_ops_t *plat_arm_psci_override_pm_ops(plat_psci_ops_t *ops);
211 
212 /* Execution state switch in ARM platforms */
213 int arm_execution_state_switch(unsigned int smc_fid,
214 		uint32_t pc_hi,
215 		uint32_t pc_lo,
216 		uint32_t cookie_hi,
217 		uint32_t cookie_lo,
218 		void *handle);
219 
220 #endif /* __PLAT_ARM_H__ */
221