xref: /rk3399_ARM-atf/include/plat/arm/common/plat_arm.h (revision ed81f3ebbfb5abc7d0d250fbc71f297a904d71ae)
1b4315306SDan Handley /*
265cb1c4cSVikram Kanigiri  * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
3b4315306SDan Handley  *
4b4315306SDan Handley  * Redistribution and use in source and binary forms, with or without
5b4315306SDan Handley  * modification, are permitted provided that the following conditions are met:
6b4315306SDan Handley  *
7b4315306SDan Handley  * Redistributions of source code must retain the above copyright notice, this
8b4315306SDan Handley  * list of conditions and the following disclaimer.
9b4315306SDan Handley  *
10b4315306SDan Handley  * Redistributions in binary form must reproduce the above copyright notice,
11b4315306SDan Handley  * this list of conditions and the following disclaimer in the documentation
12b4315306SDan Handley  * and/or other materials provided with the distribution.
13b4315306SDan Handley  *
14b4315306SDan Handley  * Neither the name of ARM nor the names of its contributors may be used
15b4315306SDan Handley  * to endorse or promote products derived from this software without specific
16b4315306SDan Handley  * prior written permission.
17b4315306SDan Handley  *
18b4315306SDan Handley  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19b4315306SDan Handley  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20b4315306SDan Handley  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21b4315306SDan Handley  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22b4315306SDan Handley  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23b4315306SDan Handley  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24b4315306SDan Handley  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25b4315306SDan Handley  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26b4315306SDan Handley  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27b4315306SDan Handley  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28b4315306SDan Handley  * POSSIBILITY OF SUCH DAMAGE.
29b4315306SDan Handley  */
30b4315306SDan Handley #ifndef __PLAT_ARM_H__
31b4315306SDan Handley #define __PLAT_ARM_H__
32b4315306SDan Handley 
33b4315306SDan Handley #include <bakery_lock.h>
34b4315306SDan Handley #include <cassert.h>
35b4315306SDan Handley #include <cpu_data.h>
36b4315306SDan Handley #include <stdint.h>
37*ed81f3ebSSandrine Bailleux #include <utils.h>
388f6623f0SSoby Mathew #include <xlat_tables.h>
39b4315306SDan Handley 
40b4315306SDan Handley #define ARM_CASSERT_MMAP						\
41b4315306SDan Handley 	CASSERT((ARRAY_SIZE(plat_arm_mmap) + ARM_BL_REGIONS)		\
42b4315306SDan Handley 		<= MAX_MMAP_REGIONS,					\
43b4315306SDan Handley 		assert_max_mmap_regions);
44b4315306SDan Handley 
45b4315306SDan Handley /*
46b4315306SDan Handley  * Utility functions common to ARM standard platforms
47b4315306SDan Handley  */
48b5fa6563SSandrine Bailleux void arm_setup_page_tables(unsigned long total_base,
49b4315306SDan Handley 			unsigned long total_size,
50b4315306SDan Handley 			unsigned long ro_start,
51b4315306SDan Handley 			unsigned long ro_limit
52b4315306SDan Handley #if USE_COHERENT_MEM
53b4315306SDan Handley 			, unsigned long coh_start,
54b4315306SDan Handley 			unsigned long coh_limit
55b4315306SDan Handley #endif
56b4315306SDan Handley );
57b4315306SDan Handley 
58b4315306SDan Handley #if IMAGE_BL31
59b4315306SDan Handley /*
60b4315306SDan Handley  * Use this macro to instantiate lock before it is used in below
61b4315306SDan Handley  * arm_lock_xxx() macros
62b4315306SDan Handley  */
63e25e6f41SVikram Kanigiri #define ARM_INSTANTIATE_LOCK	DEFINE_BAKERY_LOCK(arm_lock);
64b4315306SDan Handley 
65b4315306SDan Handley /*
66b4315306SDan Handley  * These are wrapper macros to the Coherent Memory Bakery Lock API.
67b4315306SDan Handley  */
68b4315306SDan Handley #define arm_lock_init()		bakery_lock_init(&arm_lock)
69b4315306SDan Handley #define arm_lock_get()		bakery_lock_get(&arm_lock)
70b4315306SDan Handley #define arm_lock_release()	bakery_lock_release(&arm_lock)
71b4315306SDan Handley 
72b4315306SDan Handley #else
73b4315306SDan Handley 
74b4315306SDan Handley /*
75d178637dSJuan Castillo  * Empty macros for all other BL stages other than BL31
76b4315306SDan Handley  */
77b4315306SDan Handley #define ARM_INSTANTIATE_LOCK
78b4315306SDan Handley #define arm_lock_init()
79b4315306SDan Handley #define arm_lock_get()
80b4315306SDan Handley #define arm_lock_release()
81b4315306SDan Handley 
82b4315306SDan Handley #endif /* IMAGE_BL31 */
83b4315306SDan Handley 
842204afdeSSoby Mathew #if ARM_RECOM_STATE_ID_ENC
852204afdeSSoby Mathew /*
862204afdeSSoby Mathew  * Macros used to parse state information from State-ID if it is using the
872204afdeSSoby Mathew  * recommended encoding for State-ID.
882204afdeSSoby Mathew  */
892204afdeSSoby Mathew #define ARM_LOCAL_PSTATE_WIDTH		4
902204afdeSSoby Mathew #define ARM_LOCAL_PSTATE_MASK		((1 << ARM_LOCAL_PSTATE_WIDTH) - 1)
912204afdeSSoby Mathew 
922204afdeSSoby Mathew /* Macros to construct the composite power state */
932204afdeSSoby Mathew 
942204afdeSSoby Mathew /* Make composite power state parameter till power level 0 */
952204afdeSSoby Mathew #if PSCI_EXTENDED_STATE_ID
962204afdeSSoby Mathew 
972204afdeSSoby Mathew #define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \
982204afdeSSoby Mathew 		(((lvl0_state) << PSTATE_ID_SHIFT) | ((type) << PSTATE_TYPE_SHIFT))
992204afdeSSoby Mathew #else
1002204afdeSSoby Mathew #define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \
1012204afdeSSoby Mathew 		(((lvl0_state) << PSTATE_ID_SHIFT) | \
1022204afdeSSoby Mathew 		((pwr_lvl) << PSTATE_PWR_LVL_SHIFT) | \
1032204afdeSSoby Mathew 		((type) << PSTATE_TYPE_SHIFT))
1042204afdeSSoby Mathew #endif /* __PSCI_EXTENDED_STATE_ID__ */
1052204afdeSSoby Mathew 
1062204afdeSSoby Mathew /* Make composite power state parameter till power level 1 */
1072204afdeSSoby Mathew #define arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \
1082204afdeSSoby Mathew 		(((lvl1_state) << ARM_LOCAL_PSTATE_WIDTH) | \
1092204afdeSSoby Mathew 		arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type))
1102204afdeSSoby Mathew 
1115f3a6030SSoby Mathew /* Make composite power state parameter till power level 2 */
1125f3a6030SSoby Mathew #define arm_make_pwrstate_lvl2(lvl2_state, lvl1_state, lvl0_state, pwr_lvl, type) \
1135f3a6030SSoby Mathew 		(((lvl2_state) << (ARM_LOCAL_PSTATE_WIDTH * 2)) | \
1145f3a6030SSoby Mathew 		arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type))
1155f3a6030SSoby Mathew 
1162204afdeSSoby Mathew #endif /* __ARM_RECOM_STATE_ID_ENC__ */
1172204afdeSSoby Mathew 
118b4315306SDan Handley 
119b4315306SDan Handley /* IO storage utility functions */
120b4315306SDan Handley void arm_io_setup(void);
121b4315306SDan Handley 
122b4315306SDan Handley /* Security utility functions */
12357f78201SSoby Mathew void arm_tzc400_setup(void);
124618f0feeSVikram Kanigiri struct tzc_dmc500_driver_data;
125618f0feeSVikram Kanigiri void arm_tzc_dmc500_setup(struct tzc_dmc500_driver_data *plat_driver_data);
126b4315306SDan Handley 
127c1bb8a05SSoby Mathew /* Systimer utility function */
128c1bb8a05SSoby Mathew void arm_configure_sys_timer(void);
129c1bb8a05SSoby Mathew 
130b4315306SDan Handley /* PM utility functions */
13138dce70fSSoby Mathew int arm_validate_power_state(unsigned int power_state,
13238dce70fSSoby Mathew 			    psci_power_state_t *req_state);
133f9e858b1SSoby Mathew int arm_validate_ns_entrypoint(uintptr_t entrypoint);
134c1bb8a05SSoby Mathew void arm_system_pwr_domain_resume(void);
1354c117f6cSSandrine Bailleux void arm_program_trusted_mailbox(uintptr_t address);
13638dce70fSSoby Mathew 
13738dce70fSSoby Mathew /* Topology utility function */
13838dce70fSSoby Mathew int arm_check_mpidr(u_register_t mpidr);
139b4315306SDan Handley 
140b4315306SDan Handley /* BL1 utility functions */
141b4315306SDan Handley void arm_bl1_early_platform_setup(void);
142b4315306SDan Handley void arm_bl1_platform_setup(void);
143b4315306SDan Handley void arm_bl1_plat_arch_setup(void);
144b4315306SDan Handley 
145b4315306SDan Handley /* BL2 utility functions */
146b4315306SDan Handley void arm_bl2_early_platform_setup(meminfo_t *mem_layout);
147b4315306SDan Handley void arm_bl2_platform_setup(void);
148b4315306SDan Handley void arm_bl2_plat_arch_setup(void);
149b4315306SDan Handley uint32_t arm_get_spsr_for_bl32_entry(void);
150b4315306SDan Handley uint32_t arm_get_spsr_for_bl33_entry(void);
151b4315306SDan Handley 
152dcda29f6SYatharth Kochar /* BL2U utility functions */
153dcda29f6SYatharth Kochar void arm_bl2u_early_platform_setup(struct meminfo *mem_layout,
154dcda29f6SYatharth Kochar 				void *plat_info);
155dcda29f6SYatharth Kochar void arm_bl2u_platform_setup(void);
156dcda29f6SYatharth Kochar void arm_bl2u_plat_arch_setup(void);
157dcda29f6SYatharth Kochar 
158d178637dSJuan Castillo /* BL31 utility functions */
159b4315306SDan Handley void arm_bl31_early_platform_setup(bl31_params_t *from_bl2,
160b4315306SDan Handley 				void *plat_params_from_bl2);
161b4315306SDan Handley void arm_bl31_platform_setup(void);
162080225daSSoby Mathew void arm_bl31_plat_runtime_setup(void);
163b4315306SDan Handley void arm_bl31_plat_arch_setup(void);
164b4315306SDan Handley 
165b4315306SDan Handley /* TSP utility functions */
166b4315306SDan Handley void arm_tsp_early_platform_setup(void);
167b4315306SDan Handley 
168436223deSYatharth Kochar /* FIP TOC validity check */
169436223deSYatharth Kochar int arm_io_is_toc_valid(void);
170b4315306SDan Handley 
171b4315306SDan Handley /*
172b4315306SDan Handley  * Mandatory functions required in ARM standard platforms
173b4315306SDan Handley  */
1740108047aSSoby Mathew unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr);
17527573c59SAchin Gupta void plat_arm_gic_driver_init(void);
176b4315306SDan Handley void plat_arm_gic_init(void);
17727573c59SAchin Gupta void plat_arm_gic_cpuif_enable(void);
17827573c59SAchin Gupta void plat_arm_gic_cpuif_disable(void);
17927573c59SAchin Gupta void plat_arm_gic_pcpu_init(void);
180b4315306SDan Handley void plat_arm_security_setup(void);
181b4315306SDan Handley void plat_arm_pwrc_setup(void);
1826355f234SVikram Kanigiri void plat_arm_interconnect_init(void);
1836355f234SVikram Kanigiri void plat_arm_interconnect_enter_coherency(void);
1846355f234SVikram Kanigiri void plat_arm_interconnect_exit_coherency(void);
185b4315306SDan Handley 
186b4315306SDan Handley /*
187b4315306SDan Handley  * Optional functions required in ARM standard platforms
188b4315306SDan Handley  */
189b4315306SDan Handley void plat_arm_io_setup(void);
190b4315306SDan Handley int plat_arm_get_alt_image_source(
19116948ae1SJuan Castillo 	unsigned int image_id,
19216948ae1SJuan Castillo 	uintptr_t *dev_handle,
19316948ae1SJuan Castillo 	uintptr_t *image_spec);
19438dce70fSSoby Mathew unsigned int plat_arm_calc_core_pos(u_register_t mpidr);
19565cb1c4cSVikram Kanigiri const mmap_region_t *plat_arm_get_mmap(void);
196b4315306SDan Handley 
197b4315306SDan Handley #endif /* __PLAT_ARM_H__ */
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