1*b4315306SDan Handley /* 2*b4315306SDan Handley * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. 3*b4315306SDan Handley * 4*b4315306SDan Handley * Redistribution and use in source and binary forms, with or without 5*b4315306SDan Handley * modification, are permitted provided that the following conditions are met: 6*b4315306SDan Handley * 7*b4315306SDan Handley * Redistributions of source code must retain the above copyright notice, this 8*b4315306SDan Handley * list of conditions and the following disclaimer. 9*b4315306SDan Handley * 10*b4315306SDan Handley * Redistributions in binary form must reproduce the above copyright notice, 11*b4315306SDan Handley * this list of conditions and the following disclaimer in the documentation 12*b4315306SDan Handley * and/or other materials provided with the distribution. 13*b4315306SDan Handley * 14*b4315306SDan Handley * Neither the name of ARM nor the names of its contributors may be used 15*b4315306SDan Handley * to endorse or promote products derived from this software without specific 16*b4315306SDan Handley * prior written permission. 17*b4315306SDan Handley * 18*b4315306SDan Handley * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19*b4315306SDan Handley * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20*b4315306SDan Handley * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21*b4315306SDan Handley * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22*b4315306SDan Handley * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23*b4315306SDan Handley * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24*b4315306SDan Handley * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25*b4315306SDan Handley * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26*b4315306SDan Handley * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27*b4315306SDan Handley * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28*b4315306SDan Handley * POSSIBILITY OF SUCH DAMAGE. 29*b4315306SDan Handley */ 30*b4315306SDan Handley #ifndef __PLAT_ARM_H__ 31*b4315306SDan Handley #define __PLAT_ARM_H__ 32*b4315306SDan Handley 33*b4315306SDan Handley #include <bakery_lock.h> 34*b4315306SDan Handley #include <bl_common.h> 35*b4315306SDan Handley #include <cassert.h> 36*b4315306SDan Handley #include <cpu_data.h> 37*b4315306SDan Handley #include <stdint.h> 38*b4315306SDan Handley 39*b4315306SDan Handley 40*b4315306SDan Handley /* 41*b4315306SDan Handley * Extern declarations common to ARM standard platforms 42*b4315306SDan Handley */ 43*b4315306SDan Handley extern const mmap_region_t plat_arm_mmap[]; 44*b4315306SDan Handley 45*b4315306SDan Handley #define ARM_CASSERT_MMAP \ 46*b4315306SDan Handley CASSERT((ARRAY_SIZE(plat_arm_mmap) + ARM_BL_REGIONS) \ 47*b4315306SDan Handley <= MAX_MMAP_REGIONS, \ 48*b4315306SDan Handley assert_max_mmap_regions); 49*b4315306SDan Handley 50*b4315306SDan Handley /* 51*b4315306SDan Handley * Utility functions common to ARM standard platforms 52*b4315306SDan Handley */ 53*b4315306SDan Handley 54*b4315306SDan Handley void arm_configure_mmu_el1(unsigned long total_base, 55*b4315306SDan Handley unsigned long total_size, 56*b4315306SDan Handley unsigned long ro_start, 57*b4315306SDan Handley unsigned long ro_limit 58*b4315306SDan Handley #if USE_COHERENT_MEM 59*b4315306SDan Handley , unsigned long coh_start, 60*b4315306SDan Handley unsigned long coh_limit 61*b4315306SDan Handley #endif 62*b4315306SDan Handley ); 63*b4315306SDan Handley void arm_configure_mmu_el3(unsigned long total_base, 64*b4315306SDan Handley unsigned long total_size, 65*b4315306SDan Handley unsigned long ro_start, 66*b4315306SDan Handley unsigned long ro_limit 67*b4315306SDan Handley #if USE_COHERENT_MEM 68*b4315306SDan Handley , unsigned long coh_start, 69*b4315306SDan Handley unsigned long coh_limit 70*b4315306SDan Handley #endif 71*b4315306SDan Handley ); 72*b4315306SDan Handley 73*b4315306SDan Handley #if IMAGE_BL31 74*b4315306SDan Handley #if USE_COHERENT_MEM 75*b4315306SDan Handley 76*b4315306SDan Handley /* 77*b4315306SDan Handley * Use this macro to instantiate lock before it is used in below 78*b4315306SDan Handley * arm_lock_xxx() macros 79*b4315306SDan Handley */ 80*b4315306SDan Handley #define ARM_INSTANTIATE_LOCK bakery_lock_t arm_lock \ 81*b4315306SDan Handley __attribute__ ((section("tzfw_coherent_mem"))); 82*b4315306SDan Handley 83*b4315306SDan Handley /* 84*b4315306SDan Handley * These are wrapper macros to the Coherent Memory Bakery Lock API. 85*b4315306SDan Handley */ 86*b4315306SDan Handley #define arm_lock_init() bakery_lock_init(&arm_lock) 87*b4315306SDan Handley #define arm_lock_get() bakery_lock_get(&arm_lock) 88*b4315306SDan Handley #define arm_lock_release() bakery_lock_release(&arm_lock) 89*b4315306SDan Handley 90*b4315306SDan Handley #else 91*b4315306SDan Handley 92*b4315306SDan Handley /******************************************************************************* 93*b4315306SDan Handley * Constants to specify how many bakery locks this platform implements. These 94*b4315306SDan Handley * are used if the platform chooses not to use coherent memory for bakery lock 95*b4315306SDan Handley * data structures. 96*b4315306SDan Handley ******************************************************************************/ 97*b4315306SDan Handley #define ARM_MAX_BAKERIES 1 98*b4315306SDan Handley #define ARM_PWRC_BAKERY_ID 0 99*b4315306SDan Handley 100*b4315306SDan Handley /* Empty definition */ 101*b4315306SDan Handley #define ARM_INSTANTIATE_LOCK 102*b4315306SDan Handley 103*b4315306SDan Handley /******************************************************************************* 104*b4315306SDan Handley * Definition of structure which holds platform specific per-cpu data. Currently 105*b4315306SDan Handley * it holds only the bakery lock information for each cpu. 106*b4315306SDan Handley ******************************************************************************/ 107*b4315306SDan Handley typedef struct arm_cpu_data { 108*b4315306SDan Handley bakery_info_t pcpu_bakery_info[ARM_MAX_BAKERIES]; 109*b4315306SDan Handley } arm_cpu_data_t; 110*b4315306SDan Handley 111*b4315306SDan Handley /* Macro to define the offset of bakery_info_t in arm_cpu_data_t */ 112*b4315306SDan Handley #define ARM_CPU_DATA_LOCK_OFFSET __builtin_offsetof\ 113*b4315306SDan Handley (arm_cpu_data_t, pcpu_bakery_info) 114*b4315306SDan Handley 115*b4315306SDan Handley 116*b4315306SDan Handley /******************************************************************************* 117*b4315306SDan Handley * Helper macros for bakery lock api when using the above arm_cpu_data_t for 118*b4315306SDan Handley * bakery lock data structures. It assumes that the bakery_info is at the 119*b4315306SDan Handley * beginning of the platform specific per-cpu data. 120*b4315306SDan Handley ******************************************************************************/ 121*b4315306SDan Handley #define arm_lock_init() /* No init required */ 122*b4315306SDan Handley #define arm_lock_get() bakery_lock_get(ARM_PWRC_BAKERY_ID, \ 123*b4315306SDan Handley CPU_DATA_PLAT_PCPU_OFFSET + \ 124*b4315306SDan Handley ARM_CPU_DATA_LOCK_OFFSET) 125*b4315306SDan Handley #define arm_lock_release() bakery_lock_release(ARM_PWRC_BAKERY_ID, \ 126*b4315306SDan Handley CPU_DATA_PLAT_PCPU_OFFSET + \ 127*b4315306SDan Handley ARM_CPU_DATA_LOCK_OFFSET) 128*b4315306SDan Handley 129*b4315306SDan Handley /* 130*b4315306SDan Handley * Ensure that the size of the platform specific per-cpu data structure and 131*b4315306SDan Handley * the size of the memory allocated in generic per-cpu data for the platform 132*b4315306SDan Handley * are the same. 133*b4315306SDan Handley */ 134*b4315306SDan Handley CASSERT(PLAT_PCPU_DATA_SIZE == sizeof(arm_cpu_data_t), 135*b4315306SDan Handley arm_pcpu_data_size_mismatch); 136*b4315306SDan Handley 137*b4315306SDan Handley #endif /* USE_COHERENT_MEM */ 138*b4315306SDan Handley 139*b4315306SDan Handley #else 140*b4315306SDan Handley 141*b4315306SDan Handley /* 142*b4315306SDan Handley * Dummy macros for all other BL stages other than BL3-1 143*b4315306SDan Handley */ 144*b4315306SDan Handley #define ARM_INSTANTIATE_LOCK 145*b4315306SDan Handley #define arm_lock_init() 146*b4315306SDan Handley #define arm_lock_get() 147*b4315306SDan Handley #define arm_lock_release() 148*b4315306SDan Handley 149*b4315306SDan Handley #endif /* IMAGE_BL31 */ 150*b4315306SDan Handley 151*b4315306SDan Handley 152*b4315306SDan Handley /* CCI utility functions */ 153*b4315306SDan Handley void arm_cci_init(void); 154*b4315306SDan Handley 155*b4315306SDan Handley /* IO storage utility functions */ 156*b4315306SDan Handley void arm_io_setup(void); 157*b4315306SDan Handley 158*b4315306SDan Handley /* Security utility functions */ 159*b4315306SDan Handley void arm_tzc_setup(void); 160*b4315306SDan Handley 161*b4315306SDan Handley /* PM utility functions */ 162*b4315306SDan Handley int32_t arm_do_affinst_actions(unsigned int afflvl, unsigned int state); 163*b4315306SDan Handley int arm_validate_power_state(unsigned int power_state); 164*b4315306SDan Handley 165*b4315306SDan Handley /* BL1 utility functions */ 166*b4315306SDan Handley void arm_bl1_early_platform_setup(void); 167*b4315306SDan Handley void arm_bl1_platform_setup(void); 168*b4315306SDan Handley void arm_bl1_plat_arch_setup(void); 169*b4315306SDan Handley 170*b4315306SDan Handley /* BL2 utility functions */ 171*b4315306SDan Handley void arm_bl2_early_platform_setup(meminfo_t *mem_layout); 172*b4315306SDan Handley void arm_bl2_platform_setup(void); 173*b4315306SDan Handley void arm_bl2_plat_arch_setup(void); 174*b4315306SDan Handley uint32_t arm_get_spsr_for_bl32_entry(void); 175*b4315306SDan Handley uint32_t arm_get_spsr_for_bl33_entry(void); 176*b4315306SDan Handley 177*b4315306SDan Handley /* BL3-1 utility functions */ 178*b4315306SDan Handley void arm_bl31_early_platform_setup(bl31_params_t *from_bl2, 179*b4315306SDan Handley void *plat_params_from_bl2); 180*b4315306SDan Handley void arm_bl31_platform_setup(void); 181*b4315306SDan Handley void arm_bl31_plat_arch_setup(void); 182*b4315306SDan Handley 183*b4315306SDan Handley /* TSP utility functions */ 184*b4315306SDan Handley void arm_tsp_early_platform_setup(void); 185*b4315306SDan Handley 186*b4315306SDan Handley 187*b4315306SDan Handley /* 188*b4315306SDan Handley * Mandatory functions required in ARM standard platforms 189*b4315306SDan Handley */ 190*b4315306SDan Handley void plat_arm_gic_init(void); 191*b4315306SDan Handley void plat_arm_security_setup(void); 192*b4315306SDan Handley void plat_arm_pwrc_setup(void); 193*b4315306SDan Handley 194*b4315306SDan Handley /* 195*b4315306SDan Handley * Optional functions required in ARM standard platforms 196*b4315306SDan Handley */ 197*b4315306SDan Handley void plat_arm_io_setup(void); 198*b4315306SDan Handley int plat_arm_get_alt_image_source( 199*b4315306SDan Handley const uintptr_t image_spec, 200*b4315306SDan Handley uintptr_t *dev_handle); 201*b4315306SDan Handley void plat_arm_topology_setup(void); 202*b4315306SDan Handley 203*b4315306SDan Handley 204*b4315306SDan Handley #endif /* __PLAT_ARM_H__ */ 205