xref: /rk3399_ARM-atf/include/plat/arm/common/plat_arm.h (revision 82cb2c1ad9897473743f08437d0a3995bed561b9)
1b4315306SDan Handley /*
2bf75a371SAntonio Nino Diaz  * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
3b4315306SDan Handley  *
4*82cb2c1aSdp-arm  * SPDX-License-Identifier: BSD-3-Clause
5b4315306SDan Handley  */
6b4315306SDan Handley #ifndef __PLAT_ARM_H__
7b4315306SDan Handley #define __PLAT_ARM_H__
8b4315306SDan Handley 
93b211ff5SAntonio Nino Diaz #include <arm_xlat_tables.h>
10b4315306SDan Handley #include <bakery_lock.h>
11b4315306SDan Handley #include <cassert.h>
12b4315306SDan Handley #include <cpu_data.h>
13b4315306SDan Handley #include <stdint.h>
1453d9c9c8SScott Branden #include <utils_def.h>
15b4315306SDan Handley 
16afc931f5SSandrine Bailleux /*******************************************************************************
17afc931f5SSandrine Bailleux  * Forward declarations
18afc931f5SSandrine Bailleux  ******************************************************************************/
19afc931f5SSandrine Bailleux struct bl31_params;
20afc931f5SSandrine Bailleux struct meminfo;
21a8aa7fecSYatharth Kochar struct image_info;
22afc931f5SSandrine Bailleux 
23b4315306SDan Handley #define ARM_CASSERT_MMAP						\
24b4315306SDan Handley 	CASSERT((ARRAY_SIZE(plat_arm_mmap) + ARM_BL_REGIONS)		\
25b4315306SDan Handley 		<= MAX_MMAP_REGIONS,					\
26b4315306SDan Handley 		assert_max_mmap_regions);
27b4315306SDan Handley 
28b4315306SDan Handley /*
29b4315306SDan Handley  * Utility functions common to ARM standard platforms
30b4315306SDan Handley  */
314c0d0390SSoby Mathew void arm_setup_page_tables(uintptr_t total_base,
324c0d0390SSoby Mathew 			size_t total_size,
334c0d0390SSoby Mathew 			uintptr_t code_start,
344c0d0390SSoby Mathew 			uintptr_t code_limit,
354c0d0390SSoby Mathew 			uintptr_t rodata_start,
364c0d0390SSoby Mathew 			uintptr_t rodata_limit
37b4315306SDan Handley #if USE_COHERENT_MEM
384c0d0390SSoby Mathew 			, uintptr_t coh_start,
394c0d0390SSoby Mathew 			uintptr_t coh_limit
40b4315306SDan Handley #endif
41b4315306SDan Handley );
42b4315306SDan Handley 
43e40e075fSSoby Mathew #if defined(IMAGE_BL31) || (defined(AARCH32) && defined(IMAGE_BL32))
44b4315306SDan Handley /*
45b4315306SDan Handley  * Use this macro to instantiate lock before it is used in below
46b4315306SDan Handley  * arm_lock_xxx() macros
47b4315306SDan Handley  */
48e25e6f41SVikram Kanigiri #define ARM_INSTANTIATE_LOCK	DEFINE_BAKERY_LOCK(arm_lock);
49b4315306SDan Handley 
50b4315306SDan Handley /*
51b4315306SDan Handley  * These are wrapper macros to the Coherent Memory Bakery Lock API.
52b4315306SDan Handley  */
53b4315306SDan Handley #define arm_lock_init()		bakery_lock_init(&arm_lock)
54b4315306SDan Handley #define arm_lock_get()		bakery_lock_get(&arm_lock)
55b4315306SDan Handley #define arm_lock_release()	bakery_lock_release(&arm_lock)
56b4315306SDan Handley 
57b4315306SDan Handley #else
58b4315306SDan Handley 
59b4315306SDan Handley /*
606f249345SYatharth Kochar  * Empty macros for all other BL stages other than BL31 and BL32
61b4315306SDan Handley  */
62b4315306SDan Handley #define ARM_INSTANTIATE_LOCK
63b4315306SDan Handley #define arm_lock_init()
64b4315306SDan Handley #define arm_lock_get()
65b4315306SDan Handley #define arm_lock_release()
66b4315306SDan Handley 
67e40e075fSSoby Mathew #endif /* defined(IMAGE_BL31) || (defined(AARCH32) && defined(IMAGE_BL32)) */
68b4315306SDan Handley 
692204afdeSSoby Mathew #if ARM_RECOM_STATE_ID_ENC
702204afdeSSoby Mathew /*
712204afdeSSoby Mathew  * Macros used to parse state information from State-ID if it is using the
722204afdeSSoby Mathew  * recommended encoding for State-ID.
732204afdeSSoby Mathew  */
742204afdeSSoby Mathew #define ARM_LOCAL_PSTATE_WIDTH		4
752204afdeSSoby Mathew #define ARM_LOCAL_PSTATE_MASK		((1 << ARM_LOCAL_PSTATE_WIDTH) - 1)
762204afdeSSoby Mathew 
772204afdeSSoby Mathew /* Macros to construct the composite power state */
782204afdeSSoby Mathew 
792204afdeSSoby Mathew /* Make composite power state parameter till power level 0 */
802204afdeSSoby Mathew #if PSCI_EXTENDED_STATE_ID
812204afdeSSoby Mathew 
822204afdeSSoby Mathew #define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \
832204afdeSSoby Mathew 		(((lvl0_state) << PSTATE_ID_SHIFT) | ((type) << PSTATE_TYPE_SHIFT))
842204afdeSSoby Mathew #else
852204afdeSSoby Mathew #define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \
862204afdeSSoby Mathew 		(((lvl0_state) << PSTATE_ID_SHIFT) | \
872204afdeSSoby Mathew 		((pwr_lvl) << PSTATE_PWR_LVL_SHIFT) | \
882204afdeSSoby Mathew 		((type) << PSTATE_TYPE_SHIFT))
892204afdeSSoby Mathew #endif /* __PSCI_EXTENDED_STATE_ID__ */
902204afdeSSoby Mathew 
912204afdeSSoby Mathew /* Make composite power state parameter till power level 1 */
922204afdeSSoby Mathew #define arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \
932204afdeSSoby Mathew 		(((lvl1_state) << ARM_LOCAL_PSTATE_WIDTH) | \
942204afdeSSoby Mathew 		arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type))
952204afdeSSoby Mathew 
965f3a6030SSoby Mathew /* Make composite power state parameter till power level 2 */
975f3a6030SSoby Mathew #define arm_make_pwrstate_lvl2(lvl2_state, lvl1_state, lvl0_state, pwr_lvl, type) \
985f3a6030SSoby Mathew 		(((lvl2_state) << (ARM_LOCAL_PSTATE_WIDTH * 2)) | \
995f3a6030SSoby Mathew 		arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type))
1005f3a6030SSoby Mathew 
1012204afdeSSoby Mathew #endif /* __ARM_RECOM_STATE_ID_ENC__ */
1022204afdeSSoby Mathew 
103b4315306SDan Handley 
104b4315306SDan Handley /* IO storage utility functions */
105b4315306SDan Handley void arm_io_setup(void);
106b4315306SDan Handley 
107b4315306SDan Handley /* Security utility functions */
10857f78201SSoby Mathew void arm_tzc400_setup(void);
109618f0feeSVikram Kanigiri struct tzc_dmc500_driver_data;
110618f0feeSVikram Kanigiri void arm_tzc_dmc500_setup(struct tzc_dmc500_driver_data *plat_driver_data);
111b4315306SDan Handley 
112c1bb8a05SSoby Mathew /* Systimer utility function */
113c1bb8a05SSoby Mathew void arm_configure_sys_timer(void);
114c1bb8a05SSoby Mathew 
115b4315306SDan Handley /* PM utility functions */
11638dce70fSSoby Mathew int arm_validate_power_state(unsigned int power_state,
11738dce70fSSoby Mathew 			    psci_power_state_t *req_state);
118f9e858b1SSoby Mathew int arm_validate_ns_entrypoint(uintptr_t entrypoint);
119c1bb8a05SSoby Mathew void arm_system_pwr_domain_resume(void);
1204c117f6cSSandrine Bailleux void arm_program_trusted_mailbox(uintptr_t address);
12138dce70fSSoby Mathew 
12238dce70fSSoby Mathew /* Topology utility function */
12338dce70fSSoby Mathew int arm_check_mpidr(u_register_t mpidr);
124b4315306SDan Handley 
125b4315306SDan Handley /* BL1 utility functions */
126b4315306SDan Handley void arm_bl1_early_platform_setup(void);
127b4315306SDan Handley void arm_bl1_platform_setup(void);
128b4315306SDan Handley void arm_bl1_plat_arch_setup(void);
129b4315306SDan Handley 
130b4315306SDan Handley /* BL2 utility functions */
131afc931f5SSandrine Bailleux void arm_bl2_early_platform_setup(struct meminfo *mem_layout);
132b4315306SDan Handley void arm_bl2_platform_setup(void);
133b4315306SDan Handley void arm_bl2_plat_arch_setup(void);
134b4315306SDan Handley uint32_t arm_get_spsr_for_bl32_entry(void);
135b4315306SDan Handley uint32_t arm_get_spsr_for_bl33_entry(void);
13607570d59SYatharth Kochar int arm_bl2_handle_post_image_load(unsigned int image_id);
137b4315306SDan Handley 
138dcda29f6SYatharth Kochar /* BL2U utility functions */
139dcda29f6SYatharth Kochar void arm_bl2u_early_platform_setup(struct meminfo *mem_layout,
140dcda29f6SYatharth Kochar 				void *plat_info);
141dcda29f6SYatharth Kochar void arm_bl2u_platform_setup(void);
142dcda29f6SYatharth Kochar void arm_bl2u_plat_arch_setup(void);
143dcda29f6SYatharth Kochar 
144d178637dSJuan Castillo /* BL31 utility functions */
145a8aa7fecSYatharth Kochar #if LOAD_IMAGE_V2
146a8aa7fecSYatharth Kochar void arm_bl31_early_platform_setup(void *from_bl2,
147a8aa7fecSYatharth Kochar 				void *plat_params_from_bl2);
148a8aa7fecSYatharth Kochar #else
149afc931f5SSandrine Bailleux void arm_bl31_early_platform_setup(struct bl31_params *from_bl2,
150b4315306SDan Handley 				void *plat_params_from_bl2);
151a8aa7fecSYatharth Kochar #endif /* LOAD_IMAGE_V2 */
152b4315306SDan Handley void arm_bl31_platform_setup(void);
153080225daSSoby Mathew void arm_bl31_plat_runtime_setup(void);
154b4315306SDan Handley void arm_bl31_plat_arch_setup(void);
155b4315306SDan Handley 
156b4315306SDan Handley /* TSP utility functions */
157b4315306SDan Handley void arm_tsp_early_platform_setup(void);
158b4315306SDan Handley 
159181bbd41SSoby Mathew /* SP_MIN utility functions */
160d9915518SYatharth Kochar void arm_sp_min_early_platform_setup(void *from_bl2,
161d9915518SYatharth Kochar 		void *plat_params_from_bl2);
162181bbd41SSoby Mathew 
163436223deSYatharth Kochar /* FIP TOC validity check */
164436223deSYatharth Kochar int arm_io_is_toc_valid(void);
165b4315306SDan Handley 
166b4315306SDan Handley /*
167b4315306SDan Handley  * Mandatory functions required in ARM standard platforms
168b4315306SDan Handley  */
1690108047aSSoby Mathew unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr);
17027573c59SAchin Gupta void plat_arm_gic_driver_init(void);
171b4315306SDan Handley void plat_arm_gic_init(void);
17227573c59SAchin Gupta void plat_arm_gic_cpuif_enable(void);
17327573c59SAchin Gupta void plat_arm_gic_cpuif_disable(void);
174d17b953aSJeenu Viswambharan void plat_arm_gic_redistif_on(void);
175d17b953aSJeenu Viswambharan void plat_arm_gic_redistif_off(void);
17627573c59SAchin Gupta void plat_arm_gic_pcpu_init(void);
177b4315306SDan Handley void plat_arm_security_setup(void);
178b4315306SDan Handley void plat_arm_pwrc_setup(void);
1796355f234SVikram Kanigiri void plat_arm_interconnect_init(void);
1806355f234SVikram Kanigiri void plat_arm_interconnect_enter_coherency(void);
1816355f234SVikram Kanigiri void plat_arm_interconnect_exit_coherency(void);
182b4315306SDan Handley 
183d8d6cf24SSummer Qin #if ARM_PLAT_MT
184d8d6cf24SSummer Qin unsigned int plat_arm_get_cpu_pe_count(u_register_t mpidr);
185d8d6cf24SSummer Qin #endif
186d8d6cf24SSummer Qin 
187a8aa7fecSYatharth Kochar #if LOAD_IMAGE_V2
188a8aa7fecSYatharth Kochar /*
189a8aa7fecSYatharth Kochar  * This function is called after loading SCP_BL2 image and it is used to perform
190a8aa7fecSYatharth Kochar  * any platform-specific actions required to handle the SCP firmware.
191a8aa7fecSYatharth Kochar  */
192a8aa7fecSYatharth Kochar int plat_arm_bl2_handle_scp_bl2(struct image_info *scp_bl2_image_info);
193a8aa7fecSYatharth Kochar #endif
194a8aa7fecSYatharth Kochar 
195b4315306SDan Handley /*
196b4315306SDan Handley  * Optional functions required in ARM standard platforms
197b4315306SDan Handley  */
198b4315306SDan Handley void plat_arm_io_setup(void);
199b4315306SDan Handley int plat_arm_get_alt_image_source(
20016948ae1SJuan Castillo 	unsigned int image_id,
20116948ae1SJuan Castillo 	uintptr_t *dev_handle,
20216948ae1SJuan Castillo 	uintptr_t *image_spec);
20338dce70fSSoby Mathew unsigned int plat_arm_calc_core_pos(u_register_t mpidr);
20465cb1c4cSVikram Kanigiri const mmap_region_t *plat_arm_get_mmap(void);
205b4315306SDan Handley 
2065486a965SSoby Mathew /* Allow platform to override psci_pm_ops during runtime */
2075486a965SSoby Mathew const plat_psci_ops_t *plat_arm_psci_override_pm_ops(plat_psci_ops_t *ops);
2085486a965SSoby Mathew 
209b4315306SDan Handley #endif /* __PLAT_ARM_H__ */
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