xref: /rk3399_ARM-atf/include/plat/arm/common/plat_arm.h (revision 181bbd41fbcd65d4c75cf572ab4007b0c16ffddb)
1b4315306SDan Handley /*
265cb1c4cSVikram Kanigiri  * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
3b4315306SDan Handley  *
4b4315306SDan Handley  * Redistribution and use in source and binary forms, with or without
5b4315306SDan Handley  * modification, are permitted provided that the following conditions are met:
6b4315306SDan Handley  *
7b4315306SDan Handley  * Redistributions of source code must retain the above copyright notice, this
8b4315306SDan Handley  * list of conditions and the following disclaimer.
9b4315306SDan Handley  *
10b4315306SDan Handley  * Redistributions in binary form must reproduce the above copyright notice,
11b4315306SDan Handley  * this list of conditions and the following disclaimer in the documentation
12b4315306SDan Handley  * and/or other materials provided with the distribution.
13b4315306SDan Handley  *
14b4315306SDan Handley  * Neither the name of ARM nor the names of its contributors may be used
15b4315306SDan Handley  * to endorse or promote products derived from this software without specific
16b4315306SDan Handley  * prior written permission.
17b4315306SDan Handley  *
18b4315306SDan Handley  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19b4315306SDan Handley  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20b4315306SDan Handley  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21b4315306SDan Handley  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22b4315306SDan Handley  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23b4315306SDan Handley  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24b4315306SDan Handley  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25b4315306SDan Handley  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26b4315306SDan Handley  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27b4315306SDan Handley  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28b4315306SDan Handley  * POSSIBILITY OF SUCH DAMAGE.
29b4315306SDan Handley  */
30b4315306SDan Handley #ifndef __PLAT_ARM_H__
31b4315306SDan Handley #define __PLAT_ARM_H__
32b4315306SDan Handley 
33b4315306SDan Handley #include <bakery_lock.h>
34b4315306SDan Handley #include <cassert.h>
35b4315306SDan Handley #include <cpu_data.h>
36b4315306SDan Handley #include <stdint.h>
37ed81f3ebSSandrine Bailleux #include <utils.h>
388f6623f0SSoby Mathew #include <xlat_tables.h>
39b4315306SDan Handley 
40b4315306SDan Handley #define ARM_CASSERT_MMAP						\
41b4315306SDan Handley 	CASSERT((ARRAY_SIZE(plat_arm_mmap) + ARM_BL_REGIONS)		\
42b4315306SDan Handley 		<= MAX_MMAP_REGIONS,					\
43b4315306SDan Handley 		assert_max_mmap_regions);
44b4315306SDan Handley 
45b4315306SDan Handley /*
46b4315306SDan Handley  * Utility functions common to ARM standard platforms
47b4315306SDan Handley  */
484c0d0390SSoby Mathew void arm_setup_page_tables(uintptr_t total_base,
494c0d0390SSoby Mathew 			size_t total_size,
504c0d0390SSoby Mathew 			uintptr_t code_start,
514c0d0390SSoby Mathew 			uintptr_t code_limit,
524c0d0390SSoby Mathew 			uintptr_t rodata_start,
534c0d0390SSoby Mathew 			uintptr_t rodata_limit
54b4315306SDan Handley #if USE_COHERENT_MEM
554c0d0390SSoby Mathew 			, uintptr_t coh_start,
564c0d0390SSoby Mathew 			uintptr_t coh_limit
57b4315306SDan Handley #endif
58b4315306SDan Handley );
59b4315306SDan Handley 
60b4315306SDan Handley #if IMAGE_BL31
61b4315306SDan Handley /*
62b4315306SDan Handley  * Use this macro to instantiate lock before it is used in below
63b4315306SDan Handley  * arm_lock_xxx() macros
64b4315306SDan Handley  */
65e25e6f41SVikram Kanigiri #define ARM_INSTANTIATE_LOCK	DEFINE_BAKERY_LOCK(arm_lock);
66b4315306SDan Handley 
67b4315306SDan Handley /*
68b4315306SDan Handley  * These are wrapper macros to the Coherent Memory Bakery Lock API.
69b4315306SDan Handley  */
70b4315306SDan Handley #define arm_lock_init()		bakery_lock_init(&arm_lock)
71b4315306SDan Handley #define arm_lock_get()		bakery_lock_get(&arm_lock)
72b4315306SDan Handley #define arm_lock_release()	bakery_lock_release(&arm_lock)
73b4315306SDan Handley 
74b4315306SDan Handley #else
75b4315306SDan Handley 
76b4315306SDan Handley /*
77d178637dSJuan Castillo  * Empty macros for all other BL stages other than BL31
78b4315306SDan Handley  */
79b4315306SDan Handley #define ARM_INSTANTIATE_LOCK
80b4315306SDan Handley #define arm_lock_init()
81b4315306SDan Handley #define arm_lock_get()
82b4315306SDan Handley #define arm_lock_release()
83b4315306SDan Handley 
84b4315306SDan Handley #endif /* IMAGE_BL31 */
85b4315306SDan Handley 
862204afdeSSoby Mathew #if ARM_RECOM_STATE_ID_ENC
872204afdeSSoby Mathew /*
882204afdeSSoby Mathew  * Macros used to parse state information from State-ID if it is using the
892204afdeSSoby Mathew  * recommended encoding for State-ID.
902204afdeSSoby Mathew  */
912204afdeSSoby Mathew #define ARM_LOCAL_PSTATE_WIDTH		4
922204afdeSSoby Mathew #define ARM_LOCAL_PSTATE_MASK		((1 << ARM_LOCAL_PSTATE_WIDTH) - 1)
932204afdeSSoby Mathew 
942204afdeSSoby Mathew /* Macros to construct the composite power state */
952204afdeSSoby Mathew 
962204afdeSSoby Mathew /* Make composite power state parameter till power level 0 */
972204afdeSSoby Mathew #if PSCI_EXTENDED_STATE_ID
982204afdeSSoby Mathew 
992204afdeSSoby Mathew #define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \
1002204afdeSSoby Mathew 		(((lvl0_state) << PSTATE_ID_SHIFT) | ((type) << PSTATE_TYPE_SHIFT))
1012204afdeSSoby Mathew #else
1022204afdeSSoby Mathew #define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \
1032204afdeSSoby Mathew 		(((lvl0_state) << PSTATE_ID_SHIFT) | \
1042204afdeSSoby Mathew 		((pwr_lvl) << PSTATE_PWR_LVL_SHIFT) | \
1052204afdeSSoby Mathew 		((type) << PSTATE_TYPE_SHIFT))
1062204afdeSSoby Mathew #endif /* __PSCI_EXTENDED_STATE_ID__ */
1072204afdeSSoby Mathew 
1082204afdeSSoby Mathew /* Make composite power state parameter till power level 1 */
1092204afdeSSoby Mathew #define arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \
1102204afdeSSoby Mathew 		(((lvl1_state) << ARM_LOCAL_PSTATE_WIDTH) | \
1112204afdeSSoby Mathew 		arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type))
1122204afdeSSoby Mathew 
1135f3a6030SSoby Mathew /* Make composite power state parameter till power level 2 */
1145f3a6030SSoby Mathew #define arm_make_pwrstate_lvl2(lvl2_state, lvl1_state, lvl0_state, pwr_lvl, type) \
1155f3a6030SSoby Mathew 		(((lvl2_state) << (ARM_LOCAL_PSTATE_WIDTH * 2)) | \
1165f3a6030SSoby Mathew 		arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type))
1175f3a6030SSoby Mathew 
1182204afdeSSoby Mathew #endif /* __ARM_RECOM_STATE_ID_ENC__ */
1192204afdeSSoby Mathew 
120b4315306SDan Handley 
121b4315306SDan Handley /* IO storage utility functions */
122b4315306SDan Handley void arm_io_setup(void);
123b4315306SDan Handley 
124b4315306SDan Handley /* Security utility functions */
12557f78201SSoby Mathew void arm_tzc400_setup(void);
126618f0feeSVikram Kanigiri struct tzc_dmc500_driver_data;
127618f0feeSVikram Kanigiri void arm_tzc_dmc500_setup(struct tzc_dmc500_driver_data *plat_driver_data);
128b4315306SDan Handley 
129c1bb8a05SSoby Mathew /* Systimer utility function */
130c1bb8a05SSoby Mathew void arm_configure_sys_timer(void);
131c1bb8a05SSoby Mathew 
132b4315306SDan Handley /* PM utility functions */
13338dce70fSSoby Mathew int arm_validate_power_state(unsigned int power_state,
13438dce70fSSoby Mathew 			    psci_power_state_t *req_state);
135f9e858b1SSoby Mathew int arm_validate_ns_entrypoint(uintptr_t entrypoint);
136c1bb8a05SSoby Mathew void arm_system_pwr_domain_resume(void);
1374c117f6cSSandrine Bailleux void arm_program_trusted_mailbox(uintptr_t address);
13838dce70fSSoby Mathew 
13938dce70fSSoby Mathew /* Topology utility function */
14038dce70fSSoby Mathew int arm_check_mpidr(u_register_t mpidr);
141b4315306SDan Handley 
142b4315306SDan Handley /* BL1 utility functions */
143b4315306SDan Handley void arm_bl1_early_platform_setup(void);
144b4315306SDan Handley void arm_bl1_platform_setup(void);
145b4315306SDan Handley void arm_bl1_plat_arch_setup(void);
146b4315306SDan Handley 
147b4315306SDan Handley /* BL2 utility functions */
148b4315306SDan Handley void arm_bl2_early_platform_setup(meminfo_t *mem_layout);
149b4315306SDan Handley void arm_bl2_platform_setup(void);
150b4315306SDan Handley void arm_bl2_plat_arch_setup(void);
151b4315306SDan Handley uint32_t arm_get_spsr_for_bl32_entry(void);
152b4315306SDan Handley uint32_t arm_get_spsr_for_bl33_entry(void);
153b4315306SDan Handley 
154dcda29f6SYatharth Kochar /* BL2U utility functions */
155dcda29f6SYatharth Kochar void arm_bl2u_early_platform_setup(struct meminfo *mem_layout,
156dcda29f6SYatharth Kochar 				void *plat_info);
157dcda29f6SYatharth Kochar void arm_bl2u_platform_setup(void);
158dcda29f6SYatharth Kochar void arm_bl2u_plat_arch_setup(void);
159dcda29f6SYatharth Kochar 
160d178637dSJuan Castillo /* BL31 utility functions */
161b4315306SDan Handley void arm_bl31_early_platform_setup(bl31_params_t *from_bl2,
162b4315306SDan Handley 				void *plat_params_from_bl2);
163b4315306SDan Handley void arm_bl31_platform_setup(void);
164080225daSSoby Mathew void arm_bl31_plat_runtime_setup(void);
165b4315306SDan Handley void arm_bl31_plat_arch_setup(void);
166b4315306SDan Handley 
167b4315306SDan Handley /* TSP utility functions */
168b4315306SDan Handley void arm_tsp_early_platform_setup(void);
169b4315306SDan Handley 
170*181bbd41SSoby Mathew /* SP_MIN utility functions */
171*181bbd41SSoby Mathew void arm_sp_min_early_platform_setup(void);
172*181bbd41SSoby Mathew 
173436223deSYatharth Kochar /* FIP TOC validity check */
174436223deSYatharth Kochar int arm_io_is_toc_valid(void);
175b4315306SDan Handley 
176b4315306SDan Handley /*
177b4315306SDan Handley  * Mandatory functions required in ARM standard platforms
178b4315306SDan Handley  */
1790108047aSSoby Mathew unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr);
18027573c59SAchin Gupta void plat_arm_gic_driver_init(void);
181b4315306SDan Handley void plat_arm_gic_init(void);
18227573c59SAchin Gupta void plat_arm_gic_cpuif_enable(void);
18327573c59SAchin Gupta void plat_arm_gic_cpuif_disable(void);
18427573c59SAchin Gupta void plat_arm_gic_pcpu_init(void);
185b4315306SDan Handley void plat_arm_security_setup(void);
186b4315306SDan Handley void plat_arm_pwrc_setup(void);
1876355f234SVikram Kanigiri void plat_arm_interconnect_init(void);
1886355f234SVikram Kanigiri void plat_arm_interconnect_enter_coherency(void);
1896355f234SVikram Kanigiri void plat_arm_interconnect_exit_coherency(void);
190b4315306SDan Handley 
191b4315306SDan Handley /*
192b4315306SDan Handley  * Optional functions required in ARM standard platforms
193b4315306SDan Handley  */
194b4315306SDan Handley void plat_arm_io_setup(void);
195b4315306SDan Handley int plat_arm_get_alt_image_source(
19616948ae1SJuan Castillo 	unsigned int image_id,
19716948ae1SJuan Castillo 	uintptr_t *dev_handle,
19816948ae1SJuan Castillo 	uintptr_t *image_spec);
19938dce70fSSoby Mathew unsigned int plat_arm_calc_core_pos(u_register_t mpidr);
20065cb1c4cSVikram Kanigiri const mmap_region_t *plat_arm_get_mmap(void);
201b4315306SDan Handley 
202b4315306SDan Handley #endif /* __PLAT_ARM_H__ */
203