1*76a21174SMikael Olsson /* 2*76a21174SMikael Olsson * Copyright (c) 2021, Arm Limited. All rights reserved. 3*76a21174SMikael Olsson * 4*76a21174SMikael Olsson * SPDX-License-Identifier: BSD-3-Clause 5*76a21174SMikael Olsson */ 6*76a21174SMikael Olsson 7*76a21174SMikael Olsson #ifndef FCONF_ETHOSN_GETTER_H 8*76a21174SMikael Olsson #define FCONF_ETHOSN_GETTER_H 9*76a21174SMikael Olsson 10*76a21174SMikael Olsson #include <assert.h> 11*76a21174SMikael Olsson 12*76a21174SMikael Olsson #include <lib/fconf/fconf.h> 13*76a21174SMikael Olsson 14*76a21174SMikael Olsson #define hw_config__ethosn_config_getter(prop) ethosn_config.prop 15*76a21174SMikael Olsson #define hw_config__ethosn_core_addr_getter(idx) __extension__ ({ \ 16*76a21174SMikael Olsson assert(idx < ethosn_config.num_cores); \ 17*76a21174SMikael Olsson ethosn_config.core_addr[idx]; \ 18*76a21174SMikael Olsson }) 19*76a21174SMikael Olsson 20*76a21174SMikael Olsson #define ETHOSN_STATUS_DISABLED U(0) 21*76a21174SMikael Olsson #define ETHOSN_STATUS_ENABLED U(1) 22*76a21174SMikael Olsson 23*76a21174SMikael Olsson #define ETHOSN_CORE_NUM_MAX U(64) 24*76a21174SMikael Olsson 25*76a21174SMikael Olsson struct ethosn_config_t { 26*76a21174SMikael Olsson uint8_t status; 27*76a21174SMikael Olsson uint32_t num_cores; 28*76a21174SMikael Olsson uint64_t core_addr[ETHOSN_CORE_NUM_MAX]; 29*76a21174SMikael Olsson }; 30*76a21174SMikael Olsson 31*76a21174SMikael Olsson int fconf_populate_arm_ethosn(uintptr_t config); 32*76a21174SMikael Olsson 33*76a21174SMikael Olsson extern struct ethosn_config_t ethosn_config; 34*76a21174SMikael Olsson 35*76a21174SMikael Olsson #endif /* FCONF_ETHOSN_GETTER_H */ 36