1/* 2 * Copyright (c) 2017-2023, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6#ifndef ARM_TZC_DRAM_LD_S 7#define ARM_TZC_DRAM_LD_S 8 9#include <lib/xlat_tables/xlat_tables_defs.h> 10 11MEMORY { 12 EL3_SEC_DRAM (rw): ORIGIN = ARM_EL3_TZC_DRAM1_BASE, LENGTH = ARM_EL3_TZC_DRAM1_SIZE 13} 14 15SECTIONS 16{ 17 . = ARM_EL3_TZC_DRAM1_BASE; 18 ASSERT(. == ALIGN(PAGE_SIZE), 19 "ARM_EL3_TZC_DRAM_BASE address is not aligned on a page boundary.") 20 .el3_tzc_dram (NOLOAD) : ALIGN(PAGE_SIZE) { 21 __PLAT_SPMC_SHMEM_DATASTORE_START__ = .; 22 *(.arm_spmc_shmem_datastore) 23 __PLAT_SPMC_SHMEM_DATASTORE_END__ = .; 24 __EL3_SEC_DRAM_START__ = .; 25 *(.arm_el3_tzc_dram) 26 __EL3_SEC_DRAM_UNALIGNED_END__ = .; 27 28 . = ALIGN(PAGE_SIZE); 29 __EL3_SEC_DRAM_END__ = .; 30 } >EL3_SEC_DRAM 31} 32 33#endif /* ARM_TZC_DRAM_LD_S */ 34