xref: /rk3399_ARM-atf/include/plat/arm/common/aarch64/cci_macros.S (revision 6355f2347aec8bf6ad74867c2b0c996e10546ad4)
1*6355f234SVikram Kanigiri/*
2*6355f234SVikram Kanigiri * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
3*6355f234SVikram Kanigiri *
4*6355f234SVikram Kanigiri * Redistribution and use in source and binary forms, with or without
5*6355f234SVikram Kanigiri * modification, are permitted provided that the following conditions are met:
6*6355f234SVikram Kanigiri *
7*6355f234SVikram Kanigiri * Redistributions of source code must retain the above copyright notice, this
8*6355f234SVikram Kanigiri * list of conditions and the following disclaimer.
9*6355f234SVikram Kanigiri *
10*6355f234SVikram Kanigiri * Redistributions in binary form must reproduce the above copyright notice,
11*6355f234SVikram Kanigiri * this list of conditions and the following disclaimer in the documentation
12*6355f234SVikram Kanigiri * and/or other materials provided with the distribution.
13*6355f234SVikram Kanigiri *
14*6355f234SVikram Kanigiri * Neither the name of ARM nor the names of its contributors may be used
15*6355f234SVikram Kanigiri * to endorse or promote products derived from this software without specific
16*6355f234SVikram Kanigiri * prior written permission.
17*6355f234SVikram Kanigiri *
18*6355f234SVikram Kanigiri * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19*6355f234SVikram Kanigiri * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20*6355f234SVikram Kanigiri * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21*6355f234SVikram Kanigiri * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22*6355f234SVikram Kanigiri * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23*6355f234SVikram Kanigiri * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24*6355f234SVikram Kanigiri * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25*6355f234SVikram Kanigiri * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26*6355f234SVikram Kanigiri * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27*6355f234SVikram Kanigiri * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28*6355f234SVikram Kanigiri * POSSIBILITY OF SUCH DAMAGE.
29*6355f234SVikram Kanigiri */
30*6355f234SVikram Kanigiri#ifndef __CCI_MACROS_S__
31*6355f234SVikram Kanigiri#define __CCI_MACROS_S__
32*6355f234SVikram Kanigiri
33*6355f234SVikram Kanigiri#include <cci.h>
34*6355f234SVikram Kanigiri#include <platform_def.h>
35*6355f234SVikram Kanigiri
36*6355f234SVikram Kanigiri.section .rodata.cci_reg_name, "aS"
37*6355f234SVikram Kanigiricci_iface_regs:
38*6355f234SVikram Kanigiri	.asciz "cci_snoop_ctrl_cluster0", "cci_snoop_ctrl_cluster1" , ""
39*6355f234SVikram Kanigiri
40*6355f234SVikram Kanigiri	/* ------------------------------------------------
41*6355f234SVikram Kanigiri	 * The below required platform porting macro prints
42*6355f234SVikram Kanigiri	 * out relevant interconnect registers whenever an
43*6355f234SVikram Kanigiri	 * unhandled exception is taken in BL31.
44*6355f234SVikram Kanigiri	 * Clobbers: x0 - x9, sp
45*6355f234SVikram Kanigiri	 * ------------------------------------------------
46*6355f234SVikram Kanigiri	 */
47*6355f234SVikram Kanigiri	.macro plat_print_interconnect_regs
48*6355f234SVikram Kanigiri	adr	x6, cci_iface_regs
49*6355f234SVikram Kanigiri	/* Store in x7 the base address of the first interface */
50*6355f234SVikram Kanigiri	mov_imm	x7, (PLAT_ARM_CCI_BASE + SLAVE_IFACE_OFFSET(	\
51*6355f234SVikram Kanigiri			PLAT_ARM_CCI_CLUSTER0_SL_IFACE_IX))
52*6355f234SVikram Kanigiri	ldr	w8, [x7, #SNOOP_CTRL_REG]
53*6355f234SVikram Kanigiri	/* Store in x7 the base address of the second interface */
54*6355f234SVikram Kanigiri	mov_imm	x7, (PLAT_ARM_CCI_BASE + SLAVE_IFACE_OFFSET(	\
55*6355f234SVikram Kanigiri			PLAT_ARM_CCI_CLUSTER1_SL_IFACE_IX))
56*6355f234SVikram Kanigiri	ldr	w9, [x7, #SNOOP_CTRL_REG]
57*6355f234SVikram Kanigiri	/* Store to the crash buf and print to console */
58*6355f234SVikram Kanigiri	bl	str_in_crash_buf_print
59*6355f234SVikram Kanigiri	.endm
60*6355f234SVikram Kanigiri
61*6355f234SVikram Kanigiri#endif /* __CCI_MACROS_S__ */
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