xref: /rk3399_ARM-atf/include/plat/arm/common/aarch64/arm_macros.S (revision b4315306ada18bac1c74f34db717d22fd5ff3003)
1*b4315306SDan Handley/*
2*b4315306SDan Handley * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
3*b4315306SDan Handley *
4*b4315306SDan Handley * Redistribution and use in source and binary forms, with or without
5*b4315306SDan Handley * modification, are permitted provided that the following conditions are met:
6*b4315306SDan Handley *
7*b4315306SDan Handley * Redistributions of source code must retain the above copyright notice, this
8*b4315306SDan Handley * list of conditions and the following disclaimer.
9*b4315306SDan Handley *
10*b4315306SDan Handley * Redistributions in binary form must reproduce the above copyright notice,
11*b4315306SDan Handley * this list of conditions and the following disclaimer in the documentation
12*b4315306SDan Handley * and/or other materials provided with the distribution.
13*b4315306SDan Handley *
14*b4315306SDan Handley * Neither the name of ARM nor the names of its contributors may be used
15*b4315306SDan Handley * to endorse or promote products derived from this software without specific
16*b4315306SDan Handley * prior written permission.
17*b4315306SDan Handley *
18*b4315306SDan Handley * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19*b4315306SDan Handley * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20*b4315306SDan Handley * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21*b4315306SDan Handley * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22*b4315306SDan Handley * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23*b4315306SDan Handley * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24*b4315306SDan Handley * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25*b4315306SDan Handley * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26*b4315306SDan Handley * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27*b4315306SDan Handley * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28*b4315306SDan Handley * POSSIBILITY OF SUCH DAMAGE.
29*b4315306SDan Handley */
30*b4315306SDan Handley#ifndef __ARM_MACROS_S__
31*b4315306SDan Handley#define __ARM_MACROS_S__
32*b4315306SDan Handley
33*b4315306SDan Handley#include <cci.h>
34*b4315306SDan Handley#include <gic_v2.h>
35*b4315306SDan Handley#include <platform_def.h>
36*b4315306SDan Handley
37*b4315306SDan Handley.section .rodata.gic_reg_name, "aS"
38*b4315306SDan Handleygicc_regs:
39*b4315306SDan Handley	.asciz "gicc_hppir", "gicc_ahppir", "gicc_ctlr", ""
40*b4315306SDan Handleygicd_pend_reg:
41*b4315306SDan Handley	.asciz "gicd_ispendr regs (Offsets 0x200 - 0x278)\n"	\
42*b4315306SDan Handley		" Offset:\t\t\tvalue\n"
43*b4315306SDan Handleynewline:
44*b4315306SDan Handley	.asciz "\n"
45*b4315306SDan Handleyspacer:
46*b4315306SDan Handley	.asciz ":\t\t0x"
47*b4315306SDan Handley
48*b4315306SDan Handley	/* ---------------------------------------------
49*b4315306SDan Handley	 * The below utility macro prints out relevant GIC
50*b4315306SDan Handley	 * registers whenever an unhandled exception is
51*b4315306SDan Handley	 * taken in BL3-1 on ARM standard platforms.
52*b4315306SDan Handley	 * Expects: GICD base in x16, GICC base in x17
53*b4315306SDan Handley	 * Clobbers: x0 - x10, sp
54*b4315306SDan Handley	 * ---------------------------------------------
55*b4315306SDan Handley	 */
56*b4315306SDan Handley	.macro arm_print_gic_regs
57*b4315306SDan Handley	/* Load the gicc reg list to x6 */
58*b4315306SDan Handley	adr	x6, gicc_regs
59*b4315306SDan Handley	/* Load the gicc regs to gp regs used by str_in_crash_buf_print */
60*b4315306SDan Handley	ldr	w8, [x17, #GICC_HPPIR]
61*b4315306SDan Handley	ldr	w9, [x17, #GICC_AHPPIR]
62*b4315306SDan Handley	ldr	w10, [x17, #GICC_CTLR]
63*b4315306SDan Handley	/* Store to the crash buf and print to console */
64*b4315306SDan Handley	bl	str_in_crash_buf_print
65*b4315306SDan Handley
66*b4315306SDan Handley	/* Print the GICD_ISPENDR regs */
67*b4315306SDan Handley	add	x7, x16, #GICD_ISPENDR
68*b4315306SDan Handley	adr	x4, gicd_pend_reg
69*b4315306SDan Handley	bl	asm_print_str
70*b4315306SDan Handleygicd_ispendr_loop:
71*b4315306SDan Handley	sub	x4, x7, x16
72*b4315306SDan Handley	cmp	x4, #0x280
73*b4315306SDan Handley	b.eq	exit_print_gic_regs
74*b4315306SDan Handley	bl	asm_print_hex
75*b4315306SDan Handley
76*b4315306SDan Handley	adr	x4, spacer
77*b4315306SDan Handley	bl	asm_print_str
78*b4315306SDan Handley
79*b4315306SDan Handley	ldr	x4, [x7], #8
80*b4315306SDan Handley	bl	asm_print_hex
81*b4315306SDan Handley
82*b4315306SDan Handley	adr	x4, newline
83*b4315306SDan Handley	bl	asm_print_str
84*b4315306SDan Handley	b	gicd_ispendr_loop
85*b4315306SDan Handleyexit_print_gic_regs:
86*b4315306SDan Handley	.endm
87*b4315306SDan Handley
88*b4315306SDan Handley
89*b4315306SDan Handley.section .rodata.cci_reg_name, "aS"
90*b4315306SDan Handleycci_iface_regs:
91*b4315306SDan Handley	.asciz "cci_snoop_ctrl_cluster0", "cci_snoop_ctrl_cluster1" , ""
92*b4315306SDan Handley
93*b4315306SDan Handley	/* ------------------------------------------------
94*b4315306SDan Handley	 * The below required platform porting macro prints
95*b4315306SDan Handley	 * out relevant interconnect registers whenever an
96*b4315306SDan Handley	 * unhandled exception is taken in BL3-1.
97*b4315306SDan Handley	 * Clobbers: x0 - x9, sp
98*b4315306SDan Handley	 * ------------------------------------------------
99*b4315306SDan Handley	 */
100*b4315306SDan Handley	.macro plat_print_interconnect_regs
101*b4315306SDan Handley	adr	x6, cci_iface_regs
102*b4315306SDan Handley	/* Store in x7 the base address of the first interface */
103*b4315306SDan Handley	mov_imm	x7, (PLAT_ARM_CCI_BASE + SLAVE_IFACE_OFFSET(	\
104*b4315306SDan Handley			PLAT_ARM_CCI_CLUSTER0_SL_IFACE_IX))
105*b4315306SDan Handley	ldr	w8, [x7, #SNOOP_CTRL_REG]
106*b4315306SDan Handley	/* Store in x7 the base address of the second interface */
107*b4315306SDan Handley	mov_imm	x7, (PLAT_ARM_CCI_BASE + SLAVE_IFACE_OFFSET(	\
108*b4315306SDan Handley			PLAT_ARM_CCI_CLUSTER1_SL_IFACE_IX))
109*b4315306SDan Handley	ldr	w9, [x7, #SNOOP_CTRL_REG]
110*b4315306SDan Handley	/* Store to the crash buf and print to console */
111*b4315306SDan Handley	bl	str_in_crash_buf_print
112*b4315306SDan Handley	.endm
113*b4315306SDan Handley
114*b4315306SDan Handley
115*b4315306SDan Handley#endif /* __ARM_MACROS_S__ */
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