1*b4315306SDan Handley /* 2*b4315306SDan Handley * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. 3*b4315306SDan Handley * 4*b4315306SDan Handley * Redistribution and use in source and binary forms, with or without 5*b4315306SDan Handley * modification, are permitted provided that the following conditions are met: 6*b4315306SDan Handley * 7*b4315306SDan Handley * Redistributions of source code must retain the above copyright notice, this 8*b4315306SDan Handley * list of conditions and the following disclaimer. 9*b4315306SDan Handley * 10*b4315306SDan Handley * Redistributions in binary form must reproduce the above copyright notice, 11*b4315306SDan Handley * this list of conditions and the following disclaimer in the documentation 12*b4315306SDan Handley * and/or other materials provided with the distribution. 13*b4315306SDan Handley * 14*b4315306SDan Handley * Neither the name of ARM nor the names of its contributors may be used 15*b4315306SDan Handley * to endorse or promote products derived from this software without specific 16*b4315306SDan Handley * prior written permission. 17*b4315306SDan Handley * 18*b4315306SDan Handley * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19*b4315306SDan Handley * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20*b4315306SDan Handley * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21*b4315306SDan Handley * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22*b4315306SDan Handley * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23*b4315306SDan Handley * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24*b4315306SDan Handley * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25*b4315306SDan Handley * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26*b4315306SDan Handley * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27*b4315306SDan Handley * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28*b4315306SDan Handley * POSSIBILITY OF SUCH DAMAGE. 29*b4315306SDan Handley */ 30*b4315306SDan Handley #ifndef __V2M_DEF_H__ 31*b4315306SDan Handley #define __V2M_DEF_H__ 32*b4315306SDan Handley 33*b4315306SDan Handley #include <xlat_tables.h> 34*b4315306SDan Handley 35*b4315306SDan Handley 36*b4315306SDan Handley /* V2M motherboard system registers & offsets */ 37*b4315306SDan Handley #define V2M_SYSREGS_BASE 0x1c010000 38*b4315306SDan Handley #define V2M_SYS_ID 0x0 39*b4315306SDan Handley #define V2M_SYS_SWITCH 0x4 40*b4315306SDan Handley #define V2M_SYS_LED 0x8 41*b4315306SDan Handley #define V2M_SYS_CFGDATA 0xa0 42*b4315306SDan Handley #define V2M_SYS_CFGCTRL 0xa4 43*b4315306SDan Handley #define V2M_SYS_CFGSTATUS 0xa8 44*b4315306SDan Handley 45*b4315306SDan Handley #define V2M_CFGCTRL_START (1 << 31) 46*b4315306SDan Handley #define V2M_CFGCTRL_RW (1 << 30) 47*b4315306SDan Handley #define V2M_CFGCTRL_FUNC_SHIFT 20 48*b4315306SDan Handley #define V2M_CFGCTRL_FUNC(fn) (fn << V2M_CFGCTRL_FUNC_SHIFT) 49*b4315306SDan Handley #define V2M_FUNC_CLK_GEN 0x01 50*b4315306SDan Handley #define V2M_FUNC_TEMP 0x04 51*b4315306SDan Handley #define V2M_FUNC_DB_RESET 0x05 52*b4315306SDan Handley #define V2M_FUNC_SCC_CFG 0x06 53*b4315306SDan Handley #define V2M_FUNC_SHUTDOWN 0x08 54*b4315306SDan Handley #define V2M_FUNC_REBOOT 0x09 55*b4315306SDan Handley 56*b4315306SDan Handley /* 57*b4315306SDan Handley * V2M sysled bit definitions. The values written to this 58*b4315306SDan Handley * register are defined in arch.h & runtime_svc.h. Only 59*b4315306SDan Handley * used by the primary cpu to diagnose any cold boot issues. 60*b4315306SDan Handley * 61*b4315306SDan Handley * SYS_LED[0] - Security state (S=0/NS=1) 62*b4315306SDan Handley * SYS_LED[2:1] - Exception Level (EL3-EL0) 63*b4315306SDan Handley * SYS_LED[7:3] - Exception Class (Sync/Async & origin) 64*b4315306SDan Handley * 65*b4315306SDan Handley */ 66*b4315306SDan Handley #define V2M_SYS_LED_SS_SHIFT 0x0 67*b4315306SDan Handley #define V2M_SYS_LED_EL_SHIFT 0x1 68*b4315306SDan Handley #define V2M_SYS_LED_EC_SHIFT 0x3 69*b4315306SDan Handley 70*b4315306SDan Handley #define V2M_SYS_LED_SS_MASK 0x1 71*b4315306SDan Handley #define V2M_SYS_LED_EL_MASK 0x3 72*b4315306SDan Handley #define V2M_SYS_LED_EC_MASK 0x1f 73*b4315306SDan Handley 74*b4315306SDan Handley /* V2M sysid register bits */ 75*b4315306SDan Handley #define V2M_SYS_ID_REV_SHIFT 28 76*b4315306SDan Handley #define V2M_SYS_ID_HBI_SHIFT 16 77*b4315306SDan Handley #define V2M_SYS_ID_BLD_SHIFT 12 78*b4315306SDan Handley #define V2M_SYS_ID_ARCH_SHIFT 8 79*b4315306SDan Handley #define V2M_SYS_ID_FPGA_SHIFT 0 80*b4315306SDan Handley 81*b4315306SDan Handley #define V2M_SYS_ID_REV_MASK 0xf 82*b4315306SDan Handley #define V2M_SYS_ID_HBI_MASK 0xfff 83*b4315306SDan Handley #define V2M_SYS_ID_BLD_MASK 0xf 84*b4315306SDan Handley #define V2M_SYS_ID_ARCH_MASK 0xf 85*b4315306SDan Handley #define V2M_SYS_ID_FPGA_MASK 0xff 86*b4315306SDan Handley 87*b4315306SDan Handley #define V2M_SYS_ID_BLD_LENGTH 4 88*b4315306SDan Handley 89*b4315306SDan Handley 90*b4315306SDan Handley /* NOR Flash */ 91*b4315306SDan Handley #define V2M_FLASH0_BASE 0x08000000 92*b4315306SDan Handley #define V2M_FLASH0_SIZE 0x04000000 93*b4315306SDan Handley 94*b4315306SDan Handley #define V2M_IOFPGA_BASE 0x1c000000 95*b4315306SDan Handley #define V2M_IOFPGA_SIZE 0x03000000 96*b4315306SDan Handley 97*b4315306SDan Handley /* PL011 UART related constants */ 98*b4315306SDan Handley #define V2M_IOFPGA_UART0_BASE 0x1c090000 99*b4315306SDan Handley #define V2M_IOFPGA_UART1_BASE 0x1c0a0000 100*b4315306SDan Handley #define V2M_IOFPGA_UART2_BASE 0x1c0b0000 101*b4315306SDan Handley #define V2M_IOFPGA_UART3_BASE 0x1c0c0000 102*b4315306SDan Handley 103*b4315306SDan Handley #define V2M_IOFPGA_UART0_CLK_IN_HZ 24000000 104*b4315306SDan Handley #define V2M_IOFPGA_UART1_CLK_IN_HZ 24000000 105*b4315306SDan Handley #define V2M_IOFPGA_UART2_CLK_IN_HZ 24000000 106*b4315306SDan Handley #define V2M_IOFPGA_UART3_CLK_IN_HZ 24000000 107*b4315306SDan Handley 108*b4315306SDan Handley 109*b4315306SDan Handley #define V2M_MAP_FLASH0 MAP_REGION_FLAT(V2M_FLASH0_BASE,\ 110*b4315306SDan Handley V2M_FLASH0_SIZE, \ 111*b4315306SDan Handley MT_MEMORY | MT_RO | MT_SECURE) 112*b4315306SDan Handley 113*b4315306SDan Handley #define V2M_MAP_IOFPGA MAP_REGION_FLAT(V2M_IOFPGA_BASE,\ 114*b4315306SDan Handley V2M_IOFPGA_SIZE, \ 115*b4315306SDan Handley MT_DEVICE | MT_RW | MT_SECURE) 116*b4315306SDan Handley 117*b4315306SDan Handley 118*b4315306SDan Handley 119*b4315306SDan Handley #endif /* __V2M_DEF_H__ */ 120