1 /* 2 * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #ifndef __PSCI_H__ 32 #define __PSCI_H__ 33 34 #include <bakery_lock.h> 35 #include <platform_def.h> /* for PLAT_NUM_PWR_DOMAINS */ 36 #if ENABLE_PLAT_COMPAT 37 #include <psci_compat.h> 38 #endif 39 40 /******************************************************************************* 41 * Number of power domains whose state this PSCI implementation can track 42 ******************************************************************************/ 43 #ifdef PLAT_NUM_PWR_DOMAINS 44 #define PSCI_NUM_PWR_DOMAINS PLAT_NUM_PWR_DOMAINS 45 #else 46 #define PSCI_NUM_PWR_DOMAINS (2 * PLATFORM_CORE_COUNT) 47 #endif 48 49 #define PSCI_NUM_NON_CPU_PWR_DOMAINS (PSCI_NUM_PWR_DOMAINS - \ 50 PLATFORM_CORE_COUNT) 51 52 /* This is the power level corresponding to a CPU */ 53 #define PSCI_CPU_PWR_LVL 0 54 55 /* 56 * The maximum power level supported by PSCI. Since PSCI CPU_SUSPEND 57 * uses the old power_state parameter format which has 2 bits to specify the 58 * power level, this constant is defined to be 3. 59 */ 60 #define PSCI_MAX_PWR_LVL 3 61 62 /******************************************************************************* 63 * Defines for runtime services function ids 64 ******************************************************************************/ 65 #define PSCI_VERSION 0x84000000 66 #define PSCI_CPU_SUSPEND_AARCH32 0x84000001 67 #define PSCI_CPU_SUSPEND_AARCH64 0xc4000001 68 #define PSCI_CPU_OFF 0x84000002 69 #define PSCI_CPU_ON_AARCH32 0x84000003 70 #define PSCI_CPU_ON_AARCH64 0xc4000003 71 #define PSCI_AFFINITY_INFO_AARCH32 0x84000004 72 #define PSCI_AFFINITY_INFO_AARCH64 0xc4000004 73 #define PSCI_MIG_AARCH32 0x84000005 74 #define PSCI_MIG_AARCH64 0xc4000005 75 #define PSCI_MIG_INFO_TYPE 0x84000006 76 #define PSCI_MIG_INFO_UP_CPU_AARCH32 0x84000007 77 #define PSCI_MIG_INFO_UP_CPU_AARCH64 0xc4000007 78 #define PSCI_SYSTEM_OFF 0x84000008 79 #define PSCI_SYSTEM_RESET 0x84000009 80 #define PSCI_FEATURES 0x8400000A 81 #define PSCI_SYSTEM_SUSPEND_AARCH32 0x8400000E 82 #define PSCI_SYSTEM_SUSPEND_AARCH64 0xc400000E 83 #define PSCI_STAT_RESIDENCY_AARCH32 0x84000010 84 #define PSCI_STAT_RESIDENCY_AARCH64 0xc4000010 85 #define PSCI_STAT_COUNT_AARCH32 0x84000011 86 #define PSCI_STAT_COUNT_AARCH64 0xc4000011 87 88 /* Macro to help build the psci capabilities bitfield */ 89 #define define_psci_cap(x) (1 << (x & 0x1f)) 90 91 /* 92 * Number of PSCI calls (above) implemented 93 */ 94 #if ENABLE_PSCI_STAT 95 #define PSCI_NUM_CALLS 22 96 #else 97 #define PSCI_NUM_CALLS 18 98 #endif 99 100 /* The macros below are used to identify PSCI calls from the SMC function ID */ 101 #define PSCI_FID_MASK 0xffe0u 102 #define PSCI_FID_VALUE 0u 103 #define is_psci_fid(_fid) \ 104 (((_fid) & PSCI_FID_MASK) == PSCI_FID_VALUE) 105 106 /******************************************************************************* 107 * PSCI Migrate and friends 108 ******************************************************************************/ 109 #define PSCI_TOS_UP_MIG_CAP 0 110 #define PSCI_TOS_NOT_UP_MIG_CAP 1 111 #define PSCI_TOS_NOT_PRESENT_MP 2 112 113 /******************************************************************************* 114 * PSCI CPU_SUSPEND 'power_state' parameter specific defines 115 ******************************************************************************/ 116 #define PSTATE_ID_SHIFT 0 117 118 #if PSCI_EXTENDED_STATE_ID 119 #define PSTATE_VALID_MASK 0xB0000000 120 #define PSTATE_TYPE_SHIFT 30 121 #define PSTATE_ID_MASK 0xfffffff 122 #else 123 #define PSTATE_VALID_MASK 0xFCFE0000 124 #define PSTATE_TYPE_SHIFT 16 125 #define PSTATE_PWR_LVL_SHIFT 24 126 #define PSTATE_ID_MASK 0xffff 127 #define PSTATE_PWR_LVL_MASK 0x3 128 129 #define psci_get_pstate_pwrlvl(pstate) (((pstate) >> PSTATE_PWR_LVL_SHIFT) & \ 130 PSTATE_PWR_LVL_MASK) 131 #define psci_make_powerstate(state_id, type, pwrlvl) \ 132 (((state_id) & PSTATE_ID_MASK) << PSTATE_ID_SHIFT) |\ 133 (((type) & PSTATE_TYPE_MASK) << PSTATE_TYPE_SHIFT) |\ 134 (((pwrlvl) & PSTATE_PWR_LVL_MASK) << PSTATE_PWR_LVL_SHIFT) 135 #endif /* __PSCI_EXTENDED_STATE_ID__ */ 136 137 #define PSTATE_TYPE_STANDBY 0x0 138 #define PSTATE_TYPE_POWERDOWN 0x1 139 #define PSTATE_TYPE_MASK 0x1 140 141 #define psci_get_pstate_id(pstate) (((pstate) >> PSTATE_ID_SHIFT) & \ 142 PSTATE_ID_MASK) 143 #define psci_get_pstate_type(pstate) (((pstate) >> PSTATE_TYPE_SHIFT) & \ 144 PSTATE_TYPE_MASK) 145 #define psci_check_power_state(pstate) ((pstate) & PSTATE_VALID_MASK) 146 147 /******************************************************************************* 148 * PSCI CPU_FEATURES feature flag specific defines 149 ******************************************************************************/ 150 /* Features flags for CPU SUSPEND power state parameter format. Bits [1:1] */ 151 #define FF_PSTATE_SHIFT 1 152 #define FF_PSTATE_ORIG 0 153 #define FF_PSTATE_EXTENDED 1 154 #if PSCI_EXTENDED_STATE_ID 155 #define FF_PSTATE FF_PSTATE_EXTENDED 156 #else 157 #define FF_PSTATE FF_PSTATE_ORIG 158 #endif 159 160 /* Features flags for CPU SUSPEND OS Initiated mode support. Bits [0:0] */ 161 #define FF_MODE_SUPPORT_SHIFT 0 162 #define FF_SUPPORTS_OS_INIT_MODE 1 163 164 /******************************************************************************* 165 * PSCI version 166 ******************************************************************************/ 167 #define PSCI_MAJOR_VER (1 << 16) 168 #define PSCI_MINOR_VER 0x0 169 170 /******************************************************************************* 171 * PSCI error codes 172 ******************************************************************************/ 173 #define PSCI_E_SUCCESS 0 174 #define PSCI_E_NOT_SUPPORTED -1 175 #define PSCI_E_INVALID_PARAMS -2 176 #define PSCI_E_DENIED -3 177 #define PSCI_E_ALREADY_ON -4 178 #define PSCI_E_ON_PENDING -5 179 #define PSCI_E_INTERN_FAIL -6 180 #define PSCI_E_NOT_PRESENT -7 181 #define PSCI_E_DISABLED -8 182 #define PSCI_E_INVALID_ADDRESS -9 183 184 #define PSCI_INVALID_MPIDR ~((u_register_t)0) 185 186 #ifndef __ASSEMBLY__ 187 188 #include <stdint.h> 189 #include <types.h> 190 191 /* 192 * These are the states reported by the PSCI_AFFINITY_INFO API for the specified 193 * CPU. The definitions of these states can be found in Section 5.7.1 in the 194 * PSCI specification (ARM DEN 0022C). 195 */ 196 typedef enum { 197 AFF_STATE_ON = 0, 198 AFF_STATE_OFF = 1, 199 AFF_STATE_ON_PENDING = 2 200 } aff_info_state_t; 201 202 /* 203 * Macro to represent invalid affinity level within PSCI. 204 */ 205 #define PSCI_INVALID_PWR_LVL (PLAT_MAX_PWR_LVL + 1) 206 207 /* 208 * Type for representing the local power state at a particular level. 209 */ 210 typedef uint8_t plat_local_state_t; 211 212 /* The local state macro used to represent RUN state. */ 213 #define PSCI_LOCAL_STATE_RUN 0 214 215 /* 216 * Macro to test whether the plat_local_state is RUN state 217 */ 218 #define is_local_state_run(plat_local_state) \ 219 ((plat_local_state) == PSCI_LOCAL_STATE_RUN) 220 221 /* 222 * Macro to test whether the plat_local_state is RETENTION state 223 */ 224 #define is_local_state_retn(plat_local_state) \ 225 (((plat_local_state) > PSCI_LOCAL_STATE_RUN) && \ 226 ((plat_local_state) <= PLAT_MAX_RET_STATE)) 227 228 /* 229 * Macro to test whether the plat_local_state is OFF state 230 */ 231 #define is_local_state_off(plat_local_state) \ 232 (((plat_local_state) > PLAT_MAX_RET_STATE) && \ 233 ((plat_local_state) <= PLAT_MAX_OFF_STATE)) 234 235 /***************************************************************************** 236 * This data structure defines the representation of the power state parameter 237 * for its exchange between the generic PSCI code and the platform port. For 238 * example, it is used by the platform port to specify the requested power 239 * states during a power management operation. It is used by the generic code to 240 * inform the platform about the target power states that each level should 241 * enter. 242 ****************************************************************************/ 243 typedef struct psci_power_state { 244 /* 245 * The pwr_domain_state[] stores the local power state at each level 246 * for the CPU. 247 */ 248 plat_local_state_t pwr_domain_state[PLAT_MAX_PWR_LVL + 1]; 249 } psci_power_state_t; 250 251 /******************************************************************************* 252 * Structure used to store per-cpu information relevant to the PSCI service. 253 * It is populated in the per-cpu data array. In return we get a guarantee that 254 * this information will not reside on a cache line shared with another cpu. 255 ******************************************************************************/ 256 typedef struct psci_cpu_data { 257 /* State as seen by PSCI Affinity Info API */ 258 aff_info_state_t aff_info_state; 259 260 /* 261 * Highest power level which takes part in a power management 262 * operation. 263 */ 264 unsigned char target_pwrlvl; 265 266 /* The local power state of this CPU */ 267 plat_local_state_t local_state; 268 } psci_cpu_data_t; 269 270 /******************************************************************************* 271 * Structure populated by platform specific code to export routines which 272 * perform common low level power management functions 273 ******************************************************************************/ 274 typedef struct plat_psci_ops { 275 void (*cpu_standby)(plat_local_state_t cpu_state); 276 int (*pwr_domain_on)(u_register_t mpidr); 277 void (*pwr_domain_off)(const psci_power_state_t *target_state); 278 void (*pwr_domain_suspend)(const psci_power_state_t *target_state); 279 void (*pwr_domain_on_finish)(const psci_power_state_t *target_state); 280 void (*pwr_domain_suspend_finish)( 281 const psci_power_state_t *target_state); 282 void (*pwr_domain_pwr_down_wfi)( 283 const psci_power_state_t *target_state) __dead2; 284 void (*system_off)(void) __dead2; 285 void (*system_reset)(void) __dead2; 286 int (*validate_power_state)(unsigned int power_state, 287 psci_power_state_t *req_state); 288 int (*validate_ns_entrypoint)(uintptr_t ns_entrypoint); 289 void (*get_sys_suspend_power_state)( 290 psci_power_state_t *req_state); 291 int (*get_pwr_lvl_state_idx)(plat_local_state_t pwr_domain_state, 292 int pwrlvl); 293 int (*translate_power_state_by_mpidr)(u_register_t mpidr, 294 unsigned int power_state, 295 psci_power_state_t *output_state); 296 } plat_psci_ops_t; 297 298 /******************************************************************************* 299 * Optional structure populated by the Secure Payload Dispatcher to be given a 300 * chance to perform any bookkeeping before PSCI executes a power management 301 * operation. It also allows PSCI to determine certain properties of the SP e.g. 302 * migrate capability etc. 303 ******************************************************************************/ 304 typedef struct spd_pm_ops { 305 void (*svc_on)(u_register_t target_cpu); 306 int32_t (*svc_off)(u_register_t __unused); 307 void (*svc_suspend)(u_register_t max_off_pwrlvl); 308 void (*svc_on_finish)(u_register_t __unused); 309 void (*svc_suspend_finish)(u_register_t max_off_pwrlvl); 310 int32_t (*svc_migrate)(u_register_t from_cpu, u_register_t to_cpu); 311 int32_t (*svc_migrate_info)(u_register_t *resident_cpu); 312 void (*svc_system_off)(void); 313 void (*svc_system_reset)(void); 314 } spd_pm_ops_t; 315 316 /******************************************************************************* 317 * Function & Data prototypes 318 ******************************************************************************/ 319 unsigned int psci_version(void); 320 int psci_cpu_on(u_register_t target_cpu, 321 uintptr_t entrypoint, 322 u_register_t context_id); 323 int psci_cpu_suspend(unsigned int power_state, 324 uintptr_t entrypoint, 325 u_register_t context_id); 326 int psci_system_suspend(uintptr_t entrypoint, u_register_t context_id); 327 int psci_cpu_off(void); 328 int psci_affinity_info(u_register_t target_affinity, 329 unsigned int lowest_affinity_level); 330 int psci_migrate(u_register_t target_cpu); 331 int psci_migrate_info_type(void); 332 long psci_migrate_info_up_cpu(void); 333 int psci_features(unsigned int psci_fid); 334 void __dead2 psci_power_down_wfi(void); 335 void psci_arch_setup(void); 336 337 /* 338 * The below API is deprecated. This is now replaced by bl31_warmboot_entry in 339 * AArch64. 340 */ 341 void psci_entrypoint(void) __deprecated; 342 343 /******************************************************************************* 344 * Forward declarations 345 ******************************************************************************/ 346 struct entry_point_info; 347 348 /****************************************************************************** 349 * PSCI Library Interfaces 350 *****************************************************************************/ 351 u_register_t psci_smc_handler(uint32_t smc_fid, 352 u_register_t x1, 353 u_register_t x2, 354 u_register_t x3, 355 u_register_t x4, 356 void *cookie, 357 void *handle, 358 u_register_t flags); 359 int psci_setup(uintptr_t mailbox_ep); 360 void psci_warmboot_entrypoint(void); 361 void psci_register_spd_pm_hook(const spd_pm_ops_t *pm); 362 void psci_prepare_next_non_secure_ctx( 363 struct entry_point_info *next_image_info); 364 365 #endif /*__ASSEMBLY__*/ 366 367 #endif /* __PSCI_H__ */ 368