1 /* 2 * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #ifndef __PSCI_H__ 32 #define __PSCI_H__ 33 34 #include <bakery_lock.h> 35 #include <bl_common.h> 36 #include <platform_def.h> /* for PLAT_NUM_PWR_DOMAINS */ 37 #if ENABLE_PLAT_COMPAT 38 #include <psci_compat.h> 39 #endif 40 #include <psci_lib.h> /* To maintain compatibility for SPDs */ 41 42 /******************************************************************************* 43 * Number of power domains whose state this PSCI implementation can track 44 ******************************************************************************/ 45 #ifdef PLAT_NUM_PWR_DOMAINS 46 #define PSCI_NUM_PWR_DOMAINS PLAT_NUM_PWR_DOMAINS 47 #else 48 #define PSCI_NUM_PWR_DOMAINS (2 * PLATFORM_CORE_COUNT) 49 #endif 50 51 #define PSCI_NUM_NON_CPU_PWR_DOMAINS (PSCI_NUM_PWR_DOMAINS - \ 52 PLATFORM_CORE_COUNT) 53 54 /* This is the power level corresponding to a CPU */ 55 #define PSCI_CPU_PWR_LVL 0 56 57 /* 58 * The maximum power level supported by PSCI. Since PSCI CPU_SUSPEND 59 * uses the old power_state parameter format which has 2 bits to specify the 60 * power level, this constant is defined to be 3. 61 */ 62 #define PSCI_MAX_PWR_LVL 3 63 64 /******************************************************************************* 65 * Defines for runtime services function ids 66 ******************************************************************************/ 67 #define PSCI_VERSION 0x84000000 68 #define PSCI_CPU_SUSPEND_AARCH32 0x84000001 69 #define PSCI_CPU_SUSPEND_AARCH64 0xc4000001 70 #define PSCI_CPU_OFF 0x84000002 71 #define PSCI_CPU_ON_AARCH32 0x84000003 72 #define PSCI_CPU_ON_AARCH64 0xc4000003 73 #define PSCI_AFFINITY_INFO_AARCH32 0x84000004 74 #define PSCI_AFFINITY_INFO_AARCH64 0xc4000004 75 #define PSCI_MIG_AARCH32 0x84000005 76 #define PSCI_MIG_AARCH64 0xc4000005 77 #define PSCI_MIG_INFO_TYPE 0x84000006 78 #define PSCI_MIG_INFO_UP_CPU_AARCH32 0x84000007 79 #define PSCI_MIG_INFO_UP_CPU_AARCH64 0xc4000007 80 #define PSCI_SYSTEM_OFF 0x84000008 81 #define PSCI_SYSTEM_RESET 0x84000009 82 #define PSCI_FEATURES 0x8400000A 83 #define PSCI_NODE_HW_STATE_AARCH32 0x8400000d 84 #define PSCI_NODE_HW_STATE_AARCH64 0xc400000d 85 #define PSCI_SYSTEM_SUSPEND_AARCH32 0x8400000E 86 #define PSCI_SYSTEM_SUSPEND_AARCH64 0xc400000E 87 #define PSCI_STAT_RESIDENCY_AARCH32 0x84000010 88 #define PSCI_STAT_RESIDENCY_AARCH64 0xc4000010 89 #define PSCI_STAT_COUNT_AARCH32 0x84000011 90 #define PSCI_STAT_COUNT_AARCH64 0xc4000011 91 92 /* Macro to help build the psci capabilities bitfield */ 93 #define define_psci_cap(x) (1 << (x & 0x1f)) 94 95 /* 96 * Number of PSCI calls (above) implemented 97 */ 98 #if ENABLE_PSCI_STAT 99 #define PSCI_NUM_CALLS 22 100 #else 101 #define PSCI_NUM_CALLS 18 102 #endif 103 104 /* The macros below are used to identify PSCI calls from the SMC function ID */ 105 #define PSCI_FID_MASK 0xffe0u 106 #define PSCI_FID_VALUE 0u 107 #define is_psci_fid(_fid) \ 108 (((_fid) & PSCI_FID_MASK) == PSCI_FID_VALUE) 109 110 /******************************************************************************* 111 * PSCI Migrate and friends 112 ******************************************************************************/ 113 #define PSCI_TOS_UP_MIG_CAP 0 114 #define PSCI_TOS_NOT_UP_MIG_CAP 1 115 #define PSCI_TOS_NOT_PRESENT_MP 2 116 117 /******************************************************************************* 118 * PSCI CPU_SUSPEND 'power_state' parameter specific defines 119 ******************************************************************************/ 120 #define PSTATE_ID_SHIFT 0 121 122 #if PSCI_EXTENDED_STATE_ID 123 #define PSTATE_VALID_MASK 0xB0000000 124 #define PSTATE_TYPE_SHIFT 30 125 #define PSTATE_ID_MASK 0xfffffff 126 #else 127 #define PSTATE_VALID_MASK 0xFCFE0000 128 #define PSTATE_TYPE_SHIFT 16 129 #define PSTATE_PWR_LVL_SHIFT 24 130 #define PSTATE_ID_MASK 0xffff 131 #define PSTATE_PWR_LVL_MASK 0x3 132 133 #define psci_get_pstate_pwrlvl(pstate) (((pstate) >> PSTATE_PWR_LVL_SHIFT) & \ 134 PSTATE_PWR_LVL_MASK) 135 #define psci_make_powerstate(state_id, type, pwrlvl) \ 136 (((state_id) & PSTATE_ID_MASK) << PSTATE_ID_SHIFT) |\ 137 (((type) & PSTATE_TYPE_MASK) << PSTATE_TYPE_SHIFT) |\ 138 (((pwrlvl) & PSTATE_PWR_LVL_MASK) << PSTATE_PWR_LVL_SHIFT) 139 #endif /* __PSCI_EXTENDED_STATE_ID__ */ 140 141 #define PSTATE_TYPE_STANDBY 0x0 142 #define PSTATE_TYPE_POWERDOWN 0x1 143 #define PSTATE_TYPE_MASK 0x1 144 145 #define psci_get_pstate_id(pstate) (((pstate) >> PSTATE_ID_SHIFT) & \ 146 PSTATE_ID_MASK) 147 #define psci_get_pstate_type(pstate) (((pstate) >> PSTATE_TYPE_SHIFT) & \ 148 PSTATE_TYPE_MASK) 149 #define psci_check_power_state(pstate) ((pstate) & PSTATE_VALID_MASK) 150 151 /******************************************************************************* 152 * PSCI CPU_FEATURES feature flag specific defines 153 ******************************************************************************/ 154 /* Features flags for CPU SUSPEND power state parameter format. Bits [1:1] */ 155 #define FF_PSTATE_SHIFT 1 156 #define FF_PSTATE_ORIG 0 157 #define FF_PSTATE_EXTENDED 1 158 #if PSCI_EXTENDED_STATE_ID 159 #define FF_PSTATE FF_PSTATE_EXTENDED 160 #else 161 #define FF_PSTATE FF_PSTATE_ORIG 162 #endif 163 164 /* Features flags for CPU SUSPEND OS Initiated mode support. Bits [0:0] */ 165 #define FF_MODE_SUPPORT_SHIFT 0 166 #define FF_SUPPORTS_OS_INIT_MODE 1 167 168 /******************************************************************************* 169 * PSCI version 170 ******************************************************************************/ 171 #define PSCI_MAJOR_VER (1 << 16) 172 #define PSCI_MINOR_VER 0x0 173 174 /******************************************************************************* 175 * PSCI error codes 176 ******************************************************************************/ 177 #define PSCI_E_SUCCESS 0 178 #define PSCI_E_NOT_SUPPORTED -1 179 #define PSCI_E_INVALID_PARAMS -2 180 #define PSCI_E_DENIED -3 181 #define PSCI_E_ALREADY_ON -4 182 #define PSCI_E_ON_PENDING -5 183 #define PSCI_E_INTERN_FAIL -6 184 #define PSCI_E_NOT_PRESENT -7 185 #define PSCI_E_DISABLED -8 186 #define PSCI_E_INVALID_ADDRESS -9 187 188 #define PSCI_INVALID_MPIDR ~((u_register_t)0) 189 190 #ifndef __ASSEMBLY__ 191 192 #include <stdint.h> 193 #include <types.h> 194 195 /* 196 * These are the states reported by the PSCI_AFFINITY_INFO API for the specified 197 * CPU. The definitions of these states can be found in Section 5.7.1 in the 198 * PSCI specification (ARM DEN 0022C). 199 */ 200 typedef enum { 201 AFF_STATE_ON = 0, 202 AFF_STATE_OFF = 1, 203 AFF_STATE_ON_PENDING = 2 204 } aff_info_state_t; 205 206 /* 207 * These are the power states reported by PSCI_NODE_HW_STATE API for the 208 * specified CPU. The definitions of these states can be found in Section 5.15.3 209 * of PSCI specification (ARM DEN 0022C). 210 */ 211 typedef enum { 212 HW_ON = 0, 213 HW_OFF = 1, 214 HW_STANDBY = 2 215 } node_hw_state_t; 216 217 /* 218 * Macro to represent invalid affinity level within PSCI. 219 */ 220 #define PSCI_INVALID_PWR_LVL (PLAT_MAX_PWR_LVL + 1) 221 222 /* 223 * Type for representing the local power state at a particular level. 224 */ 225 typedef uint8_t plat_local_state_t; 226 227 /* The local state macro used to represent RUN state. */ 228 #define PSCI_LOCAL_STATE_RUN 0 229 230 /* 231 * Macro to test whether the plat_local_state is RUN state 232 */ 233 #define is_local_state_run(plat_local_state) \ 234 ((plat_local_state) == PSCI_LOCAL_STATE_RUN) 235 236 /* 237 * Macro to test whether the plat_local_state is RETENTION state 238 */ 239 #define is_local_state_retn(plat_local_state) \ 240 (((plat_local_state) > PSCI_LOCAL_STATE_RUN) && \ 241 ((plat_local_state) <= PLAT_MAX_RET_STATE)) 242 243 /* 244 * Macro to test whether the plat_local_state is OFF state 245 */ 246 #define is_local_state_off(plat_local_state) \ 247 (((plat_local_state) > PLAT_MAX_RET_STATE) && \ 248 ((plat_local_state) <= PLAT_MAX_OFF_STATE)) 249 250 /***************************************************************************** 251 * This data structure defines the representation of the power state parameter 252 * for its exchange between the generic PSCI code and the platform port. For 253 * example, it is used by the platform port to specify the requested power 254 * states during a power management operation. It is used by the generic code to 255 * inform the platform about the target power states that each level should 256 * enter. 257 ****************************************************************************/ 258 typedef struct psci_power_state { 259 /* 260 * The pwr_domain_state[] stores the local power state at each level 261 * for the CPU. 262 */ 263 plat_local_state_t pwr_domain_state[PLAT_MAX_PWR_LVL + 1]; 264 } psci_power_state_t; 265 266 /******************************************************************************* 267 * Structure used to store per-cpu information relevant to the PSCI service. 268 * It is populated in the per-cpu data array. In return we get a guarantee that 269 * this information will not reside on a cache line shared with another cpu. 270 ******************************************************************************/ 271 typedef struct psci_cpu_data { 272 /* State as seen by PSCI Affinity Info API */ 273 aff_info_state_t aff_info_state; 274 275 /* 276 * Highest power level which takes part in a power management 277 * operation. 278 */ 279 unsigned char target_pwrlvl; 280 281 /* The local power state of this CPU */ 282 plat_local_state_t local_state; 283 } psci_cpu_data_t; 284 285 /******************************************************************************* 286 * Structure populated by platform specific code to export routines which 287 * perform common low level power management functions 288 ******************************************************************************/ 289 typedef struct plat_psci_ops { 290 void (*cpu_standby)(plat_local_state_t cpu_state); 291 int (*pwr_domain_on)(u_register_t mpidr); 292 void (*pwr_domain_off)(const psci_power_state_t *target_state); 293 void (*pwr_domain_suspend)(const psci_power_state_t *target_state); 294 void (*pwr_domain_on_finish)(const psci_power_state_t *target_state); 295 void (*pwr_domain_suspend_finish)( 296 const psci_power_state_t *target_state); 297 void (*pwr_domain_pwr_down_wfi)( 298 const psci_power_state_t *target_state) __dead2; 299 void (*system_off)(void) __dead2; 300 void (*system_reset)(void) __dead2; 301 int (*validate_power_state)(unsigned int power_state, 302 psci_power_state_t *req_state); 303 int (*validate_ns_entrypoint)(uintptr_t ns_entrypoint); 304 void (*get_sys_suspend_power_state)( 305 psci_power_state_t *req_state); 306 int (*get_pwr_lvl_state_idx)(plat_local_state_t pwr_domain_state, 307 int pwrlvl); 308 int (*translate_power_state_by_mpidr)(u_register_t mpidr, 309 unsigned int power_state, 310 psci_power_state_t *output_state); 311 int (*get_node_hw_state)(u_register_t mpidr, unsigned int power_level); 312 } plat_psci_ops_t; 313 314 /******************************************************************************* 315 * Function & Data prototypes 316 ******************************************************************************/ 317 unsigned int psci_version(void); 318 int psci_cpu_on(u_register_t target_cpu, 319 uintptr_t entrypoint, 320 u_register_t context_id); 321 int psci_cpu_suspend(unsigned int power_state, 322 uintptr_t entrypoint, 323 u_register_t context_id); 324 int psci_system_suspend(uintptr_t entrypoint, u_register_t context_id); 325 int psci_cpu_off(void); 326 int psci_affinity_info(u_register_t target_affinity, 327 unsigned int lowest_affinity_level); 328 int psci_migrate(u_register_t target_cpu); 329 int psci_migrate_info_type(void); 330 long psci_migrate_info_up_cpu(void); 331 int psci_node_hw_state(u_register_t target_cpu, 332 unsigned int power_level); 333 int psci_features(unsigned int psci_fid); 334 void __dead2 psci_power_down_wfi(void); 335 void psci_arch_setup(void); 336 337 /* 338 * The below API is deprecated. This is now replaced by bl31_warmboot_entry in 339 * AArch64. 340 */ 341 void psci_entrypoint(void) __deprecated; 342 343 #endif /*__ASSEMBLY__*/ 344 345 #endif /* __PSCI_H__ */ 346