1 /* 2 * Copyright (c) 2022-2025, Arm Limited. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef GPT_RME_H 8 #define GPT_RME_H 9 10 #include <stdint.h> 11 #include <lib/spinlock.h> 12 13 /******************************************************************************/ 14 /* GPT helper macros and definitions */ 15 /******************************************************************************/ 16 17 #if (RME_GPT_BITLOCK_BLOCK != 0) 18 #define LOCK_SIZE sizeof(((bitlock_t *)NULL)->lock) 19 #define LOCK_TYPE typeof(((bitlock_t *)NULL)->lock) 20 #define LOCK_BITS (LOCK_SIZE * UL(8)) 21 22 CASSERT((UL(1) == LOCK_SIZE), assert_bitlock_type_not_uint8_t); 23 #endif /* RME_GPT_BITLOCK_BLOCK */ 24 25 /* 26 * Structure for specifying a mapping range and it's properties. This should not 27 * be manually initialized, using the MAP_GPT_REGION_x macros is recommended as 28 * to avoid potential incompatibilities in the future. 29 */ 30 typedef struct pas_region { 31 uintptr_t base_pa; /* Base address for PAS. */ 32 size_t size; /* Size of the PAS. */ 33 unsigned int attrs; /* PAS GPI and entry type. */ 34 } pas_region_t; 35 36 /* GPT GPI definitions */ 37 #define GPT_GPI_NO_ACCESS U(0x0) 38 #define GPT_GPI_SA U(0x4) 39 #define GPT_GPI_NSP U(0x5) 40 #define GPT_GPI_SECURE U(0x8) 41 #define GPT_GPI_NS U(0x9) 42 #define GPT_GPI_ROOT U(0xA) 43 #define GPT_GPI_REALM U(0xB) 44 #define GPT_GPI_NSO U(0xD) 45 #define GPT_GPI_ANY U(0xF) 46 #define GPT_GPI_VAL_MASK UL(0xF) 47 48 #define GPT_NSE_SECURE U(0b00) 49 #define GPT_NSE_ROOT U(0b01) 50 #define GPT_NSE_NS U(0b10) 51 #define GPT_NSE_REALM U(0b11) 52 53 #define GPT_NSE_SHIFT U(62) 54 55 #define GPT_NSE2_SA U(0b001) 56 #define GPT_NSE2_NSP U(0b101) 57 58 #define GPT_NSE2_SHIFT U(61) 59 60 /* PAS attribute GPI definitions. */ 61 #define GPT_PAS_ATTR_GPI_SHIFT U(0) 62 #define GPT_PAS_ATTR_GPI_MASK U(0xF) 63 #define GPT_PAS_ATTR_GPI(_attrs) (((_attrs) \ 64 >> GPT_PAS_ATTR_GPI_SHIFT) \ 65 & GPT_PAS_ATTR_GPI_MASK) 66 67 /* PAS attribute mapping type definitions */ 68 #define GPT_PAS_ATTR_MAP_TYPE_BLOCK U(0x0) 69 #define GPT_PAS_ATTR_MAP_TYPE_GRANULE U(0x1) 70 #define GPT_PAS_ATTR_MAP_TYPE_SHIFT U(4) 71 #define GPT_PAS_ATTR_MAP_TYPE_MASK U(0x1) 72 #define GPT_PAS_ATTR_MAP_TYPE(_attrs) (((_attrs) \ 73 >> GPT_PAS_ATTR_MAP_TYPE_SHIFT) \ 74 & GPT_PAS_ATTR_MAP_TYPE_MASK) 75 76 /* 77 * Macro to initialize the attributes field in the pas_region_t structure. 78 * [31:5] Reserved 79 * [4] Mapping type (GPT_PAS_ATTR_MAP_TYPE_x definitions) 80 * [3:0] PAS GPI type (GPT_GPI_x definitions) 81 */ 82 #define GPT_PAS_ATTR(_type, _gpi) \ 83 ((((_type) & GPT_PAS_ATTR_MAP_TYPE_MASK) \ 84 << GPT_PAS_ATTR_MAP_TYPE_SHIFT) | \ 85 (((_gpi) & GPT_PAS_ATTR_GPI_MASK) \ 86 << GPT_PAS_ATTR_GPI_SHIFT)) 87 88 /* 89 * Macro to create a GPT entry for this PAS range as a block descriptor. If this 90 * region does not fit the requirements for a block descriptor then GPT 91 * initialization will fail. 92 */ 93 #define GPT_MAP_REGION_BLOCK(_pa, _sz, _gpi) \ 94 { \ 95 .base_pa = (_pa), \ 96 .size = (_sz), \ 97 .attrs = GPT_PAS_ATTR(GPT_PAS_ATTR_MAP_TYPE_BLOCK, (_gpi)), \ 98 } 99 100 /* 101 * Macro to create a GPT entry for this PAS range as a table descriptor. If this 102 * region does not fit the requirements for a table descriptor then GPT 103 * initialization will fail. 104 */ 105 #define GPT_MAP_REGION_GRANULE(_pa, _sz, _gpi) \ 106 { \ 107 .base_pa = (_pa), \ 108 .size = (_sz), \ 109 .attrs = GPT_PAS_ATTR(GPT_PAS_ATTR_MAP_TYPE_GRANULE, (_gpi)), \ 110 } 111 112 /******************************************************************************/ 113 /* GPT register field definitions */ 114 /******************************************************************************/ 115 116 /* NSO bit definitions */ 117 #define GPCCR_NSO_SHIFT U(19) 118 #define GPCCR_NSO_BIT (ULL(1) << GPCCR_NSO_SHIFT) 119 120 /* SA bit definitions */ 121 #define GPCCR_NSP_SHIFT U(26) 122 #define GPCCR_NSP_BIT (ULL(1) << GPCCR_NSP_SHIFT) 123 124 /* SA bit definitions */ 125 #define GPCCR_SA_SHIFT U(25) 126 #define GPCCR_SA_BIT (ULL(1) << GPCCR_SA_SHIFT) 127 128 /* 129 * Least significant address bits protected by each entry in level 0 GPT. This 130 * field is read-only. 131 */ 132 #define GPCCR_L0GPTSZ_SHIFT U(20) 133 #define GPCCR_L0GPTSZ_MASK U(0xF) 134 135 typedef enum { 136 GPCCR_L0GPTSZ_30BITS = U(0x0), 137 GPCCR_L0GPTSZ_34BITS = U(0x4), 138 GPCCR_L0GPTSZ_36BITS = U(0x6), 139 GPCCR_L0GPTSZ_39BITS = U(0x9) 140 } gpccr_l0gptsz_e; 141 142 /* Granule protection check priority bit definitions */ 143 #define GPCCR_GPCP_SHIFT U(17) 144 #define GPCCR_GPCP_BIT (ULL(1) << GPCCR_EL3_GPCP_SHIFT) 145 146 /* Granule protection check bit definitions */ 147 #define GPCCR_GPC_SHIFT U(16) 148 #define GPCCR_GPC_BIT (ULL(1) << GPCCR_GPC_SHIFT) 149 150 /* Physical granule size bit definitions */ 151 #define GPCCR_PGS_SHIFT U(14) 152 #define GPCCR_PGS_MASK U(0x3) 153 #define SET_GPCCR_PGS(x) (((x) & GPCCR_PGS_MASK) << GPCCR_PGS_SHIFT) 154 155 typedef enum { 156 GPCCR_PGS_4K = U(0x0), 157 GPCCR_PGS_64K = U(0x1), 158 GPCCR_PGS_16K = U(0x2) 159 } gpccr_pgs_e; 160 161 /* GPT fetch shareability attribute bit definitions */ 162 #define GPCCR_SH_SHIFT U(12) 163 #define GPCCR_SH_MASK U(0x3) 164 #define SET_GPCCR_SH(x) (((x) & GPCCR_SH_MASK) << GPCCR_SH_SHIFT) 165 166 typedef enum { 167 GPCCR_SH_NS = U(0x0), 168 GPCCR_SH_OS = U(0x2), 169 GPCCR_SH_IS = U(0x3) 170 } gpccr_sh_e; 171 172 /* GPT fetch outer cacheability attribute bit definitions */ 173 #define GPCCR_ORGN_SHIFT U(10) 174 #define GPCCR_ORGN_MASK U(0x3) 175 #define SET_GPCCR_ORGN(x) (((x) & GPCCR_ORGN_MASK) << GPCCR_ORGN_SHIFT) 176 177 typedef enum { 178 GPCCR_ORGN_NC = U(0x0), 179 GPCCR_ORGN_WB_RA_WA = U(0x1), 180 GPCCR_ORGN_WT_RA_NWA = U(0x2), 181 GPCCR_ORGN_WB_RA_NWA = U(0x3) 182 } gpccr_orgn_e; 183 184 /* GPT fetch inner cacheability attribute bit definitions */ 185 #define GPCCR_IRGN_SHIFT U(8) 186 #define GPCCR_IRGN_MASK U(0x3) 187 #define SET_GPCCR_IRGN(x) (((x) & GPCCR_IRGN_MASK) << GPCCR_IRGN_SHIFT) 188 189 typedef enum { 190 GPCCR_IRGN_NC = U(0x0), 191 GPCCR_IRGN_WB_RA_WA = U(0x1), 192 GPCCR_IRGN_WT_RA_NWA = U(0x2), 193 GPCCR_IRGN_WB_RA_NWA = U(0x3) 194 } gpccr_irgn_e; 195 196 /* Protected physical address size bit definitions */ 197 #define GPCCR_PPS_SHIFT U(0) 198 #define GPCCR_PPS_MASK U(0x7) 199 #define SET_GPCCR_PPS(x) (((x) & GPCCR_PPS_MASK) << GPCCR_PPS_SHIFT) 200 201 typedef enum { 202 GPCCR_PPS_4GB = U(0x0), 203 GPCCR_PPS_64GB = U(0x1), 204 GPCCR_PPS_1TB = U(0x2), 205 GPCCR_PPS_4TB = U(0x3), 206 GPCCR_PPS_16TB = U(0x4), 207 GPCCR_PPS_256TB = U(0x5), 208 GPCCR_PPS_4PB = U(0x6) 209 } gpccr_pps_e; 210 211 /* Base Address for the GPT bit definitions */ 212 #define GPTBR_BADDR_SHIFT U(0) 213 #define GPTBR_BADDR_VAL_SHIFT U(12) 214 #define GPTBR_BADDR_MASK ULL(0xffffffffff) 215 216 /******************************************************************************/ 217 /* GPT public APIs */ 218 /******************************************************************************/ 219 220 /* 221 * Public API that initializes the entire protected space to GPT_GPI_ANY using 222 * the L0 tables (block descriptors). Ideally, this function is invoked prior 223 * to DDR discovery and initialization. The MMU must be initialized before 224 * calling this function. 225 * 226 * Parameters 227 * pps PPS value to use for table generation 228 * l0_mem_base Base address of L0 tables in memory. 229 * l0_mem_size Total size of memory available for L0 tables. 230 * 231 * Return 232 * Negative Linux error code in the event of a failure, 0 for success. 233 */ 234 int gpt_init_l0_tables(gpccr_pps_e pps, 235 uintptr_t l0_mem_base, 236 size_t l0_mem_size); 237 238 /* 239 * Public API that carves out PAS regions from the L0 tables and builds any L1 240 * tables that are needed. This function ideally is run after DDR discovery and 241 * initialization. The L0 tables must have already been initialized to GPI_ANY 242 * when this function is called. 243 * 244 * Parameters 245 * pgs PGS value to use for table generation. 246 * l1_mem_base Base address of memory used for L1 tables. 247 * l1_mem_size Total size of memory available for L1 tables. 248 * *pas_regions Pointer to PAS regions structure array. 249 * pas_count Total number of PAS regions. 250 * 251 * Return 252 * Negative Linux error code in the event of a failure, 0 for success. 253 */ 254 int gpt_init_pas_l1_tables(gpccr_pgs_e pgs, 255 uintptr_t l1_mem_base, 256 size_t l1_mem_size, 257 pas_region_t *pas_regions, 258 unsigned int pas_count); 259 260 /* 261 * Public API to initialize the runtime gpt_config structure based on the values 262 * present in the GPTBR_EL3 and GPCCR_EL3 registers. GPT initialization 263 * typically happens in a bootloader stage prior to setting up the EL3 runtime 264 * environment for the granule transition service so this function detects the 265 * initialization from a previous stage. Granule protection checks must be 266 * enabled already or this function will return an error. 267 * 268 * Parameters 269 * l1_bitlocks_base Base address of memory for L1 tables bitlocks. 270 * l1_bitlocks_size Total size of memory available for L1 tables bitlocks. 271 * 272 * Return 273 * Negative Linux error code in the event of a failure, 0 for success. 274 */ 275 int gpt_runtime_init(uintptr_t l1_bitlocks_base, size_t l1_bitlocks_size); 276 277 /* 278 * Public API to enable granule protection checks once the tables have all been 279 * initialized. This function is called at first initialization and then again 280 * later during warm boots of CPU cores. 281 * 282 * Return 283 * Negative Linux error code in the event of a failure, 0 for success. 284 */ 285 int gpt_enable(void); 286 287 /* 288 * Public API to disable granule protection checks. 289 */ 290 void gpt_disable(void); 291 292 /* 293 * This function is the core of the granule transition service. When a granule 294 * transition request occurs it is routed to this function where the request is 295 * validated then fulfilled if possible. 296 * 297 * TODO: implement support for transitioning multiple granules at once. 298 * 299 * Parameters 300 * base: Base address of the region to transition, must be aligned to granule 301 * size. 302 * size: Size of region to transition, must be aligned to granule size. 303 * src_sec_state: Security state of the originating SMC invoking the API. 304 * 305 * Return 306 * Negative Linux error code in the event of a failure, 0 for success. 307 */ 308 int gpt_delegate_pas(uint64_t base, size_t size, unsigned int src_sec_state); 309 int gpt_undelegate_pas(uint64_t base, size_t size, unsigned int src_sec_state); 310 311 #endif /* GPT_RME_H */ 312