18fcd3d96SManish V Badarkhe /* 2*123002f9SJayanth Dodderi Chidanand * Copyright (c) 2021-2024, Arm Limited. All rights reserved. 38fcd3d96SManish V Badarkhe * 48fcd3d96SManish V Badarkhe * SPDX-License-Identifier: BSD-3-Clause 58fcd3d96SManish V Badarkhe */ 68fcd3d96SManish V Badarkhe 78fcd3d96SManish V Badarkhe #ifndef TRF_H 88fcd3d96SManish V Badarkhe #define TRF_H 98fcd3d96SManish V Badarkhe 10*123002f9SJayanth Dodderi Chidanand #include <context.h> 11*123002f9SJayanth Dodderi Chidanand 12e8f0dd58SJayanth Dodderi Chidanand #if ENABLE_TRF_FOR_NS 13*123002f9SJayanth Dodderi Chidanand 14*123002f9SJayanth Dodderi Chidanand #if __aarch64__ 15*123002f9SJayanth Dodderi Chidanand void trf_enable(cpu_context_t *ctx); 1660d330dcSBoyan Karatotev void trf_init_el2_unused(void); 17*123002f9SJayanth Dodderi Chidanand #else /* !__aarch64 */ 18*123002f9SJayanth Dodderi Chidanand void trf_init_el3(void); 19*123002f9SJayanth Dodderi Chidanand #endif /* __aarch64__ */ 20*123002f9SJayanth Dodderi Chidanand 21*123002f9SJayanth Dodderi Chidanand #else /* ENABLE_TRF_FOR_NS=0 */ 22*123002f9SJayanth Dodderi Chidanand 23*123002f9SJayanth Dodderi Chidanand #if __aarch64__ trf_enable(cpu_context_t * ctx)24*123002f9SJayanth Dodderi Chidanandstatic inline void trf_enable(cpu_context_t *ctx) 2560d330dcSBoyan Karatotev { 2660d330dcSBoyan Karatotev } trf_init_el2_unused(void)2760d330dcSBoyan Karatotevstatic inline void trf_init_el2_unused(void) 28e8f0dd58SJayanth Dodderi Chidanand { 29e8f0dd58SJayanth Dodderi Chidanand } 30*123002f9SJayanth Dodderi Chidanand #else /* !__aarch64 */ trf_init_el3(void)31*123002f9SJayanth Dodderi Chidanandstatic inline void trf_init_el3(void) 32*123002f9SJayanth Dodderi Chidanand { 33*123002f9SJayanth Dodderi Chidanand } 34*123002f9SJayanth Dodderi Chidanand #endif /* __aarch64__*/ 35*123002f9SJayanth Dodderi Chidanand 36e8f0dd58SJayanth Dodderi Chidanand #endif /* ENABLE_TRF_FOR_NS */ 378fcd3d96SManish V Badarkhe 388fcd3d96SManish V Badarkhe #endif /* TRF_H */ 39