1dc78e62dSjohpow01 /* 245007acdSJayanth Dodderi Chidanand * Copyright (c) 2021-2023, Arm Limited and Contributors. All rights reserved. 3dc78e62dSjohpow01 * 4dc78e62dSjohpow01 * SPDX-License-Identifier: BSD-3-Clause 5dc78e62dSjohpow01 */ 6dc78e62dSjohpow01 7dc78e62dSjohpow01 #ifndef SME_H 8dc78e62dSjohpow01 #define SME_H 9dc78e62dSjohpow01 10dc78e62dSjohpow01 #include <stdbool.h> 11dc78e62dSjohpow01 #include <context.h> 12dc78e62dSjohpow01 13dc78e62dSjohpow01 /* 14dc78e62dSjohpow01 * Maximum value of LEN field in SMCR_ELx. This is different than the maximum 15dc78e62dSjohpow01 * supported value which is platform dependent. In the first version of SME the 16dc78e62dSjohpow01 * LEN field is limited to 4 bits but will be expanded in future iterations. 17dc78e62dSjohpow01 * To support different versions, the code that discovers the supported vector 18dc78e62dSjohpow01 * lengths will write the max value into SMCR_ELx then read it back to see how 19dc78e62dSjohpow01 * many bits are implemented. 20dc78e62dSjohpow01 */ 21dc78e62dSjohpow01 #define SME_SMCR_LEN_MAX U(0x1FF) 22dc78e62dSjohpow01 2345007acdSJayanth Dodderi Chidanand #if ENABLE_SME_FOR_NS 24dc78e62dSjohpow01 void sme_enable(cpu_context_t *context); 25*60d330dcSBoyan Karatotev void sme_init_el3(void); 26*60d330dcSBoyan Karatotev void sme_init_el2_unused(void); 27dc78e62dSjohpow01 void sme_disable(cpu_context_t *context); 2845007acdSJayanth Dodderi Chidanand #else 2945007acdSJayanth Dodderi Chidanand static inline void sme_enable(cpu_context_t *context) 3045007acdSJayanth Dodderi Chidanand { 3145007acdSJayanth Dodderi Chidanand } 32*60d330dcSBoyan Karatotev static inline void sme_init_el3(void) 33*60d330dcSBoyan Karatotev { 34*60d330dcSBoyan Karatotev } 35*60d330dcSBoyan Karatotev static inline void sme_init_el2_unused(void) 36*60d330dcSBoyan Karatotev { 37*60d330dcSBoyan Karatotev } 3845007acdSJayanth Dodderi Chidanand static inline void sme_disable(cpu_context_t *context) 3945007acdSJayanth Dodderi Chidanand { 4045007acdSJayanth Dodderi Chidanand } 4145007acdSJayanth Dodderi Chidanand #endif /* ENABLE_SME_FOR_NS */ 42dc78e62dSjohpow01 43dc78e62dSjohpow01 #endif /* SME_H */ 44