1 /* 2 * Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef CPU_DATA_H 8 #define CPU_DATA_H 9 10 #include <ehf.h> 11 #include <platform_def.h> /* CACHE_WRITEBACK_GRANULE required */ 12 13 #ifdef AARCH32 14 15 #if CRASH_REPORTING 16 #error "Crash reporting is not supported in AArch32" 17 #endif 18 #define CPU_DATA_CPU_OPS_PTR 0x0 19 #define CPU_DATA_CRASH_BUF_OFFSET 0x4 20 21 #else /* AARCH32 */ 22 23 /* Offsets for the cpu_data structure */ 24 #define CPU_DATA_CRASH_BUF_OFFSET 0x18 25 /* need enough space in crash buffer to save 8 registers */ 26 #define CPU_DATA_CRASH_BUF_SIZE 64 27 #define CPU_DATA_CPU_OPS_PTR 0x10 28 29 #endif /* AARCH32 */ 30 31 #if CRASH_REPORTING 32 #define CPU_DATA_CRASH_BUF_END (CPU_DATA_CRASH_BUF_OFFSET + \ 33 CPU_DATA_CRASH_BUF_SIZE) 34 #else 35 #define CPU_DATA_CRASH_BUF_END CPU_DATA_CRASH_BUF_OFFSET 36 #endif 37 38 /* cpu_data size is the data size rounded up to the platform cache line size */ 39 #define CPU_DATA_SIZE (((CPU_DATA_CRASH_BUF_END + \ 40 CACHE_WRITEBACK_GRANULE - 1) / \ 41 CACHE_WRITEBACK_GRANULE) * \ 42 CACHE_WRITEBACK_GRANULE) 43 44 #if ENABLE_RUNTIME_INSTRUMENTATION 45 /* Temporary space to store PMF timestamps from assembly code */ 46 #define CPU_DATA_PMF_TS_COUNT 1 47 #define CPU_DATA_PMF_TS0_OFFSET CPU_DATA_CRASH_BUF_END 48 #define CPU_DATA_PMF_TS0_IDX 0 49 #endif 50 51 #ifndef __ASSEMBLY__ 52 53 #include <arch_helpers.h> 54 #include <cassert.h> 55 #include <platform_def.h> 56 #include <psci.h> 57 #include <stdint.h> 58 59 /* Offsets for the cpu_data structure */ 60 #define CPU_DATA_PSCI_LOCK_OFFSET __builtin_offsetof\ 61 (cpu_data_t, psci_svc_cpu_data.pcpu_bakery_info) 62 63 #if PLAT_PCPU_DATA_SIZE 64 #define CPU_DATA_PLAT_PCPU_OFFSET __builtin_offsetof\ 65 (cpu_data_t, platform_cpu_data) 66 #endif 67 68 /******************************************************************************* 69 * Function & variable prototypes 70 ******************************************************************************/ 71 72 /******************************************************************************* 73 * Cache of frequently used per-cpu data: 74 * Pointers to non-secure and secure security state contexts 75 * Address of the crash stack 76 * It is aligned to the cache line boundary to allow efficient concurrent 77 * manipulation of these pointers on different cpus 78 * 79 * TODO: Add other commonly used variables to this (tf_issues#90) 80 * 81 * The data structure and the _cpu_data accessors should not be used directly 82 * by components that have per-cpu members. The member access macros should be 83 * used for this. 84 ******************************************************************************/ 85 typedef struct cpu_data { 86 #ifndef AARCH32 87 void *cpu_context[2]; 88 #endif 89 uintptr_t cpu_ops_ptr; 90 #if CRASH_REPORTING 91 u_register_t crash_buf[CPU_DATA_CRASH_BUF_SIZE >> 3]; 92 #endif 93 #if ENABLE_RUNTIME_INSTRUMENTATION 94 uint64_t cpu_data_pmf_ts[CPU_DATA_PMF_TS_COUNT]; 95 #endif 96 struct psci_cpu_data psci_svc_cpu_data; 97 #if PLAT_PCPU_DATA_SIZE 98 uint8_t platform_cpu_data[PLAT_PCPU_DATA_SIZE]; 99 #endif 100 #if defined(IMAGE_BL31) && EL3_EXCEPTION_HANDLING 101 pe_exc_data_t ehf_data; 102 #endif 103 } __aligned(CACHE_WRITEBACK_GRANULE) cpu_data_t; 104 105 extern cpu_data_t percpu_data[PLATFORM_CORE_COUNT]; 106 107 #if CRASH_REPORTING 108 /* verify assembler offsets match data structures */ 109 CASSERT(CPU_DATA_CRASH_BUF_OFFSET == __builtin_offsetof 110 (cpu_data_t, crash_buf), 111 assert_cpu_data_crash_stack_offset_mismatch); 112 #endif 113 114 CASSERT(CPU_DATA_SIZE == sizeof(cpu_data_t), 115 assert_cpu_data_size_mismatch); 116 117 CASSERT(CPU_DATA_CPU_OPS_PTR == __builtin_offsetof 118 (cpu_data_t, cpu_ops_ptr), 119 assert_cpu_data_cpu_ops_ptr_offset_mismatch); 120 121 #if ENABLE_RUNTIME_INSTRUMENTATION 122 CASSERT(CPU_DATA_PMF_TS0_OFFSET == __builtin_offsetof 123 (cpu_data_t, cpu_data_pmf_ts[0]), 124 assert_cpu_data_pmf_ts0_offset_mismatch); 125 #endif 126 127 struct cpu_data *_cpu_data_by_index(uint32_t cpu_index); 128 129 #ifndef AARCH32 130 /* Return the cpu_data structure for the current CPU. */ 131 static inline struct cpu_data *_cpu_data(void) 132 { 133 return (cpu_data_t *)read_tpidr_el3(); 134 } 135 #else 136 struct cpu_data *_cpu_data(void); 137 #endif 138 139 /************************************************************************** 140 * APIs for initialising and accessing per-cpu data 141 *************************************************************************/ 142 143 void init_cpu_data_ptr(void); 144 void init_cpu_ops(void); 145 146 #define get_cpu_data(_m) _cpu_data()->_m 147 #define set_cpu_data(_m, _v) _cpu_data()->_m = (_v) 148 #define get_cpu_data_by_index(_ix, _m) _cpu_data_by_index(_ix)->_m 149 #define set_cpu_data_by_index(_ix, _m, _v) _cpu_data_by_index(_ix)->_m = (_v) 150 /* ((cpu_data_t *)0)->_m is a dummy to get the sizeof the struct member _m */ 151 #define flush_cpu_data(_m) flush_dcache_range((uintptr_t) \ 152 &(_cpu_data()->_m), \ 153 sizeof(((cpu_data_t *)0)->_m)) 154 #define inv_cpu_data(_m) inv_dcache_range((uintptr_t) \ 155 &(_cpu_data()->_m), \ 156 sizeof(((cpu_data_t *)0)->_m)) 157 #define flush_cpu_data_by_index(_ix, _m) \ 158 flush_dcache_range((uintptr_t) \ 159 &(_cpu_data_by_index(_ix)->_m), \ 160 sizeof(((cpu_data_t *)0)->_m)) 161 162 163 #endif /* __ASSEMBLY__ */ 164 #endif /* CPU_DATA_H */ 165