xref: /rk3399_ARM-atf/include/lib/el3_runtime/cpu_data.h (revision 127828af437b3e424d4369d6d146b43a0bbd38a5)
1 /*
2  * Copyright (c) 2014-2025, Arm Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef CPU_DATA_H
8 #define CPU_DATA_H
9 
10 #include <platform_def.h>	/* CACHE_WRITEBACK_GRANULE required */
11 
12 #include <bl31/ehf.h>
13 #include <context.h>
14 #include <lib/utils_def.h>
15 #include <lib/cpus/cpu_ops.h>
16 
17 /* need enough space in crash buffer to save 8 registers */
18 #define CPU_DATA_CRASH_BUF_BYTES	64
19 #if ENABLE_RUNTIME_INSTRUMENTATION
20 /* Temporary space to store PMF timestamps from assembly code */
21 #define CPU_DATA_PMF_TS_COUNT		1
22 #define CPU_DATA_PMF_TS0_IDX		0
23 #endif
24 
25 #ifdef __aarch64__
26 #define CPU_DATA_CPU_CONTEXT_SIZE	(CPU_CONTEXT_NUM * CPU_WORD_SIZE)
27 #else /* __aarch64__ */
28 #define CPU_DATA_CPU_CONTEXT_SIZE	0
29 #endif /* __aarch64__ */
30 #define CPU_DATA_WARMBOOT_EP_INFO_SIZE	CPU_WORD_SIZE
31 #define CPU_DATA_WARMBOOT_EP_INFO_ALIGN	CPU_WORD_SIZE
32 #define CPU_DATA_CPU_OPS_PTR_SIZE	CPU_WORD_SIZE
33 #define CPU_DATA_CPU_OPS_PTR_ALIGN	CPU_WORD_SIZE
34 #define CPU_DATA_PSCI_SVC_CPU_DATA_SIZE 12
35 #define CPU_DATA_PSCI_SVC_CPU_DATA_ALIGN CPU_WORD_SIZE
36 #if ENABLE_PAUTH
37 /* uint64_t apiakey[2] */
38 #define CPU_DATA_APIAKEY_SIZE		16
39 /* uint64_t alignement */
40 #define CPU_DATA_APIAKEY_ALIGN		8
41 #else /* ENABLE_PAUTH */
42 #define CPU_DATA_APIAKEY_SIZE		0
43 #define CPU_DATA_APIAKEY_ALIGN		1
44 #endif /* ENABLE_PAUTH */
45 #if CRASH_REPORTING
46 #define CPU_DATA_CRASH_BUF_SIZE		((CPU_DATA_CRASH_BUF_BYTES >> 3) * CPU_WORD_SIZE)
47 #define CPU_DATA_CRASH_BUF_ALIGN	CPU_WORD_SIZE
48 #else /* CRASH_REPORTING */
49 #define CPU_DATA_CRASH_BUF_SIZE		0
50 #define CPU_DATA_CRASH_BUF_ALIGN	1
51 #endif /* CRASH_REPORTING */
52 #if ENABLE_RUNTIME_INSTRUMENTATION
53 #define CPU_DATA_CPU_DATA_PMF_TS_SIZE	(CPU_DATA_PMF_TS_COUNT * 8)
54 /* uint64_t alignement */
55 #define CPU_DATA_CPU_DATA_PMF_TS_ALIGN	8
56 #else /* ENABLE_RUNTIME_INSTRUMENTATION */
57 #define CPU_DATA_CPU_DATA_PMF_TS_SIZE	0
58 #define CPU_DATA_CPU_DATA_PMF_TS_ALIGN	1
59 #endif /* ENABLE_RUNTIME_INSTRUMENTATION */
60 #ifdef PLAT_PCPU_DATA_SIZE
61 #define CPU_DATA_PLATFORM_CPU_DATA_SIZE	PLAT_PCPU_DATA_SIZE
62 #define CPU_DATA_PLATFORM_CPU_DATA_ALIGN 1
63 #else /* PLAT_PCPU_DATA_SIZE */
64 #define CPU_DATA_PLATFORM_CPU_DATA_SIZE	0
65 #define CPU_DATA_PLATFORM_CPU_DATA_ALIGN 1
66 #endif /* PLAT_PCPU_DATA_SIZE */
67 #if EL3_EXCEPTION_HANDLING
68 /* buffer space for EHF data is sizeof(pe_exc_data_t) */
69 #define CPU_DATA_EHF_DATA_SIZE		8
70 /* hardcoded to 64 bit alignment */
71 #define CPU_DATA_EHF_DATA_ALIGN		8
72 #else /* EL3_EXCEPTION_HANDLING */
73 #define CPU_DATA_EHF_DATA_SIZE		0
74 #define CPU_DATA_EHF_DATA_ALIGN		1
75 #endif
76 /* cpu_data size is the data size rounded up to the platform cache line size */
77 #define CPU_DATA_SIZE_ALIGN		CACHE_WRITEBACK_GRANULE
78 
79 #define CPU_DATA_CPU_CONTEXT		0
80 #define CPU_DATA_WARMBOOT_EP_INFO	ROUND_UP_2EVAL((CPU_DATA_CPU_CONTEXT + CPU_DATA_CPU_CONTEXT_SIZE), CPU_DATA_CPU_OPS_PTR_ALIGN)
81 #define CPU_DATA_CPU_OPS_PTR		ROUND_UP_2EVAL((CPU_DATA_WARMBOOT_EP_INFO + CPU_DATA_WARMBOOT_EP_INFO_SIZE), CPU_DATA_CPU_OPS_PTR_ALIGN)
82 #define CPU_DATA_PSCI_SVC_CPU_DATA	ROUND_UP_2EVAL((CPU_DATA_CPU_OPS_PTR + CPU_DATA_CPU_OPS_PTR_SIZE), CPU_DATA_PSCI_SVC_CPU_DATA_ALIGN)
83 #define CPU_DATA_APIAKEY		ROUND_UP_2EVAL((CPU_DATA_PSCI_SVC_CPU_DATA + CPU_DATA_PSCI_SVC_CPU_DATA_SIZE), CPU_DATA_APIAKEY_ALIGN)
84 #define CPU_DATA_CRASH_BUF		ROUND_UP_2EVAL((CPU_DATA_APIAKEY + CPU_DATA_APIAKEY_SIZE), CPU_DATA_CRASH_BUF_ALIGN)
85 #define CPU_DATA_CPU_DATA_PMF_TS	ROUND_UP_2EVAL((CPU_DATA_CRASH_BUF + CPU_DATA_CRASH_BUF_SIZE), CPU_DATA_CPU_DATA_PMF_TS_ALIGN)
86 #define CPU_DATA_PLATFORM_CPU_DATA	ROUND_UP_2EVAL((CPU_DATA_CPU_DATA_PMF_TS + CPU_DATA_CPU_DATA_PMF_TS_SIZE), CPU_DATA_PLATFORM_CPU_DATA_ALIGN)
87 #define CPU_DATA_EHF_DATA		ROUND_UP_2EVAL((CPU_DATA_PLATFORM_CPU_DATA + CPU_DATA_PLATFORM_CPU_DATA_SIZE), CPU_DATA_EHF_DATA_ALIGN)
88 #define CPU_DATA_SIZE			ROUND_UP_2EVAL((CPU_DATA_EHF_DATA + CPU_DATA_EHF_DATA_SIZE), CPU_DATA_SIZE_ALIGN)
89 
90 #ifndef __ASSEMBLER__
91 
92 #include <assert.h>
93 #include <stdint.h>
94 
95 #include <arch_helpers.h>
96 #include <lib/cassert.h>
97 #include <lib/psci/psci.h>
98 
99 #include <platform_def.h>
100 
101 /*******************************************************************************
102  * Function & variable prototypes
103  ******************************************************************************/
104 
105 /*******************************************************************************
106  * Cache of frequently used per-cpu data:
107  *   Pointers to non-secure, realm, and secure security state contexts
108  *   Address of the crash stack
109  * It is aligned to the cache line boundary to allow efficient concurrent
110  * manipulation of these pointers on different cpus
111  *
112  * The data structure and the _cpu_data accessors should not be used directly
113  * by components that have per-cpu members. The member access macros should be
114  * used for this.
115  ******************************************************************************/
116 typedef struct cpu_data {
117 #ifdef __aarch64__
118 	void *cpu_context[CPU_CONTEXT_NUM];
119 #endif /* __aarch64__ */
120 	entry_point_info_t *warmboot_ep_info;
121 	struct cpu_ops *cpu_ops_ptr;
122 	struct psci_cpu_data psci_svc_cpu_data;
123 #if ENABLE_PAUTH
124 	uint64_t apiakey[2];
125 #endif
126 #if CRASH_REPORTING
127 	u_register_t crash_buf[CPU_DATA_CRASH_BUF_BYTES >> 3];
128 #endif
129 #if ENABLE_RUNTIME_INSTRUMENTATION
130 	uint64_t cpu_data_pmf_ts[CPU_DATA_PMF_TS_COUNT];
131 #endif
132 #if PLAT_PCPU_DATA_SIZE
133 	uint8_t platform_cpu_data[PLAT_PCPU_DATA_SIZE];
134 #endif
135 #if EL3_EXCEPTION_HANDLING
136 	pe_exc_data_t ehf_data;
137 #endif
138 } __aligned(CACHE_WRITEBACK_GRANULE) cpu_data_t;
139 
140 extern cpu_data_t percpu_data[PLATFORM_CORE_COUNT];
141 
142 #define CPU_DATA_ASSERT_OFFSET(left, right) \
143 	CASSERT(CPU_DATA_ ## left == __builtin_offsetof \
144 		(cpu_data_t, right), \
145 		assert_cpu_data_ ## right ## _mismatch)
146 
147 /* verify assembler offsets match data structures */
148 CPU_DATA_ASSERT_OFFSET(WARMBOOT_EP_INFO, warmboot_ep_info);
149 CPU_DATA_ASSERT_OFFSET(CPU_OPS_PTR, cpu_ops_ptr);
150 CPU_DATA_ASSERT_OFFSET(PSCI_SVC_CPU_DATA, psci_svc_cpu_data);
151 #if ENABLE_PAUTH
152 CPU_DATA_ASSERT_OFFSET(APIAKEY, apiakey);
153 #endif
154 #if CRASH_REPORTING
155 CPU_DATA_ASSERT_OFFSET(CRASH_BUF, crash_buf);
156 #endif
157 #if ENABLE_RUNTIME_INSTRUMENTATION
158 CPU_DATA_ASSERT_OFFSET(CPU_DATA_PMF_TS, cpu_data_pmf_ts);
159 #endif
160 #if PLAT_PCPU_DATA_SIZE
161 CPU_DATA_ASSERT_OFFSET(PLATFORM_CPU_DATA, platform_cpu_data);
162 #endif
163 #if EL3_EXCEPTION_HANDLING
164 CPU_DATA_ASSERT_OFFSET(EHF_DATA, ehf_data);
165 #endif
166 
167 CASSERT(CPU_DATA_SIZE == sizeof(cpu_data_t),
168 		assert_cpu_data_size_mismatch);
169 
170 static inline cpu_data_t *_cpu_data_by_index(unsigned int cpu_index)
171 {
172 	return &percpu_data[cpu_index];
173 }
174 
175 #ifdef __aarch64__
176 /* Return the cpu_data structure for the current CPU. */
177 static inline cpu_data_t *_cpu_data(void)
178 {
179 	return (cpu_data_t *)read_tpidr_el3();
180 }
181 #else
182 cpu_data_t *_cpu_data(void);
183 #endif
184 
185 /**************************************************************************
186  * APIs for initialising and accessing per-cpu data
187  *************************************************************************/
188 
189 void cpu_data_init_cpu_ops(void);
190 
191 #define get_cpu_data(_m)		   _cpu_data()->_m
192 #define set_cpu_data(_m, _v)		   _cpu_data()->_m = (_v)
193 #define get_cpu_data_by_index(_ix, _m)	   _cpu_data_by_index(_ix)->_m
194 #define set_cpu_data_by_index(_ix, _m, _v) _cpu_data_by_index(_ix)->_m = (_v)
195 /* ((cpu_data_t *)0)->_m is a dummy to get the sizeof the struct member _m */
196 #define flush_cpu_data(_m)	   flush_dcache_range((uintptr_t)	  \
197 						&(_cpu_data()->_m), \
198 						sizeof(((cpu_data_t *)0)->_m))
199 #define inv_cpu_data(_m)	   inv_dcache_range((uintptr_t)	  	  \
200 						&(_cpu_data()->_m), \
201 						sizeof(((cpu_data_t *)0)->_m))
202 #define flush_cpu_data_by_index(_ix, _m)	\
203 				   flush_dcache_range((uintptr_t)	  \
204 					 &(_cpu_data_by_index(_ix)->_m),  \
205 						sizeof(((cpu_data_t *)0)->_m))
206 
207 
208 #endif /* __ASSEMBLER__ */
209 #endif /* CPU_DATA_H */
210