1532ed618SSoby Mathew /* 2532ed618SSoby Mathew * Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved. 3532ed618SSoby Mathew * 4532ed618SSoby Mathew * Redistribution and use in source and binary forms, with or without 5532ed618SSoby Mathew * modification, are permitted provided that the following conditions are met: 6532ed618SSoby Mathew * 7532ed618SSoby Mathew * Redistributions of source code must retain the above copyright notice, this 8532ed618SSoby Mathew * list of conditions and the following disclaimer. 9532ed618SSoby Mathew * 10532ed618SSoby Mathew * Redistributions in binary form must reproduce the above copyright notice, 11532ed618SSoby Mathew * this list of conditions and the following disclaimer in the documentation 12532ed618SSoby Mathew * and/or other materials provided with the distribution. 13532ed618SSoby Mathew * 14532ed618SSoby Mathew * Neither the name of ARM nor the names of its contributors may be used 15532ed618SSoby Mathew * to endorse or promote products derived from this software without specific 16532ed618SSoby Mathew * prior written permission. 17532ed618SSoby Mathew * 18532ed618SSoby Mathew * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19532ed618SSoby Mathew * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20532ed618SSoby Mathew * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21532ed618SSoby Mathew * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22532ed618SSoby Mathew * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23532ed618SSoby Mathew * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24532ed618SSoby Mathew * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25532ed618SSoby Mathew * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26532ed618SSoby Mathew * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27532ed618SSoby Mathew * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28532ed618SSoby Mathew * POSSIBILITY OF SUCH DAMAGE. 29532ed618SSoby Mathew */ 30532ed618SSoby Mathew 31532ed618SSoby Mathew #ifndef __CPU_DATA_H__ 32532ed618SSoby Mathew #define __CPU_DATA_H__ 33532ed618SSoby Mathew 34*e33b78a6SSoby Mathew #ifdef AARCH32 35*e33b78a6SSoby Mathew 36*e33b78a6SSoby Mathew #if CRASH_REPORTING 37*e33b78a6SSoby Mathew #error "Crash reporting is not supported in AArch32" 38*e33b78a6SSoby Mathew #endif 39*e33b78a6SSoby Mathew #define CPU_DATA_CPU_OPS_PTR 0x0 40*e33b78a6SSoby Mathew 41*e33b78a6SSoby Mathew #else /* AARCH32 */ 42*e33b78a6SSoby Mathew 43532ed618SSoby Mathew /* Offsets for the cpu_data structure */ 44532ed618SSoby Mathew #define CPU_DATA_CRASH_BUF_OFFSET 0x18 45*e33b78a6SSoby Mathew /* need enough space in crash buffer to save 8 registers */ 46*e33b78a6SSoby Mathew #define CPU_DATA_CRASH_BUF_SIZE 64 47*e33b78a6SSoby Mathew #define CPU_DATA_CPU_OPS_PTR 0x10 48*e33b78a6SSoby Mathew 49*e33b78a6SSoby Mathew #endif /* AARCH32 */ 50*e33b78a6SSoby Mathew 51532ed618SSoby Mathew #if CRASH_REPORTING 52532ed618SSoby Mathew #define CPU_DATA_LOG2SIZE 7 53532ed618SSoby Mathew #else 54532ed618SSoby Mathew #define CPU_DATA_LOG2SIZE 6 55532ed618SSoby Mathew #endif 56532ed618SSoby Mathew 57532ed618SSoby Mathew #ifndef __ASSEMBLY__ 58532ed618SSoby Mathew 59532ed618SSoby Mathew #include <arch_helpers.h> 60532ed618SSoby Mathew #include <cassert.h> 61532ed618SSoby Mathew #include <platform_def.h> 62532ed618SSoby Mathew #include <psci.h> 63532ed618SSoby Mathew #include <stdint.h> 64532ed618SSoby Mathew 65532ed618SSoby Mathew /* Offsets for the cpu_data structure */ 66532ed618SSoby Mathew #define CPU_DATA_PSCI_LOCK_OFFSET __builtin_offsetof\ 67532ed618SSoby Mathew (cpu_data_t, psci_svc_cpu_data.pcpu_bakery_info) 68532ed618SSoby Mathew 69532ed618SSoby Mathew #if PLAT_PCPU_DATA_SIZE 70532ed618SSoby Mathew #define CPU_DATA_PLAT_PCPU_OFFSET __builtin_offsetof\ 71532ed618SSoby Mathew (cpu_data_t, platform_cpu_data) 72532ed618SSoby Mathew #endif 73532ed618SSoby Mathew 74532ed618SSoby Mathew /******************************************************************************* 75532ed618SSoby Mathew * Function & variable prototypes 76532ed618SSoby Mathew ******************************************************************************/ 77532ed618SSoby Mathew 78532ed618SSoby Mathew /******************************************************************************* 79532ed618SSoby Mathew * Cache of frequently used per-cpu data: 80532ed618SSoby Mathew * Pointers to non-secure and secure security state contexts 81532ed618SSoby Mathew * Address of the crash stack 82532ed618SSoby Mathew * It is aligned to the cache line boundary to allow efficient concurrent 83532ed618SSoby Mathew * manipulation of these pointers on different cpus 84532ed618SSoby Mathew * 85532ed618SSoby Mathew * TODO: Add other commonly used variables to this (tf_issues#90) 86532ed618SSoby Mathew * 87532ed618SSoby Mathew * The data structure and the _cpu_data accessors should not be used directly 88532ed618SSoby Mathew * by components that have per-cpu members. The member access macros should be 89532ed618SSoby Mathew * used for this. 90532ed618SSoby Mathew ******************************************************************************/ 91532ed618SSoby Mathew typedef struct cpu_data { 92*e33b78a6SSoby Mathew #ifndef AARCH32 93532ed618SSoby Mathew void *cpu_context[2]; 94*e33b78a6SSoby Mathew #endif 95532ed618SSoby Mathew uintptr_t cpu_ops_ptr; 96532ed618SSoby Mathew #if CRASH_REPORTING 97532ed618SSoby Mathew u_register_t crash_buf[CPU_DATA_CRASH_BUF_SIZE >> 3]; 98532ed618SSoby Mathew #endif 99532ed618SSoby Mathew struct psci_cpu_data psci_svc_cpu_data; 100532ed618SSoby Mathew #if PLAT_PCPU_DATA_SIZE 101532ed618SSoby Mathew uint8_t platform_cpu_data[PLAT_PCPU_DATA_SIZE]; 102532ed618SSoby Mathew #endif 103532ed618SSoby Mathew } __aligned(CACHE_WRITEBACK_GRANULE) cpu_data_t; 104532ed618SSoby Mathew 105532ed618SSoby Mathew #if CRASH_REPORTING 106532ed618SSoby Mathew /* verify assembler offsets match data structures */ 107532ed618SSoby Mathew CASSERT(CPU_DATA_CRASH_BUF_OFFSET == __builtin_offsetof 108532ed618SSoby Mathew (cpu_data_t, crash_buf), 109532ed618SSoby Mathew assert_cpu_data_crash_stack_offset_mismatch); 110532ed618SSoby Mathew #endif 111532ed618SSoby Mathew 112532ed618SSoby Mathew CASSERT((1 << CPU_DATA_LOG2SIZE) == sizeof(cpu_data_t), 113532ed618SSoby Mathew assert_cpu_data_log2size_mismatch); 114532ed618SSoby Mathew 115532ed618SSoby Mathew CASSERT(CPU_DATA_CPU_OPS_PTR == __builtin_offsetof 116532ed618SSoby Mathew (cpu_data_t, cpu_ops_ptr), 117532ed618SSoby Mathew assert_cpu_data_cpu_ops_ptr_offset_mismatch); 118532ed618SSoby Mathew 119532ed618SSoby Mathew struct cpu_data *_cpu_data_by_index(uint32_t cpu_index); 120532ed618SSoby Mathew 121*e33b78a6SSoby Mathew #ifndef AARCH32 122532ed618SSoby Mathew /* Return the cpu_data structure for the current CPU. */ 123532ed618SSoby Mathew static inline struct cpu_data *_cpu_data(void) 124532ed618SSoby Mathew { 125532ed618SSoby Mathew return (cpu_data_t *)read_tpidr_el3(); 126532ed618SSoby Mathew } 127*e33b78a6SSoby Mathew #else 128*e33b78a6SSoby Mathew struct cpu_data *_cpu_data(void); 129*e33b78a6SSoby Mathew #endif 130532ed618SSoby Mathew 131532ed618SSoby Mathew /************************************************************************** 132532ed618SSoby Mathew * APIs for initialising and accessing per-cpu data 133532ed618SSoby Mathew *************************************************************************/ 134532ed618SSoby Mathew 135532ed618SSoby Mathew void init_cpu_data_ptr(void); 136532ed618SSoby Mathew void init_cpu_ops(void); 137532ed618SSoby Mathew 138532ed618SSoby Mathew #define get_cpu_data(_m) _cpu_data()->_m 139532ed618SSoby Mathew #define set_cpu_data(_m, _v) _cpu_data()->_m = _v 140532ed618SSoby Mathew #define get_cpu_data_by_index(_ix, _m) _cpu_data_by_index(_ix)->_m 141532ed618SSoby Mathew #define set_cpu_data_by_index(_ix, _m, _v) _cpu_data_by_index(_ix)->_m = _v 142532ed618SSoby Mathew 143532ed618SSoby Mathew #define flush_cpu_data(_m) flush_dcache_range((uintptr_t) \ 144532ed618SSoby Mathew &(_cpu_data()->_m), \ 145532ed618SSoby Mathew sizeof(_cpu_data()->_m)) 146532ed618SSoby Mathew #define inv_cpu_data(_m) inv_dcache_range((uintptr_t) \ 147532ed618SSoby Mathew &(_cpu_data()->_m), \ 148532ed618SSoby Mathew sizeof(_cpu_data()->_m)) 149532ed618SSoby Mathew #define flush_cpu_data_by_index(_ix, _m) \ 150532ed618SSoby Mathew flush_dcache_range((uintptr_t) \ 151532ed618SSoby Mathew &(_cpu_data_by_index(_ix)->_m), \ 152532ed618SSoby Mathew sizeof(_cpu_data_by_index(_ix)->_m)) 153532ed618SSoby Mathew 154532ed618SSoby Mathew 155532ed618SSoby Mathew #endif /* __ASSEMBLY__ */ 156532ed618SSoby Mathew #endif /* __CPU_DATA_H__ */ 157