xref: /rk3399_ARM-atf/include/lib/el3_runtime/cpu_data.h (revision 21b818c05fa4ec8cec468aad690267c5be930ccd)
1532ed618SSoby Mathew /*
2*21b818c0SJeenu Viswambharan  * Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved.
3532ed618SSoby Mathew  *
482cb2c1aSdp-arm  * SPDX-License-Identifier: BSD-3-Clause
5532ed618SSoby Mathew  */
6532ed618SSoby Mathew 
7532ed618SSoby Mathew #ifndef __CPU_DATA_H__
8532ed618SSoby Mathew #define __CPU_DATA_H__
9532ed618SSoby Mathew 
10*21b818c0SJeenu Viswambharan #include <ehf.h>
1186606eb5SEtienne Carriere #include <platform_def.h>	/* CACHE_WRITEBACK_GRANULE required */
1286606eb5SEtienne Carriere 
13e33b78a6SSoby Mathew #ifdef AARCH32
14e33b78a6SSoby Mathew 
15e33b78a6SSoby Mathew #if CRASH_REPORTING
16e33b78a6SSoby Mathew #error "Crash reporting is not supported in AArch32"
17e33b78a6SSoby Mathew #endif
18e33b78a6SSoby Mathew #define CPU_DATA_CPU_OPS_PTR		0x0
1986606eb5SEtienne Carriere #define CPU_DATA_CRASH_BUF_OFFSET	0x4
20e33b78a6SSoby Mathew 
21e33b78a6SSoby Mathew #else /* AARCH32 */
22e33b78a6SSoby Mathew 
23532ed618SSoby Mathew /* Offsets for the cpu_data structure */
24532ed618SSoby Mathew #define CPU_DATA_CRASH_BUF_OFFSET	0x18
25e33b78a6SSoby Mathew /* need enough space in crash buffer to save 8 registers */
26e33b78a6SSoby Mathew #define CPU_DATA_CRASH_BUF_SIZE		64
27e33b78a6SSoby Mathew #define CPU_DATA_CPU_OPS_PTR		0x10
28e33b78a6SSoby Mathew 
29e33b78a6SSoby Mathew #endif /* AARCH32 */
30e33b78a6SSoby Mathew 
31532ed618SSoby Mathew #if CRASH_REPORTING
32872be88aSdp-arm #define CPU_DATA_CRASH_BUF_END		(CPU_DATA_CRASH_BUF_OFFSET + \
33872be88aSdp-arm 						CPU_DATA_CRASH_BUF_SIZE)
34532ed618SSoby Mathew #else
35872be88aSdp-arm #define CPU_DATA_CRASH_BUF_END		CPU_DATA_CRASH_BUF_OFFSET
36872be88aSdp-arm #endif
37872be88aSdp-arm 
3886606eb5SEtienne Carriere /* cpu_data size is the data size rounded up to the platform cache line size */
3986606eb5SEtienne Carriere #define CPU_DATA_SIZE			(((CPU_DATA_CRASH_BUF_END + \
4086606eb5SEtienne Carriere 					CACHE_WRITEBACK_GRANULE - 1) / \
4186606eb5SEtienne Carriere 						CACHE_WRITEBACK_GRANULE) * \
4286606eb5SEtienne Carriere 							CACHE_WRITEBACK_GRANULE)
4386606eb5SEtienne Carriere 
44872be88aSdp-arm #if ENABLE_RUNTIME_INSTRUMENTATION
45872be88aSdp-arm /* Temporary space to store PMF timestamps from assembly code */
46872be88aSdp-arm #define CPU_DATA_PMF_TS_COUNT		1
47872be88aSdp-arm #define CPU_DATA_PMF_TS0_OFFSET		CPU_DATA_CRASH_BUF_END
48872be88aSdp-arm #define CPU_DATA_PMF_TS0_IDX		0
49532ed618SSoby Mathew #endif
50532ed618SSoby Mathew 
51532ed618SSoby Mathew #ifndef __ASSEMBLY__
52532ed618SSoby Mathew 
53532ed618SSoby Mathew #include <arch_helpers.h>
54532ed618SSoby Mathew #include <cassert.h>
55532ed618SSoby Mathew #include <platform_def.h>
56532ed618SSoby Mathew #include <psci.h>
57532ed618SSoby Mathew #include <stdint.h>
58532ed618SSoby Mathew 
59532ed618SSoby Mathew /* Offsets for the cpu_data structure */
60532ed618SSoby Mathew #define CPU_DATA_PSCI_LOCK_OFFSET	__builtin_offsetof\
61532ed618SSoby Mathew 		(cpu_data_t, psci_svc_cpu_data.pcpu_bakery_info)
62532ed618SSoby Mathew 
63532ed618SSoby Mathew #if PLAT_PCPU_DATA_SIZE
64532ed618SSoby Mathew #define CPU_DATA_PLAT_PCPU_OFFSET	__builtin_offsetof\
65532ed618SSoby Mathew 		(cpu_data_t, platform_cpu_data)
66532ed618SSoby Mathew #endif
67532ed618SSoby Mathew 
68532ed618SSoby Mathew /*******************************************************************************
69532ed618SSoby Mathew  * Function & variable prototypes
70532ed618SSoby Mathew  ******************************************************************************/
71532ed618SSoby Mathew 
72532ed618SSoby Mathew /*******************************************************************************
73532ed618SSoby Mathew  * Cache of frequently used per-cpu data:
74532ed618SSoby Mathew  *   Pointers to non-secure and secure security state contexts
75532ed618SSoby Mathew  *   Address of the crash stack
76532ed618SSoby Mathew  * It is aligned to the cache line boundary to allow efficient concurrent
77532ed618SSoby Mathew  * manipulation of these pointers on different cpus
78532ed618SSoby Mathew  *
79532ed618SSoby Mathew  * TODO: Add other commonly used variables to this (tf_issues#90)
80532ed618SSoby Mathew  *
81532ed618SSoby Mathew  * The data structure and the _cpu_data accessors should not be used directly
82532ed618SSoby Mathew  * by components that have per-cpu members. The member access macros should be
83532ed618SSoby Mathew  * used for this.
84532ed618SSoby Mathew  ******************************************************************************/
85532ed618SSoby Mathew typedef struct cpu_data {
86e33b78a6SSoby Mathew #ifndef AARCH32
87532ed618SSoby Mathew 	void *cpu_context[2];
88e33b78a6SSoby Mathew #endif
89532ed618SSoby Mathew 	uintptr_t cpu_ops_ptr;
90532ed618SSoby Mathew #if CRASH_REPORTING
91532ed618SSoby Mathew 	u_register_t crash_buf[CPU_DATA_CRASH_BUF_SIZE >> 3];
92532ed618SSoby Mathew #endif
93872be88aSdp-arm #if ENABLE_RUNTIME_INSTRUMENTATION
94872be88aSdp-arm 	uint64_t cpu_data_pmf_ts[CPU_DATA_PMF_TS_COUNT];
95872be88aSdp-arm #endif
96532ed618SSoby Mathew 	struct psci_cpu_data psci_svc_cpu_data;
97532ed618SSoby Mathew #if PLAT_PCPU_DATA_SIZE
98532ed618SSoby Mathew 	uint8_t platform_cpu_data[PLAT_PCPU_DATA_SIZE];
99532ed618SSoby Mathew #endif
100*21b818c0SJeenu Viswambharan #if defined(IMAGE_BL31) && EL3_EXCEPTION_HANDLING
101*21b818c0SJeenu Viswambharan 	pe_exc_data_t ehf_data;
102*21b818c0SJeenu Viswambharan #endif
103532ed618SSoby Mathew } __aligned(CACHE_WRITEBACK_GRANULE) cpu_data_t;
104532ed618SSoby Mathew 
105532ed618SSoby Mathew #if CRASH_REPORTING
106532ed618SSoby Mathew /* verify assembler offsets match data structures */
107532ed618SSoby Mathew CASSERT(CPU_DATA_CRASH_BUF_OFFSET == __builtin_offsetof
108532ed618SSoby Mathew 	(cpu_data_t, crash_buf),
109532ed618SSoby Mathew 	assert_cpu_data_crash_stack_offset_mismatch);
110532ed618SSoby Mathew #endif
111532ed618SSoby Mathew 
11286606eb5SEtienne Carriere CASSERT(CPU_DATA_SIZE == sizeof(cpu_data_t),
11386606eb5SEtienne Carriere 		assert_cpu_data_size_mismatch);
114532ed618SSoby Mathew 
115532ed618SSoby Mathew CASSERT(CPU_DATA_CPU_OPS_PTR == __builtin_offsetof
116532ed618SSoby Mathew 		(cpu_data_t, cpu_ops_ptr),
117532ed618SSoby Mathew 		assert_cpu_data_cpu_ops_ptr_offset_mismatch);
118532ed618SSoby Mathew 
119872be88aSdp-arm #if ENABLE_RUNTIME_INSTRUMENTATION
120872be88aSdp-arm CASSERT(CPU_DATA_PMF_TS0_OFFSET == __builtin_offsetof
121872be88aSdp-arm 		(cpu_data_t, cpu_data_pmf_ts[0]),
122872be88aSdp-arm 		assert_cpu_data_pmf_ts0_offset_mismatch);
123872be88aSdp-arm #endif
124872be88aSdp-arm 
125532ed618SSoby Mathew struct cpu_data *_cpu_data_by_index(uint32_t cpu_index);
126532ed618SSoby Mathew 
127e33b78a6SSoby Mathew #ifndef AARCH32
128532ed618SSoby Mathew /* Return the cpu_data structure for the current CPU. */
129532ed618SSoby Mathew static inline struct cpu_data *_cpu_data(void)
130532ed618SSoby Mathew {
131532ed618SSoby Mathew 	return (cpu_data_t *)read_tpidr_el3();
132532ed618SSoby Mathew }
133e33b78a6SSoby Mathew #else
134e33b78a6SSoby Mathew struct cpu_data *_cpu_data(void);
135e33b78a6SSoby Mathew #endif
136532ed618SSoby Mathew 
137532ed618SSoby Mathew /**************************************************************************
138532ed618SSoby Mathew  * APIs for initialising and accessing per-cpu data
139532ed618SSoby Mathew  *************************************************************************/
140532ed618SSoby Mathew 
141532ed618SSoby Mathew void init_cpu_data_ptr(void);
142532ed618SSoby Mathew void init_cpu_ops(void);
143532ed618SSoby Mathew 
144532ed618SSoby Mathew #define get_cpu_data(_m)		   _cpu_data()->_m
145532ed618SSoby Mathew #define set_cpu_data(_m, _v)		   _cpu_data()->_m = _v
146532ed618SSoby Mathew #define get_cpu_data_by_index(_ix, _m)	   _cpu_data_by_index(_ix)->_m
147532ed618SSoby Mathew #define set_cpu_data_by_index(_ix, _m, _v) _cpu_data_by_index(_ix)->_m = _v
1482614ea3eSJoel Hutton /* ((cpu_data_t *)0)->_m is a dummy to get the sizeof the struct member _m */
149532ed618SSoby Mathew #define flush_cpu_data(_m)	   flush_dcache_range((uintptr_t)	  \
150532ed618SSoby Mathew 						&(_cpu_data()->_m), \
1512614ea3eSJoel Hutton 						sizeof(((cpu_data_t *)0)->_m))
152532ed618SSoby Mathew #define inv_cpu_data(_m)	   inv_dcache_range((uintptr_t)	  	  \
153532ed618SSoby Mathew 						&(_cpu_data()->_m), \
1542614ea3eSJoel Hutton 						sizeof(((cpu_data_t *)0)->_m))
155532ed618SSoby Mathew #define flush_cpu_data_by_index(_ix, _m)	\
156532ed618SSoby Mathew 				   flush_dcache_range((uintptr_t)	  \
157532ed618SSoby Mathew 					 &(_cpu_data_by_index(_ix)->_m),  \
1582614ea3eSJoel Hutton 						sizeof(((cpu_data_t *)0)->_m))
159532ed618SSoby Mathew 
160532ed618SSoby Mathew 
161532ed618SSoby Mathew #endif /* __ASSEMBLY__ */
162532ed618SSoby Mathew #endif /* __CPU_DATA_H__ */
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