xref: /rk3399_ARM-atf/include/lib/el3_runtime/context_mgmt.h (revision 01faa994ceb2635a175f1d299d3b2cd7afd036c0)
1 /*
2  * Copyright (c) 2013-2024, Arm Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef CONTEXT_MGMT_H
8 #define CONTEXT_MGMT_H
9 
10 #include <assert.h>
11 #include <context.h>
12 #include <stdint.h>
13 
14 #include <arch.h>
15 
16 /*******************************************************************************
17  * Forward declarations
18  ******************************************************************************/
19 struct entry_point_info;
20 
21 /*******************************************************************************
22  * Function & variable prototypes
23  ******************************************************************************/
24 void cm_init(void);
25 void *cm_get_context_by_index(unsigned int cpu_idx,
26 			      unsigned int security_state);
27 void cm_set_context_by_index(unsigned int cpu_idx,
28 			     void *context,
29 			     unsigned int security_state);
30 void *cm_get_context(uint32_t security_state);
31 void cm_set_context(void *context, uint32_t security_state);
32 void cm_init_my_context(const struct entry_point_info *ep);
33 void cm_setup_context(cpu_context_t *ctx, const struct entry_point_info *ep);
34 void cm_prepare_el3_exit(uint32_t security_state);
35 void cm_prepare_el3_exit_ns(void);
36 
37 #if !IMAGE_BL1
38 void cm_init_context_by_index(unsigned int cpu_idx,
39 			      const struct entry_point_info *ep);
40 #endif /* !IMAGE_BL1 */
41 
42 #ifdef __aarch64__
43 #if IMAGE_BL31
44 void cm_manage_extensions_el3(void);
45 void manage_extensions_nonsecure_per_world(void);
46 void cm_el3_arch_init_per_world(per_world_context_t *per_world_ctx);
47 void cm_handle_asymmetric_features(void);
48 #endif
49 
50 #if CTX_INCLUDE_EL2_REGS
51 void cm_el2_sysregs_context_save(uint32_t security_state);
52 void cm_el2_sysregs_context_restore(uint32_t security_state);
53 #endif
54 
55 void cm_el1_sysregs_context_save(uint32_t security_state);
56 void cm_el1_sysregs_context_restore(uint32_t security_state);
57 void cm_set_elr_el3(uint32_t security_state, uintptr_t entrypoint);
58 void cm_set_elr_spsr_el3(uint32_t security_state,
59 			uintptr_t entrypoint, uint32_t spsr);
60 void cm_write_scr_el3_bit(uint32_t security_state,
61 			  uint32_t bit_pos,
62 			  uint32_t value);
63 void cm_set_next_eret_context(uint32_t security_state);
64 u_register_t cm_get_scr_el3(uint32_t security_state);
65 
66 /* Inline definitions */
67 
68 /*******************************************************************************
69  * This function is used to program the context that's used for exception
70  * return. This initializes the SP_EL3 to a pointer to a 'cpu_context' set for
71  * the required security state
72  ******************************************************************************/
73 static inline void cm_set_next_context(void *context)
74 {
75 #if ENABLE_ASSERTIONS
76 	uint64_t sp_mode;
77 
78 	/*
79 	 * Check that this function is called with SP_EL0 as the stack
80 	 * pointer
81 	 */
82 	__asm__ volatile("mrs	%0, SPSel\n"
83 			 : "=r" (sp_mode));
84 
85 	assert(sp_mode == MODE_SP_EL0);
86 #endif /* ENABLE_ASSERTIONS */
87 
88 	__asm__ volatile("msr	spsel, #1\n"
89 			 "mov	sp, %0\n"
90 			 "msr	spsel, #0\n"
91 			 : : "r" (context));
92 }
93 
94 #else
95 void *cm_get_next_context(void);
96 void cm_set_next_context(void *context);
97 static inline void cm_manage_extensions_el3(void) {}
98 static inline void manage_extensions_nonsecure_per_world(void) {}
99 static inline void cm_handle_asymmetric_features(void) {}
100 #endif /* __aarch64__ */
101 
102 #endif /* CONTEXT_MGMT_H */
103