1 /* 2 * Copyright (c) 2017-2023, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef ERRATA_REPORT_H 8 #define ERRATA_REPORT_H 9 10 #include <lib/cpus/cpu_ops.h> 11 12 13 #define ERRATUM_WA_FUNC_SIZE CPU_WORD_SIZE 14 #define ERRATUM_CHECK_FUNC_SIZE CPU_WORD_SIZE 15 #define ERRATUM_ID_SIZE 4 16 #define ERRATUM_CVE_SIZE 2 17 #define ERRATUM_CHOSEN_SIZE 1 18 #define ERRATUM_MITIGATED_SIZE 1 19 20 #define ERRATUM_WA_FUNC 0 21 #define ERRATUM_CHECK_FUNC ERRATUM_WA_FUNC + ERRATUM_WA_FUNC_SIZE 22 #define ERRATUM_ID ERRATUM_CHECK_FUNC + ERRATUM_CHECK_FUNC_SIZE 23 #define ERRATUM_CVE ERRATUM_ID + ERRATUM_ID_SIZE 24 #define ERRATUM_CHOSEN ERRATUM_CVE + ERRATUM_CVE_SIZE 25 #define ERRATUM_MITIGATED ERRATUM_CHOSEN + ERRATUM_CHOSEN_SIZE 26 #define ERRATUM_ENTRY_SIZE ERRATUM_MITIGATED + ERRATUM_MITIGATED_SIZE 27 28 /* Errata status */ 29 #define ERRATA_NOT_APPLIES 0 30 #define ERRATA_APPLIES 1 31 #define ERRATA_MISSING 2 32 33 #ifndef __ASSEMBLER__ 34 #include <lib/cassert.h> 35 36 void print_errata_status(void); 37 void errata_print_msg(unsigned int status, const char *cpu, const char *id); 38 39 #if ERRATA_A520_2938996 || ERRATA_X4_2726228 40 unsigned int check_if_affected_core(void); 41 #endif 42 43 /* 44 * NOTE that this structure will be different on AArch32 and AArch64. The 45 * uintptr_t will reflect the change and the alignment will be correct in both. 46 */ 47 struct erratum_entry { 48 uintptr_t (*wa_func)(uint64_t cpu_rev); 49 uintptr_t (*check_func)(uint64_t cpu_rev); 50 /* Will fit CVEs with up to 10 character in the ID field */ 51 uint32_t id; 52 /* Denote CVEs with their year or errata with 0 */ 53 uint16_t cve; 54 uint8_t chosen; 55 /* TODO(errata ABI): placeholder for the mitigated field */ 56 uint8_t _mitigated; 57 } __packed; 58 59 CASSERT(sizeof(struct erratum_entry) == ERRATUM_ENTRY_SIZE, 60 assert_erratum_entry_asm_c_different_sizes); 61 #else 62 63 /* 64 * errata framework macro helpers 65 * 66 * NOTE an erratum and CVE id could clash. However, both numbers are very large 67 * and the probablity is minuscule. Working around this makes code very 68 * complicated and extremely difficult to read so it is not considered. In the 69 * unlikely event that this does happen, prepending the CVE id with a 0 should 70 * resolve the conflict 71 */ 72 #define ERRATUM(id) 0, id 73 #define CVE(year, id) year, id 74 #define NO_ISB 1 75 #define NO_ASSERT 0 76 #define NO_APPLY_AT_RESET 0 77 #define APPLY_AT_RESET 1 78 #define GET_CPU_REV 1 79 #define NO_GET_CPU_REV 0 80 81 /* useful for errata that end up always being worked around */ 82 #define ERRATUM_ALWAYS_CHOSEN 1 83 84 #endif /* __ASSEMBLER__ */ 85 86 /* Macro to get CPU revision code for checking errata version compatibility. */ 87 #define CPU_REV(r, p) ((r << 4) | p) 88 89 #endif /* ERRATA_REPORT_H */ 90