xref: /rk3399_ARM-atf/include/lib/cpus/errata.h (revision d235708c0e449ba31dbd7fb0356155d3c8d17480)
1 /*
2  * Copyright (c) 2017-2025, Arm Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef ERRATA_H
8 #define ERRATA_H
9 
10 #include <lib/cpus/cpu_ops.h>
11 
12 #define ERRATUM_WA_FUNC_SIZE	CPU_WORD_SIZE
13 #define ERRATUM_CHECK_FUNC_SIZE	CPU_WORD_SIZE
14 #define ERRATUM_ID_SIZE		4
15 #define ERRATUM_CVE_SIZE	2
16 #define ERRATUM_CHOSEN_SIZE	1
17 #define ERRATUM_MITIGATED_SIZE	1
18 
19 #define ERRATUM_WA_FUNC		0
20 #define ERRATUM_CHECK_FUNC	ERRATUM_WA_FUNC + ERRATUM_WA_FUNC_SIZE
21 #define ERRATUM_ID		ERRATUM_CHECK_FUNC + ERRATUM_CHECK_FUNC_SIZE
22 #define ERRATUM_CVE		ERRATUM_ID + ERRATUM_ID_SIZE
23 #define ERRATUM_CHOSEN		ERRATUM_CVE + ERRATUM_CVE_SIZE
24 #define ERRATUM_MITIGATED	ERRATUM_CHOSEN + ERRATUM_CHOSEN_SIZE
25 #define ERRATUM_ENTRY_SIZE	ERRATUM_MITIGATED + ERRATUM_MITIGATED_SIZE
26 
27 /* Errata status */
28 #define ERRATA_NOT_APPLIES	0
29 #define ERRATA_APPLIES		1
30 #define ERRATA_MISSING		2
31 
32 #ifndef __ASSEMBLER__
33 #include <lib/cassert.h>
34 
35 void print_errata_status(void);
36 
37 /*
38  * NOTE that this structure will be different on AArch32 and AArch64. The
39  * uintptr_t will reflect the change and the alignment will be correct in both.
40  */
41 struct erratum_entry {
42 	uintptr_t (*wa_func)(uint64_t cpu_rev);
43 	uintptr_t (*check_func)(uint64_t cpu_rev);
44 	/* Will fit CVEs with up to 10 character in the ID field */
45 	uint32_t id;
46 	/* Denote CVEs with their year or errata with 0 */
47 	uint16_t cve;
48 	uint8_t chosen;
49 	/* TODO(errata ABI): placeholder for the mitigated field */
50 	uint8_t _mitigated;
51 } __packed;
52 
53 CASSERT(sizeof(struct erratum_entry) == ERRATUM_ENTRY_SIZE,
54 	assert_erratum_entry_asm_c_different_sizes);
55 
56 /*
57  * Runtime errata helpers.
58  */
59 #if ERRATA_A75_764081
60 bool errata_a75_764081_applies(void);
61 #else
62 static inline bool errata_a75_764081_applies(void)
63 {
64        return false;
65 }
66 #endif
67 
68 #if ERRATA_A520_2938996 || ERRATA_X4_2726228
69 unsigned int check_if_affected_core(void);
70 #endif
71 
72 int check_wa_cve_2024_7881(void);
73 bool errata_ich_vmcr_el2_applies(void);
74 
75 #else
76 
77 /*
78  * errata framework macro helpers
79  *
80  * NOTE an erratum and CVE id could clash. However, both numbers are very large
81  * and the probablity is minuscule. Working around this makes code very
82  * complicated and extremely difficult to read so it is not considered. In the
83  * unlikely event that this does happen, prepending the CVE id with a 0 should
84  * resolve the conflict
85  */
86 #define ERRATUM(id)		0, id
87 #define CVE(year, id)		year, id
88 #define NO_ISB			1
89 #define NO_ASSERT		0
90 #define NO_APPLY_AT_RESET	0
91 #define APPLY_AT_RESET		1
92 #define GET_CPU_REV		1
93 #define NO_GET_CPU_REV		0
94 
95 /* useful for errata that end up always being worked around */
96 #define ERRATUM_ALWAYS_CHOSEN	1
97 
98 #endif /* __ASSEMBLER__ */
99 
100 /* Macro to get CPU revision code for checking errata version compatibility. */
101 #define CPU_REV(r, p)		((r << 4) | p)
102 
103 #endif /* ERRATA_H */
104