xref: /rk3399_ARM-atf/include/lib/cpus/errata.h (revision b47dddd061e92054c3b2096fc8aa9688bfef68d6)
1 /*
2  * Copyright (c) 2017-2025, Arm Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef ERRATA_H
8 #define ERRATA_H
9 
10 #include <lib/cpus/cpu_ops.h>
11 
12 #define ERRATUM_CHECK_FUNC_SIZE	CPU_WORD_SIZE
13 #define ERRATUM_ID_SIZE		4
14 #define ERRATUM_CVE_SIZE	2
15 #define ERRATUM_CHOSEN_SIZE	1
16 #define ERRATUM_ALIGNMENT_SIZE	1
17 
18 #define ERRATUM_CHECK_FUNC	0
19 #define ERRATUM_ID		ERRATUM_CHECK_FUNC + ERRATUM_CHECK_FUNC_SIZE
20 #define ERRATUM_CVE		ERRATUM_ID + ERRATUM_ID_SIZE
21 #define ERRATUM_CHOSEN		ERRATUM_CVE + ERRATUM_CVE_SIZE
22 #define ERRATUM_ALIGNMENT	ERRATUM_CHOSEN + ERRATUM_CHOSEN_SIZE
23 #define ERRATUM_ENTRY_SIZE	ERRATUM_ALIGNMENT + ERRATUM_ALIGNMENT_SIZE
24 
25 /* Errata status */
26 #define ERRATA_NOT_APPLIES	0
27 #define ERRATA_APPLIES		1
28 #define ERRATA_MISSING		2
29 
30 #ifndef __ASSEMBLER__
31 #include <lib/cassert.h>
32 
33 void print_errata_status(void);
34 
35 /*
36  * NOTE that this structure will be different on AArch32 and AArch64. The
37  * uintptr_t will reflect the change and the alignment will be correct in both.
38  */
39 struct erratum_entry {
40 	uintptr_t (*check_func)(uint64_t cpu_rev);
41 	/* Will fit CVEs with up to 10 character in the ID field */
42 	uint32_t id;
43 	/* Denote CVEs with their year or errata with 0 */
44 	uint16_t cve;
45 	/*
46 	 * a bitfield:
47 	 * bit 0 - denotes if the erratum is enabled in build.
48 	 * bit 1 - denotes if the erratum workaround is split and
49 	 * 	   also needs to be implemented at a lower EL.
50 	 */
51 	uint8_t chosen;
52 	uint8_t _alignment;
53 } __packed;
54 
55 CASSERT(sizeof(struct erratum_entry) == ERRATUM_ENTRY_SIZE,
56 	assert_erratum_entry_asm_c_different_sizes);
57 
58 /*
59  * Runtime errata helpers.
60  */
61 #if ERRATA_A75_764081
62 bool errata_a75_764081_applies(void);
63 #else
64 static inline bool errata_a75_764081_applies(void)
65 {
66        return false;
67 }
68 #endif
69 
70 #if ERRATA_A520_2938996 || ERRATA_X4_2726228
71 unsigned int check_if_affected_core(void);
72 #endif
73 
74 int check_wa_cve_2024_7881(void);
75 bool errata_ich_vmcr_el2_applies(void);
76 
77 #else
78 
79 /*
80  * errata framework macro helpers
81  *
82  * NOTE an erratum and CVE id could clash. However, both numbers are very large
83  * and the probablity is minuscule. Working around this makes code very
84  * complicated and extremely difficult to read so it is not considered. In the
85  * unlikely event that this does happen, prepending the CVE id with a 0 should
86  * resolve the conflict
87  */
88 #define ERRATUM(id)		0, id
89 #define CVE(year, id)		year, id
90 #define NO_ISB			1
91 #define NO_ASSERT		0
92 #define NO_APPLY_AT_RESET	0
93 #define APPLY_AT_RESET		1
94 #define GET_CPU_REV		1
95 #define NO_GET_CPU_REV		0
96 
97 /* useful for errata that end up always being worked around */
98 #define ERRATUM_ALWAYS_CHOSEN	1
99 
100 #endif /* __ASSEMBLER__ */
101 
102 /* Macro to get CPU revision code for checking errata version compatibility. */
103 #define CPU_REV(r, p)		((r << 4) | p)
104 
105 /* Used for errata that have split workaround */
106 #define SPLIT_WA			1
107 
108 /* chosen bitfield entries */
109 #define WA_ENABLED_MASK			BIT(0)
110 #define SPLIT_WA_MASK			BIT(1)
111 
112 #endif /* ERRATA_H */
113